MY177180A - An analogue to digital converter - Google Patents

An analogue to digital converter

Info

Publication number
MY177180A
MY177180A MYPI2013002294A MYPI2013002294A MY177180A MY 177180 A MY177180 A MY 177180A MY PI2013002294 A MYPI2013002294 A MY PI2013002294A MY PI2013002294 A MYPI2013002294 A MY PI2013002294A MY 177180 A MY177180 A MY 177180A
Authority
MY
Malaysia
Prior art keywords
radix
comparator
weights
successive approximation
present
Prior art date
Application number
MYPI2013002294A
Inventor
Abdul Majid Hasmayadi
Kong Yew Tan
Original Assignee
Mimos Berhad
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mimos Berhad filed Critical Mimos Berhad
Priority to MYPI2013002294A priority Critical patent/MY177180A/en
Priority to PCT/MY2014/000097 priority patent/WO2014204294A1/en
Publication of MY177180A publication Critical patent/MY177180A/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0675—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy
    • H03M1/069—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy by range overlap between successive stages or steps
    • H03M1/0692—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy by range overlap between successive stages or steps using a diminished radix representation, e.g. radix 1.95
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/34—Analogue value compared with reference values
    • H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
    • H03M1/46—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
    • H03M1/466—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter using switched capacitors
    • H03M1/468—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter using switched capacitors in which the input S/H circuit is merged with the feedback DAC array
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/68—Digital/analogue converters with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits
    • H03M1/687—Segmented, i.e. the more significant bit converter being of the unary decoded type and the less significant bit converter being of the binary weighted type

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

The present invention relates to a small area multi segment DAC that is used within a successive approximation analog to digital converter. The present invention comprising: a comparator (100) for comparing input signal with a reference signal; a successive approximation logic (200) that takes input from the comparator (100); and a digital to analogue converter block (300) including a plurality of capacitors that receives input from the successive approximation logic (200) block and generates reference signal that is applied to the comparator (100). The present invention not only combines the thermometer coded (3000) and binary coded segments (1000) but also a segment that has sub-radix 2 (radix < 2) weights (2000). A sub-radix 2 weights (2000) is in between binary (1000) and unitary weights (3000), hence its area and decoder size is also in between the two while its differential non-linearity DNL parameter (measure of linearity) is in between the two as well. Most illustrative figure is Figure 1.
MYPI2013002294A 2013-06-19 2013-06-19 An analogue to digital converter MY177180A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
MYPI2013002294A MY177180A (en) 2013-06-19 2013-06-19 An analogue to digital converter
PCT/MY2014/000097 WO2014204294A1 (en) 2013-06-19 2014-05-02 An analogue to digital converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
MYPI2013002294A MY177180A (en) 2013-06-19 2013-06-19 An analogue to digital converter

Publications (1)

Publication Number Publication Date
MY177180A true MY177180A (en) 2020-09-09

Family

ID=51300800

Family Applications (1)

Application Number Title Priority Date Filing Date
MYPI2013002294A MY177180A (en) 2013-06-19 2013-06-19 An analogue to digital converter

Country Status (2)

Country Link
MY (1) MY177180A (en)
WO (1) WO2014204294A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180105027A (en) * 2017-03-14 2018-09-27 에스케이하이닉스 주식회사 Successive approximation register analog-digital converter having split-capacitor based digital-analog converter

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7812757B1 (en) * 2009-06-12 2010-10-12 Hong Kong Applied Science And Technology Research Institute Co., Ltd. Hybrid analog-to-digital converter (ADC) with binary-weighted-capacitor sampling array and a sub-sampling charge-redistributing array for sub-voltage generation
US8330634B2 (en) * 2011-02-08 2012-12-11 Maxim Integrated Products, Inc. Precision sub-radix2 DAC with linearity calibration

Also Published As

Publication number Publication date
WO2014204294A1 (en) 2014-12-24

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