MY143880A - Method and apparatus for setting a voltage controlled crystal oscillator in a video processing device. - Google Patents

Method and apparatus for setting a voltage controlled crystal oscillator in a video processing device.

Info

Publication number
MY143880A
MY143880A MYPI20050785A MYPI20050785A MY143880A MY 143880 A MY143880 A MY 143880A MY PI20050785 A MYPI20050785 A MY PI20050785A MY PI20050785 A MYPI20050785 A MY PI20050785A MY 143880 A MY143880 A MY 143880A
Authority
MY
Malaysia
Prior art keywords
frequency
setting
crystal oscillator
voltage controlled
controlled crystal
Prior art date
Application number
MYPI20050785A
Other languages
English (en)
Inventor
George Andrew Sirilla
Robert Alan Pitsch
Original Assignee
Thomson Licensing Sa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Licensing Sa filed Critical Thomson Licensing Sa
Publication of MY143880A publication Critical patent/MY143880A/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/14—Picture signal circuitry for video frequency region
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/20—Servers specifically adapted for the distribution of content, e.g. VOD servers; Operations thereof
    • H04N21/23—Processing of content or additional data; Elementary server operations; Server middleware
    • H04N21/242—Synchronization processes, e.g. processing of PCR [Program Clock References]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L1/00—Stabilisation of generator output against variations of physical values, e.g. power supply
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L1/00—Stabilisation of generator output against variations of physical values, e.g. power supply
    • H03L1/02—Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only
    • H03L1/022—Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only by indirect stabilisation, i.e. by generating an electrical correction signal which is a function of the temperature
    • H03L1/026—Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only by indirect stabilisation, i.e. by generating an electrical correction signal which is a function of the temperature by using a memory for digitally storing correction values
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/4302—Content synchronisation processes, e.g. decoder synchronisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Circuits Of Receivers In General (AREA)
  • Oscillators With Electromechanical Resonators (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
MYPI20050785A 2004-02-26 2005-02-26 Method and apparatus for setting a voltage controlled crystal oscillator in a video processing device. MY143880A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US54814504P 2004-02-26 2004-02-26

Publications (1)

Publication Number Publication Date
MY143880A true MY143880A (en) 2011-07-15

Family

ID=34910989

Family Applications (1)

Application Number Title Priority Date Filing Date
MYPI20050785A MY143880A (en) 2004-02-26 2005-02-26 Method and apparatus for setting a voltage controlled crystal oscillator in a video processing device.

Country Status (8)

Country Link
US (1) US7738039B2 (enExample)
EP (1) EP1733566A2 (enExample)
JP (1) JP2007528159A (enExample)
KR (1) KR101091042B1 (enExample)
CN (1) CN1922891B (enExample)
BR (1) BRPI0508112A (enExample)
MY (1) MY143880A (enExample)
WO (1) WO2005084037A2 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101977016B1 (ko) 2011-12-30 2019-05-13 삼성전자 주식회사 방송 수신 시스템의 프론트 엔드 집적회로, 이를 포함하는 방송 수신 시스템, 및 이의 동작 방법
CN103248358A (zh) * 2013-05-30 2013-08-14 上海贝岭股份有限公司 实时时钟补偿装置及方法
KR101717151B1 (ko) 2015-10-26 2017-03-27 주식회사 호서텔넷 저항 조절 회로 및 이를 포함하는 무선 통신 시스템
CN120017046B (zh) * 2025-04-22 2025-07-22 北京和峰科技有限公司 基于公网信号扫描的压控晶振频率调整方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4959715A (en) * 1989-06-16 1990-09-25 North American Philips Corporation Method and apparatus for converting an interlaced television transmission to a sequential display using maximum likelihood estimation
US5381181A (en) * 1993-05-13 1995-01-10 Thomson Consumer Electronics, Inc. Clock recovery apparatus as for a compressed video signal
US5742191A (en) * 1993-12-08 1998-04-21 Thomson Consumer Electronics, Inc. D/A for controlling an oscillator in a phase locked loop
US5612981A (en) * 1994-02-15 1997-03-18 Philips Electronics North America Corporation Apparatus and methods for improving timing recovery of a system clock
US5920572A (en) * 1995-06-30 1999-07-06 Divicom Inc. Transport stream decoder/demultiplexer for hierarchically organized audio-video streams
US5699392A (en) * 1995-11-06 1997-12-16 Stellar One Corporation Method and system for the recovery of an encoder clock from an MPEG-2 transport stream
DE69941284D1 (de) * 1998-10-02 2009-10-01 Thomson Consumer Electronics Umsetzung einer Datenrate
US6356871B1 (en) * 1999-06-14 2002-03-12 Cirrus Logic, Inc. Methods and circuits for synchronizing streaming data and systems using the same
JP2001077670A (ja) * 1999-08-31 2001-03-23 Sanyo Electric Co Ltd 周波数補正回路、移動体通信機
EP1303954B1 (en) * 2000-07-26 2008-07-16 Thomson Licensing Multi-media jitter removal in an asynchronous digital home network
JP3555883B2 (ja) * 2001-06-08 2004-08-18 日本電気株式会社 クロック再生方法及び受信クロック生成装置
EP1324619B1 (en) * 2001-10-30 2006-05-17 STMicroelectronics Pvt. Ltd All-digital clock recovery using a fractional divider

Also Published As

Publication number Publication date
JP2007528159A (ja) 2007-10-04
CN1922891A (zh) 2007-02-28
US20070192783A1 (en) 2007-08-16
CN1922891B (zh) 2010-06-16
BRPI0508112A (pt) 2007-07-17
WO2005084037A2 (en) 2005-09-09
WO2005084037A3 (en) 2005-11-10
US7738039B2 (en) 2010-06-15
KR20070028314A (ko) 2007-03-12
KR101091042B1 (ko) 2011-12-09
EP1733566A2 (en) 2006-12-20

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