MY119727A - Memory management apparatus and memory management method - Google Patents

Memory management apparatus and memory management method

Info

Publication number
MY119727A
MY119727A MYPI98002843A MYPI9802843A MY119727A MY 119727 A MY119727 A MY 119727A MY PI98002843 A MYPI98002843 A MY PI98002843A MY PI9802843 A MYPI9802843 A MY PI9802843A MY 119727 A MY119727 A MY 119727A
Authority
MY
Malaysia
Prior art keywords
block
data
flag
blocks
memory management
Prior art date
Application number
MYPI98002843A
Inventor
Akira Sassa
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of MY119727A publication Critical patent/MY119727A/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Memory System (AREA)

Abstract

THE PRESENT INVENTION ENABLES A HIGH-SPEED PROCESSING. THE PRESENT INVENTION PROVIDES A MEMORY MANAGEMENT METHOD FOR A MEMORY (22) HAVING A STORAGE AREA DIVIDED INTO A PLURALITY OF BLOCKS, SO THAT A DATA IN EACH OF THE BLOCKS IS ERASED AT ONCE WHEN THE BLOCK IS INITIALIZED, WHEREIN EACH OF THE BLOCKS HAS A FLAG INDICATING A BLOCK USE STATE; WHEREIN WHEN ERASING A DATA WRITTEN IN A BLOCK, INSTEAD OF EXECUTING AN INITIALIZATION OF THE BLOCK, AN ERASE FLAG OF THE BLOCK IS SET TO AN ERASE STATE INDICATING THAT A DATA CONTAINED IN THE BLOCK IS TO BE ERASED; AND WHEREIN PRIOR TO WRITING A NEW DATA IN A BLOCK HAVING THE ERASE FLAG IN THE ERASE STATE, THE INITIALIZATION PROCESSING IS EXECUTED TO THE BLOCK, SETTING THE FLAG OF THE BLOCK TO AN INITIAL STATE. IT IS PREFERABLE THAT EACH OF THE BLOCKS BE PROVIDED AN END FLAG INDICATING WHETHER THE BLOCK IS AN END BLOCK CONTAINING AN END PORTION OF A DATA OF A PREDETERMINED UNIT; AND DURING A DATA WRITE, THE END FLAG OF THE BLOCK WHERE AN END PORTION OF A DATA OF A PREDETERMINED UNIT IS WRITTEN BE SET TO A STATE INDICATING AN END BLOCK. (FIG. 3)
MYPI98002843A 1997-06-25 1998-06-23 Memory management apparatus and memory management method MY119727A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16919997A JP3718578B2 (en) 1997-06-25 1997-06-25 Memory management method and memory management device

Publications (1)

Publication Number Publication Date
MY119727A true MY119727A (en) 2005-07-29

Family

ID=15882055

Family Applications (1)

Application Number Title Priority Date Filing Date
MYPI98002843A MY119727A (en) 1997-06-25 1998-06-23 Memory management apparatus and memory management method

Country Status (6)

Country Link
US (1) US6144607A (en)
EP (1) EP0887735A3 (en)
JP (1) JP3718578B2 (en)
KR (1) KR100578427B1 (en)
CN (1) CN1146795C (en)
MY (1) MY119727A (en)

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CN100464375C (en) * 2005-10-08 2009-02-25 晶豪科技股份有限公司 Erasing method for reducing erasing time and preventing over erasing
US7515500B2 (en) * 2006-12-20 2009-04-07 Nokia Corporation Memory device performance enhancement through pre-erase mechanism
KR100877609B1 (en) * 2007-01-29 2009-01-09 삼성전자주식회사 Semiconductor memory system performing data error correction using flag cell array of buffer memory and driving method thereof
KR20080097766A (en) * 2007-05-03 2008-11-06 삼성전자주식회사 Method for separating storage space of writable medium, writable medium using the same and method for accessing writable medium, writable appratus using the same
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Also Published As

Publication number Publication date
JP3718578B2 (en) 2005-11-24
EP0887735A2 (en) 1998-12-30
JPH1115705A (en) 1999-01-22
KR19990007270A (en) 1999-01-25
EP0887735A3 (en) 2001-12-05
CN1206149A (en) 1999-01-27
CN1146795C (en) 2004-04-21
US6144607A (en) 2000-11-07
KR100578427B1 (en) 2006-09-20

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