KR100229033B1 - Power reducing device and method in writing of nonvolatile memory - Google Patents

Abstract

1. Field of the Invention:

To an apparatus and method for saving power when writing to a nonvolatile memory.

2. Technical Problems to be Solved by the Invention:

Volatile memory for recording in a nonvolatile memory for recording unused areas in a nonvolatile memory capable of being rewritable, and for deleting a region required to be erased when power is supplied, ≪ / RTI >

3. The point of the inventive solution:

A nonvolatile memory capable of rewriting data; an area for temporarily storing deletion data from the nonvolatile memory; a power supply section; and a control section for inputting power of the power supply section as an operation power supply, A method for writing to a volatile memory, the method comprising: erasing erase data in the temporary storage area when the power source is input to an operation power source; checking existence of the non-volatile memory idle area when write data is generated; Storing the erased data in the temporary storage area when the erased data is present, and erasing the oldest data if the erased area is not present.

4. Important Uses of the Invention:

This is implemented to minimize the power consumption of devices using non-volatile memory.

Description

Apparatus and method for saving power in a nonvolatile memory

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a system using a nonvolatile memory, and more particularly, to an apparatus and a method for saving power of the system when writing data to the nonvolatile memory.

Typically, memory is divided into volatile and nonvolatile memory. The nonvolatile memory is used for recording information that can not be erased even during a power failure due to power consumption and price. An EEPROM (Electrically Programmable Read-Only Memory) and a flash memory among the nonvolatile memories are partly writable and rewritable memory devices.

FIG. 1 is a diagram schematically showing a block diagram of a system for controlling a memory. Referring to FIG. 1, the power supply unit 16 includes a power source such as a battery or an external power source (electric line, vehicle power source) to supply power to the system. The controller 12 controls the system as a whole, and inputs the power as the operating power. An I / O port 14 is located between the power supply unit 16 and the controller 12 and outputs power of the power supply unit 16 to the operation power of the controller 12. Also, the I / O or 14 may be set to an interrupt mode or a polling mode so that the controller 12 recognizes that the external power source is connected to the power supply circuit. The flash memory 18 is an example of a nonvolatile memory and data is accessed under the control of the control unit 12. [

FIG. 2 is a view showing an interface relation between the flash memory 18 and the controller 12 in FIG. Hereinafter, this will be described in detail with reference to FIG.

The control unit 12 is connected to the flash memory 18, the address bus, the data bus, and the logic unit 22. The logic unit 22 inputs an address from the control unit 12 to output a chip enable signal / CE, a write enable / WE when a write signal / WR is input, a read enable / / OE. The flash memory 18 outputs the corresponding data through the data bus based on the control signals, and records the write data input through the data bus in the corresponding area.

3a-3d are views showing one embodiment of the structure and operation principle of the flash memory in the second operation. Referring to FIG. 3A, reference numeral 32 denotes a gate, and reference numeral 34 denotes a floating gate for storing charges, reference numeral 36 denotes a source, and reference numeral 38 denotes a drain.

Hereinafter, the operation principle of the flash memory 18 will be described. Referring to FIG. 3B, when a voltage is applied between the source 36 and the drain 38 in the data write mode and a voltage higher than the drain 38 is applied to the gate 32, the electrons are stored in the floating gate 34. Referring to FIG. 3C, in the data erase mode, a voltage higher than the gate 32 is applied to the source 36, and the drain 38 is left open, so that the electrons escape from the floating gate 34 to the source 36. 3, in the data reading mode, when the source 36 is grounded and a voltage higher than the drain 38 is applied to the gate 32, the value of the drain 38 is detected depending on the presence or absence of electrons stored in the floating gate 34.

FIG. 4 is a flowchart showing a process flow of a control unit for recording data in a conventional flash memory. Hereinafter, this will be described in detail with reference to FIG. First, it is noted that the nonvolatile memory used here is the same as the rewritable EEPROM and flash memory, and the embodiment is implemented as a flash memory.

In step 411, the controller 12 checks in step 412 whether there is data in the recording area when the recording data is generated. If the data is to be rewritten in the area where the data is recorded, the controller 12 must secure the recording area through the erasing process in step 413. Thereafter, in step 414, the flash memory 14 inputs write data from the controller 12 to the idle area through the data bus and records the write data in the corresponding area. In step 415, the control unit 12 checks whether the record data is recorded in the corresponding area, and returns to step 413 or ends the recording operation.

In order to record information in the corresponding area of the IO type nonvolatile memory and re-record, the controller 12 firstly stores the new record data after a procedure of erasing the data of the corresponding area in a predetermined order as in step 413 . Therefore, the problem of the related art is that the control unit 12 continuously controls the state of the memory for erasing and recording, which causes power consumption accordingly.

It is therefore an object of the present invention to provide an apparatus and method for saving power in a nonvolatile memory for writing unused areas in a nonvolatile memory for recording write data in a rewritable nonvolatile memory.

It is still another object of the present invention to provide an apparatus and method for saving power in a system for recording in a nonvolatile memory for collectively deleting an area required to be erased when power is supplied, .

FIG. 1 schematically shows a block diagram of a system for controlling a memory. FIG.

FIG. 2 is a view showing an interface relation between a memory and a control unit in FIG. 1; FIG.

Figure 3a is a drawing showing the structure of the flash memory in Figure 2

FIG. 3b is a view showing the operation principle in the data recording mode in FIG.

FIG. 3c is a diagram showing the operation principle of the data erase mode at the step 3a; FIG.

FIG. 3D is a diagram showing the operation principle when the data reading mode is shown in FIG.

FIG. 4 is a flowchart showing a processing flow of a control unit for writing to a flash memory in the related art; FIG.

FIG. 5 is a flowchart showing a processing flow of a control unit for writing into a flash memory according to a preferred embodiment of the present invention; FIG.

Figures 6a-6f show the processing results of the memory of the flash memory according to Figure 5;

DESCRIPTION OF THE REFERENCE NUMERALS

12: control unit 14: I / O port

16: power supply unit 18: flash memory

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. It is to be noted that like elements in the drawings denote the same reference numerals whenever possible. It should be noted that only the parts necessary for understanding the operation according to the present invention will be described in the following description of the embodiments, and the description of the other parts will be omitted so as not to obscure the gist of the present invention.

As used herein, the term "idle zone" refers to an area where there is no record data in the memory.

FIG. 5 is a flowchart showing a process of a controller for writing data into a flash memory according to a preferred embodiment of the present invention. This will be described in detail with reference to FIG. 5 below.

When the power switch is turned on and the system is activated, the controller 12 collectively deletes the data recorded in the removal queue for temporary storage of data at step 512 in step 512 when the power is connected in step 511. When the recording data is generated in step 513, the controller 12 checks in step 514 whether there is an idle area which is not used in the current memory. If there is an idle area, the controller 12 records the record data in the corresponding area at step 515. [ On the other hand, if it is determined in step 514 that there is no idle area, in step 516, the data of the address first recorded in the control queue is deleted by an amount usable for storage. In step 517, the control unit 12 records the record data in the deleted area. The control unit 12 analyzes the unnecessary data after the deletion in step 518 and writes the data in the removal queue in step 519 when the area to be deleted is generated. In step 520, the control unit 12 returns to step 513 or terminates based on the interruption of the power supply. FIGS. 6A to 6F are diagrams showing the processing results of the map of the flash memory based on FIG. Hereinafter, the fifth and sixth drawings will be described in detail.

Referring to FIGs. 6a-6f, the first-fourth addresses addr 1-4 are memory areas of the same size, and the delete queue is a first-in first-out (FIFO) 12, the address of the data to be deleted in the memory area is sequentially written, and the corresponding memory data of the address to be deleted at the time of deletion is also deleted. At this time, it is assumed that all of the data are recorded in the updater.

In FIG. 6B, the first data D1 is written to the first and second addresses addr 1 and 2 through steps 514 and 515 because all memory areas are empty. If the updated second data D2 is input to the first data D1, since the memory areas that can be written are the third and fourth addresses addr3 and 4, the second data D2 Is recorded in the corresponding area of the third address addr3. At this time, since the first data D1 is no longer needed, the first and second addresses addr 1 and 2 are registered in the removal queue in step 519. When recording the third data D3 requiring two areas in FIG. 6C, since the idle area is insufficient in step 514, the oldest address addr1 of the data registered in the removal queue is deleted as shown in FIG. This is the process of step 516. Then, as shown in step 517, the third data D3 after the deletion is recorded in the first and fourth addresses addr1 and 4. The third address addr3 corresponding to the second data D2 which is unnecessary data after the recording is registered in the elimination queue as shown in Fig. 6e. Then all the data in the removal queue is deleted as shown in 6f when the power is shut off and the power is connected again.

As described above, according to the present invention, it is possible to minimize a deletion process when writing data in a rewritable nonvolatile memory, thereby preventing waste of power due to deletion, Can be recovered as needed.

Claims (3)

An apparatus for accessing a nonvolatile memory capable of rewriting data, the apparatus comprising: a power supply unit for supplying power; an area for temporarily storing an address to be deleted of the nonvolatile memory; Writes the write data in the idle area when there is an idle area of the memory when the write data is generated, deletes the oldest data when the idle area does not exist, and records the deleted data in the memory And a controller for recording the address to be deleted in the temporary storage area when the address to be deleted is present, in the nonvolatile memory. 2. The nonvolatile memory according to claim 1, wherein the temporary storage area is a first-in first-out structure. A nonvolatile memory capable of rewriting data; an area for temporarily storing addresses to be deleted from the nonvolatile memory; a power supply section; and a control section for inputting power of the power supply section as an operation power supply, A method for writing to a volatile memory, the method comprising the steps of: erasing an address to be deleted of the temporary storage area when the power is input to an operation power source; writing the write data to the idle area when the idle area exists; And storing the oldest data in the temporary storage area when the address to be deleted exists in the non-volatile memory. The method of claim 1, Power saving method of the system