MXPA99008743A - Method and device for mta traffic shaping - Google Patents

Abstract

A method and device for shaping MTA traffic, for handling connections associated to a large number of users, which operates on 155 B/s links, according to the UTOPIA 16 bit standard, which transmits data bundled as cells, in which an algorithm is defined from certain data structures, consisting of two status machines, one for writing and one for reading, respectively associated to the cell storage and extraction processes. The device comprises three circuits which consist of a shaping circuit, a cell memory and a parameter memory, where the shaping circuit consists of a number of internal modules, including input and output modules, intermediate storage FIFO memory, interface modules, internal memory and input, output and control automatons.

Description

METHOD AND APPARATUS FOR MOLDING TRAFFIC MTA DESCRIPTION OF THE INVENTION The present invention relates to a method and apparatus for molding traffic MTA (Asynchronous Transfer Mode), used with the specific application integrated circuit ATS (MTA Traffic Conformer). The invention has as its scope the digital network of integrated broadband services of MTA technology. With the use of the device it is possible to reduce the network resources necessary to offer telecommunication services by distributing traffic, so that the use of them is more constant. The algorithm conformed with the traffic that is presented allows, given its simplicity from the point of view of the implementation, the processing of a large number of information channels of different characteristics, which makes it especially suitable for use in the access to network. The field of application of the present invention pertains to that of telecommunications, and more specifically, it is especially applicable in systems using broadband asynchronous transfer mode technology.

BACKGROUND AND SUMMARY OF THE INVENTION The development of broadband telecommunications services, is recent, and the implementation of networks capable of offering this type of services, poses new difficulties. In the first experimental platforms on which the demonstrations of the services that could be offered in the future on networks of this type were carried out, the characteristics of the traffic in the network were very determined, and in most cases controllable by simple procedures. At present, the design of broadband networks must face a traffic generated by a large number of users, to which it must offer the best possible service with the available resources. The quality of service offered by the network is established in accordance with the user's requirements or needs, which means that it must be guaranteed for the individual users, and not for the aggregate traffic formed for the communications of all of them; this implies that the contract established between the users and the administration of the network must be fulfilled, in what refers to the transmission speed that each of them has available. One way to achieve that the network can meet the requirements established in the traffic contract minimizing the use of resources, is to mold such traffic to make it more manageable; the ideal traffic to make the most of network resources is the constant speed, since in this way you can minimize the speed of instant data transmission. Currently available network equipment allows the molding of traffic on a very limited number of users; the quality with which this function is performed, which can be established according to the difference of the outgoing traffic with respect to a constant transmission rate source, is not sufficient for the needs of the current digital broadband integrated services network . Therefore, there is a real need to provide solutions to the aforementioned drawback, towards which the main objective of the present invention has been directed. In that sense, the simplicity of implementation and scalability of the traffic shaping method that is used in this equipment, as well as the innovative solutions that have been provided, allow the management of connections associated with a large number of users, with a quality of conformed according to ITU standards (1.371). According to the traffic molding function which will be described in detail below, it is performed on an MTA link of 155 Mb / s, which transmits encapsulated information in the form of cells. Each of the MTA cells contains a header with information regarding the connection to which it belongs, so that the cells can be identified as belonging to 256 different connections. The transmission link was slotted at cell intervals, identified by an explicit cell interval start signal. Each cell interval in the transmission link may also contain information corresponding to a valid information cell, or be empty, which is detected by an explicit empty cell indication signal that remains active throughout the duration of the interval of cell. This transmission link, has as interfaces of input and output buses compatible with the UTOPIA standard, which is the interface recommended by ATM Forum between circuits that perform MTA layer functions and circuits that perform physical layer functions (for a broader information about of the assignment of functions to the MTA process layers, see recommendation ITV.311). This has been decided in this way because the traffic molding function is included in the MTA layer functions.

BRIEF DESCRIPTION OF THE DRAWINGS The features and advantages of the invention will become apparent from the detailed description of the preferred embodiment made in the following, given by way of illustrative and non-limiting example with reference to the accompanying drawings, in which: Figure 1 shows a graphical representation of peak cell distributions before and after shaping: Figure 2 illustrates a schematic representation of logical operation of traffic shaping; Figure 3 shows a schematic representation of the process of initiation of empty gap queue; Figure 4 shows a graphic representation relating to the list of pending extractions and status table; Figure 5 illustrates, schematically, a representation of the writing process of the first cell; Figure 6 graphically represents the process of writing a cell that is not the first; Figure 7 consists of a graphic representation of the extraction process of a cell; Figure 8 corresponds to a schematic representation of the displacement experienced by a cell arriving by adding a pseudo-random value to the time counter; Figure 9 represents a diagram corresponding to the physical diagram of the shaping apparatus, and Figure 10 shows a block diagram corresponding to the internal architecture of the Specific Application ATS Circuit, formed of traffic of the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENT To carry out the detailed description of the preferred embodiment of the present invention, reference will first be made to what is defined as traffic shaping, and which, according to recommendation 1.371, consists of a mechanism that changes the traffic characteristics of a cell stream in a Virtual Channel connection (hereinafter VPC), to achieve a desired modification of those characteristics, in order to obtain greater efficiency of the network at the same time as the quality of service objectives, or to ensure compliance in a subsequent interface. From this definition it can be inferred that traffic conforming consists of a manipulation of the same that improves the efficiency of the network, but in the same recommendation cited, the manipulations that are considered adequate are clarified, establishing that "they are examples of conformation of traffic reduction of the peak cell velocity, limitation of the length of the bursts, reduction of the Delay Variation of the Cells (CDV in the following) by adequate spacing of the cells over time, and the tail service schemes ". Without going into too many details, but only in order to clarify the concepts that appear in the above, a VCC or VPC consists of a virtual path or channel, or more generally, in an MTA connection. Each MTA connection is characterized by a peak cell rate, which is its maximum number of cells per unit of time. Another characteristic of the traffic of a connection is the presence of bursts and the length thereof, ie, time intervals in which the cell transmission speed is high, and the duration of these intervals. Finally, the denomination CDV (derived from the English Cell Delay Variation), is assigned to the temporal representation of the elapsed time between consecutive cells of the same connection, in such a way that if a connection is characterized by having many bursts, this parameter CDV is very big. The traffic shaping mechanisms should aim to reduce, or even annul, the CDV, or what is the same, the elimination of consecutive bursts of cells; a traffic without bursts of greater speed of instantaneous transmission, and therefore whose speed of crest is equal to its average speed, denominates of constant binary speed or CBR (initials of the English expression Constant Bit Rate). Figure 1 shows a graphical representation in which two pairs of graphs (a) and (b) appear, which show the concepts indicated above in relation to a connection example -of 51.6 Mb / s on a channel of 155 Mb / s, being able to appreciate that in both cases, a third of the cell intervals are occupied by the connection, although, in case (a), the distribution is not uniform, but there are bursts, it may be difficult to multiplex another connection on the same channel, while in the case (b), after forming, such distribution appears uniformly, with a total elimination of these bursts.

The method of forming traffic that is used in the ATS circuit, aims to obtain a CBR output traffic for each of the 256 input connections it supports. The justification of the molding method is explained mathematically below, and is as follows: If we have a binary speed transmission link Vi, and Vc is called the average bit rate of a connection contained in that link, since V ? > Vc, you can write: N V ^ Vi-- with N e [1, 2k] where N is a positive integer, expressed binary arithmetic of k bits, and the link is slotted, that is, only cells of information can be transmitted at the instants that the timing of a cell marks. Substituting the possible values of N, the possible binary speeds are: To form the traffic, it is desired that the information cells of each connection be evenly distributed in the output transmission link, that is, it is desired to set the IDT time between consecutive cells belonging to the connection (the IDTs correspond to the English expression Inter-Departure Time). The number of cell types that must exist between two consecutive ones of the same connection can be calculated as the inverse of the bit rate, expressed in cell intervals of the transmission link: 2k IDT = N.Vi To achieve a separation in the time according to these parameters, proceed as follows: First, the connection to which the cell belongs is identified, and stored in a queue corresponding to said connection (more details on the storage process are provided below). ); the first cell that reaches the tail, is taken out of it immediately after arriving, since, being the first, there is no time reference with respect to the previous one; there is a cell interval counter of the transmission link, which serves as a temporary reference, and when the cell is extracted, the value of the counter is calculated for which a cell of said connection must be re-extracted (simply by adding the IDT, and it is stored in part of memory); each time the circuit detects that it must re-extract a cell from the connection queue, because it has read the corresponding memory annotation, it re-calculates and annotates the moment of the new extraction, and on the other hand, every time a new cell of the connection arrives, a storage is made in the queue, so that it becomes the last one of the same. This set of actions have been divided between two automata or finite-state machines, which share the task: the writing automaton, which performs the storage tasks, and the reading automaton, which is responsible for removing the cells. In order to achieve that the granularity (variation between the possible values that can be programmed for the output bit rate) meets the ITV.371 recommendation requirements, it is necessary to include an additional speed parameter and calculate the IDT value as a quotient plus a rest; this is so because the circuit uses whole arithmetic of k bits: 2k IDT = = C + R / N, where C - integer (2k / N) N and R = remainder (2k / N) The calculation of the cell intervals that you have to leave between two consecutive of a given connection, it gets slightly complicated. The parameters which are programmed are C and AC = 2k «R / N. Each time a cell is removed, C cell intervals are passed, and a k-bit counter is incremented with the value of AC, and in the extraction that this counter overflows (exceeds 2k), C + 1 intervals are allowed to pass as a "fine-tuning" mode. This conformed of traffic is carried out on the set of 256 possible connections, transmitted by the same link. The operating scheme, from the logical point of view, which is that of a 256-tailed system, whose special reading procedure, which is based on the traffic shaping algorithm defined below, and whose schematic representation appears in Figure 2, in which the block (1) represents the incoming traffic that does not meet the requirement of constant transmission speed per connection, and that after being formed in (2) by the system of tails with extraction of the cells according to a constant cadence, the exit traffic (3) is obtained, formed, in which the time between cells is constant (for each connection). With regard to the Traffic Forming Algorithm Used, and for a better understanding of its operation, it will be divided into two state machines, in the same way that has been done in the elaboration of the circuit. The state machine associated with the cell storage process is called the writing automaton, and the process related to the output of the cells is performed by the reading automaton. Both operate independently, although not at the same time, since they use common resources and contingency occurs. To carry out said algorithm, the following data structures are needed: - Cell storage voids. All cells are stored in the same memory, which is compartmentalized in cell holes (512 bits). Each cell gap can be empty or contain a cell belonging to the tail of any connection. The circuit is capable of handling 49,152 cell gaps.

- Connection descriptors. They are complex structures, one per connection, that contains the control information of the queues: the address (pointer) of the first cell hole that contains one of this queue (it is the first to exit); the address of the last cell gap that contains one of this queue; the number of cells stored in that queue; The maximum number of cells allowed for that queue, and other parameters related to the MTA layer process. - Cell time interval counter in the transmission link. It is a free 12-bit counter, which increases with each cell interval in the transmission link, and which serves as a reference for time measurements. It returns to 0 automatically when it reaches its maximum value. You can not calculate IDT values greater than the maximum value of this counter. - List of extractions of pending cells. This list has a space for each value of the cell time interval counter, and it stores the identifier of the connection from which a cell must be extracted in that interval. As already mentioned, each time a queue cell is extracted, the number of cell intervals that must elapse until a new cell is removed from this connection is calculated, and the counter is used as the base, to which the IDT is added; the resulting value indicates the address of this list in which the identifier of the connection is stored, to be attended when said time interval is stored. It is not a problem if the result of the sum is higher than 4096 (maximum value of the counter), since said value is reached in the next turn of the same. The only limitation is that the IDT can not be higher than 4096, because it means more than one counter turn. - Status table of the list of pending cell extractions. For each time interval of the real time counter, you can It happens that a cell must be removed or not, and in that case that empty cell gap would be left in the output link. This table contains a "1" in the address corresponding to the counter in which a cell must be extracted from a queue (whichever it is, the queue identifier is saved in the pending cell extractions list), and a "0" otherwise. - Table of pointers to the next cell gap. Each cell gap in the cell memory, which as said may or may not contain a cell, has a position assigned in this table, so that if the corresponding gap does not contain a cell, this address contains the next empty gap, and if it contains a cell, this address stores the address of the cell gap that contains the next queue cell (next in temporal terms, since it has arrived later, and has been stored later). - Pointer to the first unoccupied cell hole. It is the address of the memory hole not occupied by a cell that will be used to store the next cell that arrives by transmission link. - Pointer to the last cell gap not occupied. It stores the address of the unoccupied memory hole behind (logically speaking) from which the next memory hole that is released will be placed because it has extracted a cell from a queue. - Counter of the number of voids of empty cells. Maintains the account of the number of empty cell gaps that extend in memory. When it is 0 (there are no free holes), the cells that are received by the transmission link are discarded. Initially, the data structures described take the following values: - All cell gaps are declared as empty, creating a kind of "empty cell gap queue". This is achieved by assigning the pointer to the first empty hole with the value of the first memory address, the last with the last, in the table of pointers to the next cell gap each position contains the address of the next hole, and the hole counter empty cell has the value of the total number of memory cell gaps. This situation is shown graphically in figure 3 of the drawings, in which a block (4) illustrating the cell gaps in memory (all empty), a pointer (5) assigned to the first empty cell gap, a pointer (6) assigned to the last empty cell gap, and a table of pointers (7) in which each of them are directed so that they point to the next hole (in spatial terms). - The entire list table of pending extraction lists to "0", since initially there is no cell in any queue. It is not necessary to start the extractions list at any value because the state table already indicates that the stored values do not matter. Figure 4 graphically represents this situation, in which all addresses (8) appear at zero, indicating that there are no extractions pending. - The cell time counter starts at 0, and increases its count with each cell time on the transmission link. It is to be assumed that, in principle, non-valid cells are received, so that the counter is increased, but no cell is stored. - The connection descriptors have uncontrolled initial values, so that the first operation that the control system must perform, through the control bus, consists in programming the appropriate values in the descriptors that are used in the operation. Next, the writing automaton of the traffic shaping algorithm will be described, and for this, the initialized circuit is started as described above, from the moment in which the first cell is received and stored in its corresponding queue. The arrival of a valid cell identified as belonging to a connection for which a queue is enabled (the parameters have been programmed in the descriptor), triggers the following sequence of events: - Check the number of voids of empty cells, and if there is one, the cell is stored in the direction of the first one and subtracts 1 from the empty cell counter.

- The address of the first cell gap, where the new arrival has been stored, is copied into the descriptor as a pointer to the first and last queue cell (both), while 1 is added to the number of cells in the cell. the same, becoming 1. - The address of the next cell gap (which is extracted from the table of pointers to next) is assigned as a pointer to the first empty cell slot. - When the queue of the connection is previously empty, it is necessary to point a cell interval in the extraction list, which is done by consulting the status table of the extraction list and assigning the first empty instant from the value of the cell beat counter (which is the one that marks the timing). The graphic representation of the writing process of the first cell just described, appears in figure 5 of the drawings. In this representation appears the connection descriptor marked with the numerical reference (9), the block (10) of memory of cell gaps, the cell (11) newly arrived occupying the first gap, the assignment of the pointer (12) to the next cell gap, the representation of the table (13) of pointers to the next cell gap, and the pointer (14) assigned to the last empty cell gap. Next, in the same figure, the representation of the cell interval counter (15) by which the first free interval is reserved in the list (16) of pending extractions, and marked (as "1") in the table ( 17) status of the list of pending extractions.

When there are already cells stored in the queue of the incoming cell, the process differs slightly: - As in the previous case, the cell is stored in the first empty space (if there is one), and the number thereof is decremented. . The address of this hole, now filled in, is copied into the next pointer table, in the one assigned to the last cell stored in the queue. - The pointer to the last queue is modified with the address in which the new queue was stored, and 1 is added to the number of cells stored in the queue. - The address of the next hole in the cell (which is extracted from the table of pointers to the following) is assigned as a pointer to the first empty cell slot. In this case, it is not necessary to point to the extraction list, since as it will be seen later, the reading automaton is responsible for making said note when extracting the previous cell from the queue. An example of cell arrival when there were already others in the queue, is shown in figure 6. In this figure, other consecutive cells (18) have been placed in memory, a situation that only occurs if there is a single active connection (queue).; if there is more than one, the cells are shuffled, so that those belonging to the same queue are not consecutive, and for this reason the mechanism of the pointer table (13) is necessary to the next cell gap. With this mechanism, the empty cell gaps can be exploited by any connection, so that the available memory is distributed in an equitable way between the queues.

Referring now to the reading automaton, it is the mechanism responsible for the extraction of the cells, which is done according to the following procedure: - The status of the list of pending extractions is consulted, and if in the position assigned to the time interval corresponding to the value of the cell time counter there is some connection pointed, a cell is extracted from the tail of said connection. - To perform the extraction, the connection descriptor is consulted and the pointer to the memory hole occupied by the first cell of the same is obtained, which is extracted. Next, the table of pointers to the next cell gap is consulted, and the one of the following is assigned as a pointer to the first cell slot of the connection. In addition, 1 is subtracted from the number of queue cells. - The cell hole in which the cell that was extracted was stored, it is added to the "queue" of empty cell gaps. To do this, its address is assigned as following the pointer address to the last empty cell gap in the pointer table to the next cell gap, and its address is saved in the pointer to the last empty cell gap. The graphic representation of this process appears in Figure 7, in which the state of the address of the extraction list corresponding to the value of the cell time counter is consulted and if that address contains an extraction annotation, the information contained to extract the cell (level "1" in the pending extraction list status table); next, the cell contained in the direction of the pointer to the first queue cell gap is extracted, and the pointer to first is assigned by the next pointer of the one that was the first, as shown by the representation of pointers between the pointer. descriptor (9) and memory (10) of cell gaps, assigning the next pointer of the address of the last empty gap with the value of the direction of the gap occupied by the cell that has been extracted (pointer table (13)) a following), and the pointer (14) is assigned to the last empty gap with the address of the hole occupied by the cell that has been extracted. Next, the value of the programmed IDT is added to that of the cell interval counter and the address where the next extraction is to be aimed is obtained, as indicated by the IDT interval indicated with the reference (19). Finally, the pending extraction is noted in the list and in the state table. - Calculate the number of cell intervals that must be passed before removing a new cell from the same queue, using the cell time counter, to which the IDT value programmed in the connection descriptor is added. - The result of the operation indicates the place of the list of pending extractions in which the extraction of the next cell from the queue is recorded. It is clear, therefore, that the reading mechanism is feedback, and when a cell is removed from a queue, the moment in which the next one is to be extracted is fixed. Thus, two special situations remain pending, namely: - If the last cell of the queue is removed, the moment in which another one is to be extracted is recorded, even though there is no other cell. If at the time of extraction no new cell has arrived at that queue, there is nothing to extract, the transmission link is left empty, and a new moment for extraction is not recorded. When a cell arrives that is the first one in the queue, the writing automaton will take care of making the corresponding note, as already explained. - If the address that resulted from the calculation of the extraction list is occupied by a different attention to another queue, it is looked forward to looking for the first free cell moment, so that the IDT may be greater than the programmed, for cases of heavy traffic in the transmission link. Prior to the design of the circuit performed by this algorithm, a simulation of its behavior was performed, using traffic patterns in the transmission link corresponding to what has been identified with the "worst case" load of the link. The result of these simulations has been that the algorithm is able to function correctly in these conditions, but with the circumstance that there is a sector of the state table of the extraction list that is very busy (many annotations accumulate), and it is the one immediately following the cell time counter at each moment, as shown in figure 8.

This problem is due to the fact that when the traffic speed varies strongly with time, the queues of the connections are emptied frequently, which causes many cells to arrive in an empty queue, and they try to point their extraction in the first free space to starting from the one that marks the cell time counter (representation (c) shows a very busy extraction list, which makes it difficult to find a free time); to avoid this situation, a mechanism has been incorporated that adds a pseudo-random value to the cell time counter (representation (e)) to make this note, so that these notes of the arriving cells (representation (d)) are evenly distributed This mechanism affects the quality of the traffic molding, but only minimally and for certain traffic patterns. Once the description of the method for MTA traffic molding of the present invention has been carried out, the description of the system by means of which said method is implemented, which is preferably formed from the point of view of the present invention, will be carried out in the following. of three different circuits, namely, a specific ATS application circuit and two conventional commercial memories, in which the data structures described above are stored. The physical scheme of the system is represented in figure 9, in which the reference numbers have been assigned so that the reference (20) indicates the traffic molding circuit, and the references (21, 22) indicate, respectively, a cell memory and a parameter memory. The arrows indicate the buses corresponding to the connection between said circuit (20) and the memories (21, 22) of cells and parameters, as well as the MTA traffic input (E), the MTA traffic output (S) and the bus (C) control. Attending the memory (21) of cells, it will be composed of one or several commercial memories, and is used to store the information contained in the MTA cells, while these remain in the queue of their connection. The circuit organizes it in holes for the storage of cells (512 bits each). The circuit that has been manufactured and tested, includes 3 RAM circuits of dynamic access in burst, of 256Kx32 each, although the Integrated Application Specific Circuit (ASIC) can be programmed to use from 4Kx32 (256 cells) up to a maximum of 720Kx32 (45K cells), in steps of 4Kx32. The control of the occupation of cell gaps is carried out by means of the list of pointers to the next cell gap, this structure being stored in the parameter memory. For the memory of parameters a static RAM of 64Kx16 has been used, which has been divided into several segments to accommodate the different data structures that are needed in the process of the traffic molding algorithm, which consist of: - Chained List Control Segment: This segment contains the list of pointers to the next cell gap. There is a pointer (memory address) for each cell storage gap of the cell memory. The size assigned to this segment in the specific embodiment has been 45K, so that the maximum number of holes for cell storage in the cell memory is 45K cells (720Kx32), although with the 16 bits of data it uses This segment could be expressed up to 64K addresses.

- Pending attention segment: In this segment the list of outstanding withdrawals is stored. It has 4096 positions (as many as possible values of the cell time counter), and 8 data bits are used, in order to be able to make annotations corresponding to 256 different connections.

- Segment of Busy Instants: This segment stores the status box of the list of pending extractions. It contains a 1 bit for each position in the list, to indicate whether or not the cell extraction of any connection has to be made or not in the cell time corresponding to said position. The identifier of the connection, in particular from which the cell is extracted, is indicated in the list of pending extractions. This segment has been organized into 256 6-bit words (each data represents the state of 16 consecutive positions in the extraction list).

- Segment of Codes Descriptors: This segment contains the descriptors of each of the connections that the ATS circuit can process. You can define up to 256 different connections, and in this segment are stored the parameters related to the connection (IDT, MTA process parameters), and the variables of the control mechanism of the corresponding queues (addresses of the first and last memory gaps that they are occupied by cells of the connection, number of cells stored, maximum number of cells that are allowed for the queue, etc). Each descriptor consists of 8 16-bit words, distributed in a predetermined manner. There are 256 descriptors, so this segment occupies 2Kx16. The rest of the data structures necessary to perform the algorithm, is stored in internal registers of the circuit. These data are the following: Cell time counter, Pointer (address) to the first empty gap, Pointer to the last empty gap, and Counter of the number of empty gaps remaining in memory.

Lastly, as regards the traffic conforming circuit (20) ATS, it is subdivided internally into a plurality of blocks shown in figure 10 of the drawings. According to this representation, the following modules are observed.

- Input module (201): It is responsible for adapting the format of the UTOPIA input traffic of 16 bits of data, to the internal data format, of 32 bits of data; in addition, it extracts the identifier of the connection to which the cell belongs and the delivery to the writing automaton so that it begins the process of arriving of cells of the algorithm. There is also a direct connection between the input module and the output module for cells that can not be delayed ("real time" cells), which are not stored in the queue and which are immediately extracted to the transmission link, having been shown this connection by means of the numerical reference (202); - Input FIFO memory: It has been identified with the numerical reference (203) and consists of an intermediate data storage unit; the data delivered by the input module, although adapted to the internal format, can not be written directly into the cell memory (21), since the writing protocol in said memory does not allow it (different write clock).

- Interface module with the cell memory: This module is identified with the reference (204) and through it, the communication interface with the cell memory is centralized, taking advantage of the fact that the operations of writing and reading of cells are carried out at different time intervals. The distribution of access to the cell memory is governed by the control automaton (205), in order to be able to multiplex, in the same cell cycle, in the transmission link: a) The writing of cells stored in the FIFO memory (203) of input into the memory (21) of cells, and b) The reading of cells in the memory (21) of cells towards the output interface.

- Output module: Identified with the reference number (206), it is responsible for adapting the format of the data that is read in the external memory (21) of cells, at 32 bits and with a burst access timing, to a standard format according to a UTOPIA 16-bit interface. It also incorporates a small cell buffer for the absorption of memory bursts.

- Input (writing) automaton: It is identified by the block (207), and it is a module through which the functions of the algorithm associated with the process of cell arrival and its subsequent writing in external memory, such and as described in the previous section.

- Output PLC (reading): This block, indicated with the reference number (208), performs the functions of the algorithm associated with the output of cells, in the manner described in the previous section.

- Control automaton: This module (205) is in charge of the general government of the circuit; in it resides the cell time counter, and the cycle counter within each cell interval, to assign time windows to the input and output automats, since both work at different times of time within the cycle of time. the cell.

- Internal memory module: In the simulations, it was found that, when the traffic was very dense (very busy transmission link), to find an empty cell time in which to point the extraction of the cell, it becomes necessary to look at a very large number of consecutive positions in the list of pending extractions; in order to carry out this reading in the time of 1 cell, the disposition of this internal memory, identified by the block referenced with (209), has been foreseen, in which it has a general information of the state table of this list in internal memory.

- Restart automaton: This module (210) is responsible for performing the initialization of the necessary data structures, namely: i) initiates the linked list control segment, so that all cell gaps are assigned to the queue of empty cells, consecutively, ii) starts the segment of busy instants; Initially it should indicate that all positions are vacant.

- Microprocessor Interface Module: Identified with the numerical reference (211), it contains the circuit programming's internal registers and allows access to said registers through a standard asynchronous parallel interface known as VME. (Versa Module Eurocard).

- Interface Module with parameter memory: It appears referenced with the number (212), and provides the communication interface with the parameter memory. The foregoing corresponds only to a preferred embodiment of the invention, so that those skilled in the art will be able to deduce many modifications based on the teachings of the invention and included within its scope of protection, delimited by the following claims.

Claims (6)

NOVELTY OF THE INVENTION CLAIMS

1. - Method for MTA traffic molding, applicable to broadband telecommunication services, for handling connections associated with a large number of users, and whose function is performed on MTA links of 155 B / s, in accordance with the 16-bit UTOPIA standard, which transmits encapsulated information in the form of cells, which is characterized by a conformation algorithm for which data structures are defined that include: - cell storage holes, compartmented in a memory in which they are stored. they store all the cells, and from which each hole can be empty or contain a cell belonging to the tail of any connection; - connection descriptors, consisting of complex data structures, one per connection, containing the information relating to the control of the queues, such as the address (pointer) of the first cell gap containing one of this queue, the address of the last cell gap containing one of this queue, the number of cells that are stored in that queue, the maximum number of cells allowed for that queue, and other parameters relative to the MTA layer process, - cell time interval counter in the transmission link consists of an appropriate free account counter, which increases with each cell interval in the transmission link, and which is used as a reference for the time measurements, returning to 0 when reaching its maximum value, and whose maximum value of this counter constitutes the maximum limit for the RTD values; - list of pending cell extractions, which has a space for each value of the cell time interval counter in which the identifier of the connection from which the cell is to be extracted in that interval is stored, and so that each time a cell is extracted from a queue, the number of cell intervals that must elapse before a new cell is removed from this connection is calculated, using as a base the counter to which the IDT value is added. , and whose resulting value indicates the address of this list in which the identifier of the connection is stored to be attended when the aforementioned time interval is reached; - status table of the list of pending cell extractions, in which a "1" is presented in the address corresponding to the counter in which a cell must be extracted from a queue, and a "0" otherwise; - table of pointers ai following a cell gap, in which each cell gap in the cell memory, containing or not a cell, has a position assigned in said table, so that if the gap does not contain a cell, this address contains the next empty gap, while in case it contains a cell, this address stores the address of the cell gap that contains the next cell of the queue; - pointer to the first unoccupied cell hole, consisting of the address of the memory hole not occupied by a cell that will be used to store the next cell arriving through the transmission link, and - pointer to the last unoccupied cell hole, which stores the address of the unoccupied memory hole behind which the cell will be placed. next memory gap that is released because a cell has been extracted from a queue; - counter of the number of voids of empty cells, by means of which the count of the number of empty cell gaps that extend in memory is kept updated, and so that when that number is 0, that is to say, there are no free gaps, the cells that are received by the transmission link are discarded.

2. Method according to claim 1, characterized in that in said traffic shaping algorithm two state machines are defined that are associated, respectively, to the cell storage and that constitutes the writing automat, and to the extraction of cells and cells. which constitutes the reading automaton, being of independent action but at different times by virtue of the use by both of common resources, and of which the writing automaton, after the arrival of a first valid cell identified as belonging to a connection for which a queue, proceeding as follows: - check the number of voids of empty cells and if there are any, store the cell in the address of the first and subtract 1 from the empty cell counter; - the pointer to the first and last cell of the queue is copied into the descriptor, the address of the first cell slot in which the new arrival has been stored, and 1 is added to the number of cells in it, which passes to be 1; - the address of the next cell gap is assigned as a pointer to the first empty cell slot, which is extracted from the next pointer table; - A cell interval is recorded in the extraction list, because the connection queue was previously empty, which is done by consulting the state table of the extraction list and assigning the first empty moment to start of the value of the cell time counter that is in charge of marking the timing, while the reading automaton, in charge of cell extraction, proceeds as follows: - check the status of the list of pending extractions and if any connection pointed at the position assigned to the time interval corresponding to the cell time counter, extracts a cell from the tail of said connection; - query to carry out the extraction, the descriptor of the connection and obtain the pointer to the memory hole occupied by the first cell of the same, which is extracted; then, check the table of pointers to the next cell gap, and the one of the following is assigned as a pointer to the first cell hole of the connection, while subtracting 1 from the number of cells in the queue; - adds the cell gap in which the cell that was extracted was stored, to the empty cell gap queue, for which its address is assigned as following the pointer address to the last empty cell gap in the table from pointers to next cell gap and its address is saved in the pointer to the last empty cell gap; - calculates the number of cell intervals to be passed before removing a new cell from the same queue, using the cell time counter to which the IDT value programmed in the connection descriptor is added, and - takes the result of the operation as indicative of the place of the list of pending extractions in which the extraction of the next queue cell is noted.

3. Method according to claims 1 and 2, characterized in that when the arrival of the valid cell to the queue occurs when other previously stored cells already exist, the writing automaton proceeds in the following manner: - as in each case of empty queue, the cell is stored in the first empty slot, if there is one, and the number of gaps is decremented, copying the address of this gap now occupied in the table of pointers to next, in the one assigned to the last cell stored in the tail; - modifies the pointer to the last one of the queue with the address in which the new one was stored, and adds 1 to the number of cells stored in the queue, and - assigns the following address as a pointer to the first empty cell slot cell gap, which is extracted from the table of pointers to next, and without in this case it is necessary to make the note in the list of extractions since the reading automaton is responsible for making such a note when extracting the previous cell from The tail.

4. Method according to claims 1 to 3, characterized in that said reading automaton is fed back, and when a cell is extracted from a queue, the moment in which the next one is to be extracted is set, and two more may be presented. particular situations: - when the last cell of the queue is removed, the moment in which another cell is extracted is recorded, even if there is not one, and if the time comes when there is no cell in that queue, the transmission link will be it leaves empty and a new extraction moment is not recorded, so that when a new cell arrives, which is the first one in the queue, the writing automat is responsible for making the note, and - if the address resulting from the calculation of the list of extractions is found by an attention to another distinct queue, the first free cell moment is searched, with an IDT higher than the one programmed for those cases of heavy traffic in the transmission link.

5. Apparatus for MTA traffic molding, by means of which the method of claims 1 to 4 is implemented, characterized in that it is constituted around three concrete circuits, namely, a traffic molding circuit (20). and two memories, of cells (21) and of parameters (22), intended to store the data structures necessary for the development of the shaping algorithm, of which: - said memory circuit (21) of cells consists of one or several conventional memories, in which the information contained in the MTA cells is stored while they remain in the queue of their connection, said memory being organized in gaps for the storage of cells, and in which the control of the occupation of gaps of cell is realized by means of the list of pointers to the next cell gap, and - said memory circuit (22) of parameters is constituted, preferably, from a static RAM of capacity determined This is divided into a plurality of segments to accommodate the different data structures necessary for the traffic shaping algorithm, such division consisting preferably of: - chained list control segment, which contains the list of pointers to next cell gap, there being one pointer for each cell storage cell memory hole; - Pending attention segment, in which the list of pending extractions is stored; - segment of occupied instants, which stores the state table of the list of outstanding extractions, this list of pending extractions also contains the identifier of the particular connection from which the cell is extracted, and -segment of queue descriptors, the which contains the descriptors of each of the connections that can be processed by the traffic molding circuit, and which will preferably be up to 256 different connections, and in this segment the parameters related to the connection and the variables of the control mechanism of the corresponding tails.

6. Apparatus according to claim 5, characterized in that said traffic shaping circuit (20) incorporates a plurality of internal blocks, conveniently interconnected with each other, and basically consists of: - an input module (201), by means of which the adaptation of the format of the incoming traffic to the internal data format is carried out, and by means of which the identifier of the connection to which the cell belongs is also extracted and delivered by the writing automaton so that the latter begins the process of cell arrival of the algorithm, having also provided a direct connection between said input module and an output module (206) for those cells that can not be delayed (cells "in real time"), without being stored therefore in the queue, and that are immediately extracted to the transmission link; - an input FIFO memory module (203), which constitutes an intermediate data storage unit; - a module (204) for interfacing with the cell memory (21), in which the communication interface with the cell memory is centralized, taking advantage of the fact that the writing and reading operations are performed at different time intervals, and whose access distribution to the cell memory (21) is governed by the control automaton (205) in order to be able to carry out the multiplexing, in the same cell cycle in the transmission link, both of the writing of cells stored in the memory (203) FIFO input in the cell memory, such as the reading of cells from the cell memory towards the output interface; - output module (206), by means of which the adaptation of the format of the data read in the external memory (21) of the cells is performed, at a determined speed and with a burst access timing, to a standard format according to a certain UTOPIA interface, and said module further comprising a small cell buffering unit for the absorption of memory bursts; - input (writing) automaton (207), by means of which the algorithm functions associated with the cell arrival process and its subsequent writing in the external memory (21) are performed; - output (reading) automaton (208), where the functions of the algorithm associated with the cell output are performed; - control automaton (205), which is responsible for the general governance of the circuit, and in which resides the cell time counter and the cycle counter within each cell interval, in order to assign time windows to the input (207) and output (208) automata; - module (209) of internal memory, by which, in case of very dense traffic (very busy transmission link), you can find an empty cell time in which to point the extraction of the cell, checking a very high number of consecutive positions in the list of pending extractions in the time of 1 cell, for which there is a general information of the state table of this list in said internal memory; - restart automaton (210), by means of which the initiation functions of the chain-linked control segment can be carried out, so that all cell gaps are assigned to the queue of empty cells, consecutively, and of initiation of the segment of busy moments, with initial indication that all provisions are unoccupied; - module (211) of microprocessor interface, in which the internal circuit programming registers are contained and which allows access to said registers through an appropriate standard asynchronous parallel interface, and - memory interface module (212) of parameters, and by means of which the communication interface is provided with said parameter memory (22).