MXPA98010855A - Arc fault detector with switch circuit and early fault detection - Google Patents

Abstract

An arc fault detector considered as an independent unit and in combination with a ground fault circuit interrupter (GFCI) operates to provide protection from potentially dangerous arc fault conditions. When combined with a ground fault circuit interrupter, the combination of arc fault / ground fault circuit interrupter (AFCI / GFCI) provides protection for both arc fault and ground fault conditions. A single transformer is used to detect faults between neutral earth and arc faults. An impedance divides the current flow into two portions to generate differential current proportional to the current flowing through the conductors. An early arc detector periodically tests the AC line to determine high impedance between the device and a main circuit breaker panel. The arc fault interrupter / ground fault circuit interrupter device detects both the alternating current line frequencies and the high frequencies associated with arcing. Both the average and instantaneous values of the arcing signals of both the AC line frequency and the high frequency are processed to generate an arc fault signal. The disositive allows the arc detector to differentiate between high-level destructive arcing and low-level arcing such as that generated by typical household appliances and equipment. This serves to decrease the occurrence of the false disconnection. The device also includes a timer circuit, which allows the user to temporarily disable the arc detector, and includes communication means to allow the device to communicate the occurrence and location of the arc fault to a centralized monitoring station.

Description

ARC FAULT DETECTOR WITH CIRCUIT SWITCH AND EARLY FAULT DETECTION FIELD OF THE INVENTION The present invention relates to an apparatus and method for early (early) detection of arc faults and more particularly relates to an apparatus and method for both an early independent arc fault detector and an early detector. of arc fault combined with a circuit breaker device.

BACKGROUND OF THE INVENTION Circuit breakers, fuses and ground fault circuit interrupters (GFCI) are commonly used devices to protect people and property from dangerous electrical faults. However, there are still deaths and loss of property caused by electrical faults that are not detected by these protective devices. One of these types of electrical failures that are typically not detected are arc faults. The arcs are potentially dangerous due to the high temperatures contained in them. Thus, they have a high potential to create damage, mostly through the initiation of fires. However, it will only disconnect a ground fault circuit interrupter if it produces sufficient spill current to ground. In addition, an arc will disconnect a circuit breaker only if the current, which flows through the arc, exceeds the disconnect parameters of the thermal / magnetic mechanism of the circuit breaker. Therefore, an additional type of protection device is needed to detect and interrupt arcs that do not meet these criteria. An arc detector whose output is used to activate a circuit breaker mechanism is known as an arc fault circuit interrupter (AFCI). According to the Consumer Product Safety Commission (CPSC) in 1992, it was estimated that "there were 41,000 fires involving domestic electrical wiring systems ... which resulted in 320 deaths, 1,600 injuries and $ 511 million in loss of property in the United States. "The Consumer Product Safety Commission further stated that" an electrically caused fire may occur. if the electrical energy is unintentionally converted into thermal energy and if the heat thus generated is transferred to a combustible material at such a speed and for a time such as to cause the material to reach its ignition temperature. "The two main causes of Unintentional conversion of electrical energy to heat is excessive current and tonnage.Automatic circuit breakers and fuses are currently available to mitigate excessive current results, but there is no commercial system to mitigate tonnage.A dangerous condition can always develop that there is prolonged arching regardless of whether it involves energy lines industrial, commercial or residential. However, mobile homes and especially homes with outdated wiring systems are particularly vulnerable to fires that are started due to electrical causes. Studies by the Consumer Product Safety Commission have shown that the frequency of fires in the wiring system is disproportionately high in homes built more than 40 years ago. The causes of tonnage are numerous, for example: insulators or old or worn cables; mechanical and electrical stress caused by overuse, electric currents or lightning; loose connections, - and excessive mechanical damage to insulators cables. Two types of tonnage are presented in residential and commercial buildings: contact tonnage and line tonnage. The contact arc (or series) is presented between two contacts in series with a load. Therefore, the load controls the flow of current in the arc. The line tonnage (or parallel) occurs between lines or a line to ground.

Thus, the arc is in parallel with any present charge and the source impedance provides the only limit for the current flowing in the arc. It is important for any detection system to be able to detect both contact and line tonnage and act appropriately depending on the severity of the arc. An example of contact arcing is illustrated in Figure 1. The conductors 114, 116 comprising the cable 110, are separated and surrounded by an insulator 112. A portion of the conductor 114 is broken, creating a series of recesses 118 in the conductor 114. Under certain conditions, tonnage will occur through this gap, producing a large amount of localized heat. The heat generated by the arc could be enough to disintegrate and carbonize the insulation near the arc 119. If the arc is allowed to continue, enough heat will be generated to start a fire. A schematic diagram illustrating an example of line arcing is shown in Figure 2. The cable 120 comprises the electrical conductors 124, 126 covered by the external insulator 122 and separated by the internal insulator 128. The deterioration or damage to the internal insulation 121 may cause a line fault arcing 123 between the two conductors 124, 126. The internal insulator could have been charred by an earlier beam that fell into the wiring system, or it could have been cut by mechanical action such as a cut by a metal leg of a chair on an extension cord. The potentially devastating results of arcing are widely known and numerous methods for detecting arcs in the prior art have been developed. A large percentage of the prior art relates to detecting the high frequency signals generated in the alternating current line by arcs. Figure 3 shows the wide spectrum noise 162 produced in the alternating current line by an arc. It is superimposed on the voltage of the AC line 164. An analysis of the arc waveform, using a frequency spectrum analyzer, shows that the overtones and high frequency harmonics contained within the waveform extend well in the GHz range. A graph illustrating the frequency spectrum analysis of the waveform 162 shown in Figure 3 is shown in the Figure. A major problem associated with any type of arc detection is false disconnection. False disconnection occurs when a detector produces a warning output, or disconnects a section of the wiring from the source of voltage, when there is not really a dangerous arcing condition. Two main causes of false disconnection are the calibration of normal devices and the input currents created by inductive and capacitive devices. These two situations generate high frequency signals in the power line that are very similar to those generated by dangerous tonnage. Thus to be viable commercial devices, the arc detectors must be able to distinguish tonnage signals from the signals created by the use of normal devices. There is a wide range of prior techniques in the field of arc detection. Some previous techniques refer to specialized cases of tonnage. For example, in U.S. Patent Number: 4,376,243, issued to Renn, et al. Teaches a device that operates with direct current. U.S. Patent Number: 4,658,322, issued to Rivera, shows a device that detects tonnage within a closed unit of electrical equipment. U.S. Patent Number: 4,878,144, issued to Nebon, shows a device that detects the light produced by an arc between the contacts of a circuit breaker. In addition, there are several patents that relate to detecting arcs in alternating current power lines that describe various methods of detecting high frequency arcing signals. For example, Patents of the United States of North America Numbers: 5,185,684 and 5,206,596, both issued to Beihoff et al, employ a complex detection means that separately detects the electric field and the magnetic field produced around a wire. U.S. Patent Number: 5,590,012, issued to Dollar, teaches measuring the high frequency current in a derivative path around an inductor placed in the line, which may be the magnetic disconnect mechanism of a circuit breaker. In a second detection circuit, proposed by Dollar, the high-frequency voltage signal is extracted from the line via a high-pass filter placed in parallel with any load. Various methods can be found in the prior art to authenticate the tonnage and to differentiate tonnage from other sources of noise. Much of the prior art involves processing and analyzing complicated signals. U.S. Patent Number: 5,280,404, issued to Ragsdale, teaches how to look for series tonnage by converting the tonnage signals into pulses and counting pulses. In addition, several patents detect the tonnage by taking the first derivative or the second derivative of the detected signal. For example, U.S. Patent Number: 5,224,006, issued to MacKenzie et al., And U.S. Patent Nos. 5,185,684 and 5,206,596, issued to Beihoff et al., Describe this device. Blades uses several methods to detect arcs as described in the Patents of the United States of America Numbers: 5,223,795, 5,432,455 and 5,434,509. The device Blades is based on the fact that the detected high frequency noise may include gaps at each junction with zero, that is, half cycle, of the alternating current line. To differentiate the arcing from other sources of noise, the Blades device measures the randomness and / or bandwidth characteristics of the detected high frequency signal. The device shown by U.S. Patent Number: 5,434,509 uses the rapid rise edges of the arc signals as a detection criterion and detects the short high-frequency bursts associated with intermittent arcs. U.S. Patent Number: 5,561,505, issued to Zuercher et al., Discloses a method for detecting tonnage by capturing changes from cycle to cycle in the AC line current. Differences in samples taken at the same point in the alternating current cycle are then processed to determine if arcing is occurring.

SUMMARY OF THE INVENTION The arc detector of the present invention operates to monitor and capture the line voltage and current present in the alternating current power line to determine the occurrence of arcing. Both the high frequency energy and the power of the AC line frequency are used in the detection of arc faults. The detector output can be used to activate a circuit breaker mechanism, sound an audio alarm and / or alert a central monitoring station. The present invention uses a single transformer as a neutral fault detector and as an arc fault detector. This is accomplished by separating one of the wires passing through the ground / neutral transformer of the ground fault circuit interrupter in parallel paths so that a small portion of the current in the wire flows around the transformer. A differential current is then produced in the coil that is proportional to the current flowing through the alternating current line. The differential current is collected by the earth / neutral transformer and is available for further processing. Thus, the ground / neutral transformer can be used as part of the arc detection circuit. The differential current generated in the ground / neutral coil is relatively small, so the ground fault and earth fault / neutral fault detection capabilities of the ground fault circuit interrupter are not affected. The use of the same coil for two purposes provides just integration between the circuits of the ground fault circuit interrupter and the arc fault circuit interrupter. The present invention also includes an early arc detection circuit capable of detecting high impedance in the alternating current line. Conventional line testers typically load the AC line in order to detect high impedance in the AC line at a particular time in time. The present invention uses a hard cable test circuit, which periodically tests the alternating current line with a controlled load. The circuit ensures that the line is charged for only a short period when the AC line voltage is low, thus keeping the energy dissipation in the device low. Using this method, high impedance points on the line can be detected, which can lead to dangerous heat and arc, before dangerous arcing occurs. The early arc detection circuit works to generate impulses proportional to the impedance of the line to determine the impedance of the alternating current line. An inductor / capacitor network is used to generate proportional pulses in size to the down in line voltage caused by the introduction of a controlled charge. The voltage drop itself is proportional to the impedance of the line between the arc fault / ground fault current interrupter (AFCI / GFCI) and the AC voltage source. The arc detector of the present invention can be implemented as a stand-alone device or can be implemented in combination with an existing circuit interrupter device. The term "circuit interruption device" is defined to mean any electrical device used to interrupt the flow of current to a load and includes, but is not limited to devices such as Ground Fault Circuit Interrupters, Immersion Detection Circuit Switches (IDCI) or Apparatus Outlet Circuit Switches (ALCI). A principal feature of the arc detector of the present invention is that it combines an arc detector, i.e., an arc fault circuit interrupter (AFCI) with other types of circuit interrupter devices such as a fault circuit interrupter. Ground to create a multi-purpose device AC / ground fault current interrupter. In the case of a ground fault circuit interrupter, the arc detection circuit can be placed inside the same silicon chip typically used in current ground fault circuit interrupter devices. Undoubtedly, some of the pins of the commonly used ground fault circuit interrupter circuits can be converted for multi-function operation. The arc fault circuit interrupter can obtain power from the same power supply that provides power to the circuit breaker device. This combined approach results in reduced manufacturing costs. The mechanical parts of the circuit breaker device such as the disconnect relay and the mechanical contact lock mechanism now serve dual purposes. Furthermore adding the circuit of the arc fault circuit interrupter to an existing circuit interruption device is a logical enhancement of these devices today. In particular, it is logical to enhance a ground fault circuit interrupter with an arc fault circuit interrupter circuit since a ground fault circuit interrupter can detect arcing in certain situations that include any condition by which an arc produces spill current to earth. In the arc fault / ground fault current interrupter device of the present invention, the current waveform present in the alternating current line is extracted via a toroidal current to the voltage transformer that is shared with the voltage device. circuit interruption. An impedance divides the current flow into two portions in a manner that generates differential current proportional to the current flowing through the line conductors. The voltage that is generated through the coils of the transformer is fed to two separate paths. In the first path, the line frequency content of 50 or 60 Hz of alternating current from the transformer output is filtered from the input signal. This AC line frequency signal provides an indication of the amount of current flowing through the AC power line. In the second path, the high frequency content of the transformer output is filtered from the input signal. The high frequency signal is indicative of the level of tonnage present in the AC power line. Within each of the two trajectories, the signals are filtered by a second stage filter and then rectified. Each of the two rectified signals is divided to produce peak and average levels for the AC and high frequency line frequency signals. Excessively high peaks in either the alternating current line frequency or the high frequency path instantaneously cause the earth fault / arc fault current relay mechanism to trip, disconnecting the load from the power source. The absolute average levels of the AC and high frequency line frequency signals are converted to a direct current potential and compared to a set of previously defined voltages. If the average high frequency signal is greater than the expected level of normal apparatus tonnage at the associated average alternating current line frequency level, then an output signal is generated. This output signal is then used to disconnect the device or produce an alarm while both are controlled via a chronometer mechanism. A user can disable the function of the arc fault circuit interrupter temporarily or permanently so that devices with normally high arc levels, such as arc welders, can be operated without disconnecting the arc detector. The detection of high AC line frequency or high average frequency line signals causes the device to immediately disconnect. This immediate disconnection can not be disabled via the chronometer mechanism described above. In addition, the ground fault protection mechanism and the detection of excessive arc current and AC line current can not be disabled. This is so that the user is continuously protected from potential hazards associated with these conditions. An advantage of the present invention is that by separating the detection of the AC line current and the high frequency energy generated by the arc, increasing noise immunity is provided. The arc detection device detects the current flowing in the alternating current line through a wide range of frequencies. By separating the two components of the current signal and setting a maximum allowed level of high frequency component for a given level of alternating current line current, the arc detector provides increased immunity to noise. In addition, the arc detector of the present invention simultaneously performs average and peak detection of the alternating current line current and the high frequency arc signal. The high frequency and high frequency alternating current line arc signals are detected to provide immediate response at large increments in either the arc current or the alternating current line. The arc detector will disconnect the relay instantly when either the peak AC line current signal or the peak high frequency arc signal crosses a predetermined threshold. The arc detector also incorporates a quick disconnect circuit which operates to open the relay when excessive levels of arcing of AC line current and high frequency are detected. If either the average alternating current line current or the average high frequency arcing signal rises above a level considered dangerous, the device will disconnect very quickly. The maximum level allowed for the average AC line current is 1.5 times the current of the calculated AC line. The limit set for the average high frequency signal is an average level of tonnage known to be dangerous. When the average AC line and high frequency signal line current levels are lower than their respective maximums, the arc detector uses several disconnect levels for arcing, depending on the level of the average alternating current flowing. In addition, the arc detector disconnects at a slower speed at those lower and thus less dangerous levels. This slower disconnect response time provides noise immunity against noise and short-lived arcs, such as those generated when a switch is tipped. By incorporating several disconnection times, depending on the level of arcing detected, the arc detector can extinguish dangerous arcs quickly while providing high noise immunity for lower level arcs. The arc detector also incorporates an automatic deviation timer to allow otherwise normally safe arcing. Instead of including a fixed on / off switch, which would work to enable or disable the entire arc detector, the present invention incorporates a logic switch. This logic switch provides the user with the option of disabling the arc detector for as long as the switch is off or disabling the arc detector temporarily while the arc-striking devices are in use. This allows the use of devices that normally generate large amounts of arcing that would otherwise cause the arc detector to disconnect. When the arc detector is temporarily disabled, it automatically returns to the enabled state after the device has been disconnected. This scheme has the advantage that the device can not be accidentally disabled permanently by the user. An important feature of this scheme is that the tonnage apparatus can be turned on and off within the given time period without disconnecting the arc detector. In addition, the arc detector includes circuits for transmitting messages over the alternating current power line using any power line carrier system by accurately determining the location of the arc fault. The present invention incorporates a communications circuit, which utilizes a power line carrier signal such as that generated by the CCS product line manufactured by Leviton Manufacturing, Little Neck, New York. Using well-known energy line bearer techniques the arc detector can communicate with other devices such as a monitoring station. Each arc detector would have a unique address. A relationship is then established between the address assigned to the arc detector and its location. When an arc fault is detected, a signal is sent over the power lines to a monitoring station which alerts the staff not only to the occurrence of the arc fault but also to its location. This is especially useful if the arc fault / ground fault current interrupter device is installed at a remote location. This feature has applicability in industrial and commercial locations where arc fault monitoring is required over a complex alternating current electrical wiring system. Today, AC power lines are not only used to supply AC line current but are also used as a means of communications as in Leviton Manufacturing's CCS line of carrier devices for power line carriers, CEBus compatible devices, LonWorks compatible devices, intercom-based power line carrier, television signal transmission / reception equipment, telephone communication devices, and so on. The arc detector of the present invention incorporates a filter circuit that allows the detection of arc faults at the same time that communications are occurring on the AC power lines. The filter circuit works to remove frequencies below 500 KHz. At the other end of the frequency spectrum, although the tonnage generates frequencies in the GHz range, for simplicity, efficiency and reduced cost the arc detector of the present invention limits the detection of high frequency signals at approximately 20 MHz.

BRIEF DESCRIPTION OF THE DRAWINGS The invention is described herein, by way of example only, with reference to the accompanying drawings, wherein: Figure 1 is a schematic diagram illustrating an example of contact tonnage in a carrier conductor of current. Figure 2 is a schematic diagram illustrating an example of a line arcing between two current-carrying conductors, - Figure 3 is a graph illustrating wide-spectrum noise due to the EMF voltage generated by an arc propagating on the power line which is shown superimposed on the voltage of the alternating current line. Figure 4 is a graph illustrating the frequency spectrum analysis of the waveform shown in Figure 3. Figure 5 is a schematic diagram illustrating an example of a ground fault circuit interrupter device of the prior art . Figure 6 is a high-level block diagram illustrating the combination of the arc fault detecting device and ground fault circuit interrupter of the present invention. Figure 7 is a schematic diagram illustrating the portion of air failure / ground fault current interrupter circuits of the more detailed arc fault detection device of the present invention. Figure 8 is a high-level block diagram illustrating the portion of early detection circuits of the present invention in more detail. Figure 9 is a schematic diagram illustrating the early arc detection circuit in more detail. Figure 10 is a graph illustrating several waveform traces within the early arc detection circuit. Figure HA is a graph illustrating the voltage "VRECT over a complete cycle of the alternating current cycle." Figure 11B is a graph illustrating the VRECT voltage in more detail with respect to zero crossing for an alternating current line. has relatively low impedance; Figure 11C is a graph illustrating the voltage "VRECT in more detail with respect to the zero crossing for an alternating current line having relatively high impedance Figure 12A is a graph illustrating the voltage present at the Z node superimposed on the voltage Vjygrj over a complete cycle of the current cycle Figure 12B is a graph illustrating the voltage present at the Z node superimposed on the voltage ^ g (- during the activation of the SCR for an alternating current line having relatively low impedance) Figure 12C is a graph illustrating the voltage present at the node Z superimposed on the voltage j and grjx during the activation of the SCR for an alternating current line having relatively high impedance Figure 13 is a schematic diagram illustrating the high frequency circuit portion of the detection device arc failure of the present invention in more detail Figure 14 is a schematic diagram illustrating the portion of the circuit of the arc fault detection device of the present invention in greater detail. Figures 15a, 15B and 15C are schematic diagrams illustrating the arc detection circuit portion of the arc fault detection device of the present invention in greater detail. Figure 16 is a graph illustrating the fast-time inrush current for an incandescent lamp charge of 15 A. Figure 17 is a schematic diagram illustrating the portion of the chronometer circuit of the arc fault detection device. the present invention in greater detail. Figure 18 is a schematic diagram illustrating the local / remote inhibition circuit portion of the arc fault detection device of the present invention in more detail.

DETAILED DESCRIPTION OF THE INVENTION Earth fault circuit interrupters (GFCI) are electrical devices well-known in common use today. They are used to help protect against electric shock due to ground faults. A ground fault circuit interrupter is basically a differential current detector operative to disconnect a contact mechanism when 5 mA or more of unbalanced current is detected between the phase wire (hot or 0) and the neutral wire (N) of a line of alternating current electric power. The unbalanced current detected is assumed to be flowing through a human who accidentally touches the phase wire. The current flows through the human to ground instead of returning through the differential transformer via the neutral wire, thus creating the current imbalance described above. It should be noted that, not only the current through a human, but an apparatus with inherent spillage to earth of 5 mA or more, would also disconnect the ground fault circuit interrupter and disconnect the current to the load. A schematic diagram illustrating an example of a ground fault circuit interrupter device is shown in Figure 5. The typical ground fault circuit interrupter of the prior art, generally referenced 12, comprises two current transformers consisting of magnetic cores 48, 50 and coils 52, 54, respectively, coupled to the integrated circuit 40 which may comprise the LM1851 manufactured by National Semiconductor. The alternating current energy of the phase 14 and neutral conductors 16 is full-wave rectified via a full-wave rectifier comprising the diodes 20, 22, 24, 26. A varistor (MOV) of metal oxide 18 is placed at through the phase and the neutral for protection. The bridge output is coupled through a relay coil 30 in series with the parallel combination of a silicon controlled rectifier (SCR) 32 and a capacitor 28. The gate of the silicon controlled rectifier is coupled to ground via the capacitor 38 and pin 1 of IC 40. A diode 70 is placed through coil 52 which is coupled to pins 2 and 3 via resistor 62 and capacitors 64, 60. Pin 3 is also coupled to ground via capacitor 36. The coil 54 is coupled to pins 4 and 5 of the integrated circuit 40 via the capacitors 58, 56. The plug 4 is also coupled to ground. The plug 6 of the integrated circuit 40 is coupled to the plug 8 via the resistor 44 and the plug 7 is coupled to ground via the capacitor 42. The plug 8 is also coupled to the capacitor 34 and the resistor 46. The voltage on the plug 8 It serves as the 26V supply voltage for the ground fault circuit interrupter circuit. The electrical conductors on the line side, phase 14 and neutral 16, pass through the transformers to the phase and neutral load side conductors. A relay, consisting of switches 66, 68, associated with the phase and neutral conductors, respectively, operates to open the circuit in the event that a fault is detected. The switches 66, 68 are part of a double-release relay that includes a coil 30. The coil 30 in the relay is energized when the ground fault circuit interrupter circuit turns on the silicon controlled rectifier (SCR) 32. In addition , the ground fault circuit interrupter 12 comprises a test circuit comprised of the momentary push button switch 49 connected in series with a resistor 15. When the switch 49 is depressed, a temporary simulated earth fault, i.e. Temporary differential current path, from phase to neutral is created in order to test the operation of the ground fault circuit interrupter 12.

A high-level block diagram illustrating the arc fault / circuit breaker device of the present invention is shown in Figure 6. For illustrative purposes only, the following description is in the context of a combination switch device. arc fault circuit / ground fault circuit interrupter (AFCI / GFCI). It will be appreciated by those skilled in the electrical arts that other types of circuit breaker devices such as IDCI or ALCI may also be combined with the arc fault detector. The arc fault / ground fault current interrupter device, generally referenced 180 and below in the present so-called device, comprises arc fault / earth fault current interrupter circuits 182, the early detection circuit of arc 183, the alternating current line frequency circuit 200, the high frequency circuit 188, the arc detection circuit 198, the local / remote inhibition circuit 184 and the chronometer circuit 186. The fault current circuit circuit arc / ground fault 182 generally comprises a standard ground fault circuit interrupter device in addition to several components that are shared between the arc fault circuit breaker portions and the ground fault circuit interrupter of the device. The device is a four-terminal device comprising terminals on the phase and neutral line side as well as terminals on the phase and neutral load side. Normally, the device is coupled to an electrical wiring system or network with the terminal on the phase and neutral line side connected to an AC power source. The terminals on the phase and neutral load side are connected to electrical devices located downstream of the device. Each of the components of the device 180 is described in more detail hereinafter, starting with the arc fault / earth fault current interrupter circuit. A schematic diagram illustrating the arc fault / ground fault current interrupter circuit portion of the arc fault detection device of the present invention in more detail is shown in Figure 7. A fault circuit interrupter of Earth is an electrical device that works to detect hazardous ground conditions in consumer and industrial environments. An unbalanced current through the differential transformer 233 is picked up by the circuit. If the current imbalance is above a specified threshold, which has been determined to be hazardous to personnel or machinery, the integrated circuit (IC) 225 activates the silicon controlled rectifier 224. The silicon controlled rectifier 224, at its once, it activates the coil 218 of a relay circuit breaker comprising the phase contacts 231 and the neutral contacts 232 thus disconnecting the source of electrical energy from the load. When the ground fault circuit interrupter circuit detects the existence of a ground fault, the signal line ACTIVA_GFCI becomes active. In this way the circuit protects users from harmful or lethal electric shocks. The activating circuit of the silicon controlled rectifier 236 has five activating inputs, ACTIVA_GFCI, ACTI A_CRONOMETER, ACTIVA_ARCO_PRECOZ, IMPULSO_ARCO_PRECOZ and ACTIVA_ARCO. Normally the five activating signals are in an inactive state. However, any of the five activating inputs upon activation will cause the silicon controlled rectifier activating circuit to ignite the silicon controlled rectifier 224. A second differential transformer 234 within the arc fault / ground fault current interrupter circuit is provided. to detect a low impedance condition between the wire neutral on the loading side and earth. A neutral impedance / low ground connection allows a ground fault current to be spilled from the ground to the neutral wire passing through the differential transformers. This reduces the sensitivity of the ground fault circuit interrupter and potentially allows for lethal ground faults without disconnecting the ground fault circuit interrupter. If the impedance of the neutral / ground connection becomes too low, the IC 225 activates the silicon controlled rectifier 224 via the ACTIVA_GFCI signal, thus disconnecting both the phase and the neutral of the load. As previously described, the neutral / earth transformer 234 is used to detect ground to neutral faults and is designed specifically for that purpose. In the present invention this transformer is used to perform two functions simultaneously. To detect ground faults, this transformer is used in a differential mode. The sum of the currents, in the two wires that pass through its center, is zero in the absence of a ground fault or a ground / neutral fault. However, when creating a deviation, via impedance 229 placed in parallel with one of the alternating current wires (the phase line was chosen for this example), the net output of the secondary transformer is proportional to the current flowing in the line of alternating current. The signal in the secondary, which is an accurate representation of the current in the alternating current line through a wide range of frequencies, is fed via the capacitor 226 and the resistor 227 to the input of the low pass filters and of line frequency of alternating current. Parallel impedance 229 is effective to divert only a very small amount of the total current, which normally flows through the alternating current lines. The normal operation of the ground fault circuit interrupter circuit is not affected since differential current is generated only in the ground / neutral transformer 234 and not in the differential transformer 233. If the impedance 229 is purely resistive, for example, a resistor or a thin wire less than 1 ohm, the frequency response of the earth / neutral transformer 234 is not affected. Conversely, a capacitive impedance will substantially affect the frequency response of the transformer. Therefore, by choosing different reactance values for the deviation impedance, the frequency dependence of the detection can be optimized as desired. In particular, the arc fault / ground fault current interrupter circuit, generally referenced 182, comprises two current transformers consisting of magnetic cores 233, 234 and coils 235, 269, respectively, coupled to integrated circuit 225 which may include LM1851 manufactured by National Semiconductor or RA9031 manufactured by Raytheon. The alternating current energy of the phase 14 and neutral conductors 16 is rectified in whole wave via a whole wave rectifier comprising the diodes 211, 212, 213, 214. A metal oxide varistor (MOV) 210 is placed at through phase and neutral for overvoltage protection. The voltage output of the bridge, represented as ^^ - j-, is charged by the resistor 215 to ensure that the voltage at j ^ cj falls to a low voltage at the zero crossing of the alternating current line. The diode 216 allows the current to flow from VREQT to energize the arc fault / ground fault current interrupter circuit while ensuring that the direct current elements of the power supply do not effect the voltage in VRECT- The cathode of the diode 216 is coupled with relay coil 218 and low voltage resistor 221 as in the prior art ground fault circuit interrupter of Figure 5. In addition, the series combination of resistor 220 and capacitor 219 they are connected in parallel with the relay coil 218. The silicon controlled rectifier 224 and the variable resistor 223 are coupled in series with the relay coil. The capacitor 217 raises the available energy to the device while the silicon controlled rectifier is open circuit. The gate of the silicon controlled rectifier is coupled to the output of an activating circuit of the silicon controlled rectifier 236. The output of the pin 1 of the integrated circuit 225 forms one of the inputs to the activating circuit of the silicon controlled rectifier 236. The output of plug 1 of integrated circuit 225 forms one of the inputs to the activating circuit of the silicon controlled rectifier 236.

A diode 245 is placed through coil 235 which is coupled to pins 2 and 3 via resistor 247 and capacitors 239, 249. Pin 3 is also coupled to ground via capacitor 251. Coil 269 is coupled to pins 4 and 5 of integrated circuit 225 via capacitors 237, 238. Pin 4 is also coupled to ground. The plug 6 of the integrated circuit 225 is coupled to the plug 8 via the resistor 241 and the plug 7 is coupled to ground via the timer capacitor 243. The plug 8 is also coupled to the capacitor 222 and the resistor 221. The voltage on pin 8 serves as the 26V supply voltage for the ground fault circuit interrupter circuit. The supply of 26 V is coupled with a resistor 259 and a zener diode 261 which operates to generate a lower supply voltage Vcc for use by the internal circuit of the arc fault / ground fault current interrupter. The electrical conductors on the line side, phase 14 and neutral 16, pass through the transformers to the phase and neutral load side conductors. A relay, consisting of switches 231, 232, associated with the phase and neutral conductors, respectively, operates to open the circuit in the event that a ground fault is detected. The switches 231, 232 are part of a double throw relay which includes the coil 218. The coil 218 is energized when the arc fault / ground fault current interrupter circuit turns on the silicon controlled rectifier 224. In addition, the circuit comprises a test button comprised of the momentary push button switch 228 connected in series with a resistor 230. When the switch 228 is depressed, a temporary simulated ground fault is created from phase to neutral in order to test the operation Of the device. The standard ground fault circuit interrupter circuits are in widespread use today and numerous patents have been issued describing various methods of ground fault circuit interrupter operation. Detailed descriptions of ground fault circuit interrupter circuits can be found, for example, in U.S. Patent Number: 5,202,662, issued to Bienwald et al. It is believed that a novel feature of the present invention is the incorporation into a circuit ground fault circuit interrupter device necessary to detect arc faults. The remainder of this document describes the arc detection circuit (AFCI) in greater detail. Note that the arc fault circuit interrupter and earth fault circuit interrupter circuits operate to interrupt the alternating current power by opening two sets of contacts 231, 232 via the actuation of a relay coil 218. The relay coil is activates the 224 silicon controlled rectifier via the silicon controlled rectifier 236 activator circuit. Although some of the circuits of the arc fault circuit breaker or ground fault circuit interrupter circuit can activate the silicon controlled rectifier 224 , its activation signals are isolated from each other. The activating circuit of the silicon controlled rectifier operates to provide a "0" type logic operation to activate the silicon controlled rectifier 224 using thyristor activating techniques when one of its five input activators is activated ACTIVA_GFCI, ACTIVA_CR0N0METR0, ACTIVA_ARC0_PREC0Z, IMPULS0_ARC0_PREC0Z and ACTIVA_ARCO . The early (precocious) arc detection circuit of the present invention will now be described in greater detail. A schematic diagram illustrating the arc early detection circuit portion in greater detail is shown in the Figure 8. In order to evaluate the quality of the electrical connections that lead to the main "power", the AC line is subjected to a load condition. For example, if the wire leading to the circuit breaker is connected "weakly", the normal impedance of the alternating current line, which is of the order of 0.01 to 0. 05 ohms, it can potentially increase a hundred times. This situation is not easily detectable by a user, if devices with low power consumption are used. However, when a heavy load, such as an air conditioner that pulls 15 to 20 A is connected to a "weak" or high impedance power line, the weak or loose connection will dissipate heavily. Remember that the dissipated energy is given by the following expression. P = I2R where P represents energy, I represents current and R represents resistance. Thus, with a load of 20A and a supposed "weak" 2-ohm bonding resistance, the energy P dissipated by the joint will be 800 W. This situation will lead to a point-like heating of the loose joint which can not only lead to arc but creates a great possibility of fire. To alleviate that problem, the arc early detection circuit 183 functions to periodically test the line to determine its integrity, i.e., the impedance source is measured. In the example circuit presented here, the test is performed every half cycle of the alternating current or every 8.3 milliseconds. The circuit uses the silicon controlled rectifier which is present in the ground fault circuit interrupter circuit and works to disconnect the load from the alternating current source when a ground fault is detected. Poor line integrity is detected by generating a pulse that is directly proportional to the source impedance of the power line. This capability is very useful when testing the circuit quality of the branch to which the arc fault / ground fault current interrupter device is connected. With reference to Figure 8, to assist in understanding the principles of the present invention, the early arc detection circuit 183 is shown together with a portion of the ground fault circuit interrupter circuit shown in Figure 7. It is intentionally has left out the remaining circuit of Figure 7, for reasons of clarity. The arc early detection circuit 183 comprises a pulse generating circuit 690 coupled to a voltage divider formed by a resistor 556 and a thermistor 554. The output of the voltage divider is also connected to the 26 V supply via the diode 604. The voltage divider comprising the variable resistor 553 and the fixed resistor 555 is coupled through the inductor 550. A capacitor 557 is connected in parallel through the resistor 555. The output of the pulse generator circuit 690 IMPULSO_ARCO_PRECOZ forms one of the five inputs to the silicon controlled rectifier trigger circuit 236. The output of the pulse generator is also input to decision logic 692. The other two inputs comprise the sliding contact terminal on the variable resistor 223 coupled to the cathode of the silicon controlled rectifier. 224 and the voltage across the resistor 555. In general, the operation of the arc early detection circuit is as follows EU. In the downward portion of the rectified alternating current line, a short duration chronometer pulse is generated which activates the silicon controlled rectifier 224. The pulse generator 690 is deactivated throughout the remainder of the half cycle in order to avoid unwanted activation of the silicon controlled rectifier. The pulse duration time is calculated so as not to activate the relay coil 218 sufficiently to open the contacts. Activation of the silicon controlled rectifier is initiated when the voltage on the alternating current line reaches approximately 15 V. At this time, the line is loaded with coil 218 and a resistor network 220 / capacitor 219 in parallel with a coil 218 The generation of the impulse and the subsequent activation of the controlled silicon rectifier to apply the load, activates the decision logic 692 which works to make a logical decision concerning the quality of the alternating current line. If the impedance of the alternating current line is normal, ie, low, due to no loose connections, then an impulse is generated through the sliding contact of variable resistor 233. Furthermore, no impulse is generated through capacitor 557. In this case, the decision logic maintains the output signal ACTIVE ARC PRECOZ deactivates, that is, low. However, if the impedance of the alternating current line is not normal, ie high, due to weak connections, then an impulse is no longer generated through the sliding contact of the variable resistor 233 and an impulse appears through the capacitor 557. In this case, the decision logic causes the output signal ACTIVA_ARCO_PRECOZ to be active, that is, high. With reference to Figure 7, resistor 215 and diode 216 function to ensure that the rectified alternating current reference voltage used by the circuit ^ g ^ - falls to the zero potential at zero crossover of alternating current. The variable resistor 223 is added in series with the silicon controlled rectifier 224 to form part of the line impedance detection circuit, shown in greater detail in Figure 9 hereinafter. In addition, the resistor 220 and the capacitor 219 in series with each other are added in parallel to the relay coil 218 in order to reduce the impedance of the coil to a value that will charge the alternating current line sufficiently to detect line impedance. high. The silicon controlled rectifier trigger circuit 236 which provides the gate signal for the silicon controlled rectifier 224, functions to isolate different trigger signals from one another. A schematic diagram illustrating the early detection circuit in greater detail is shown in Figure 9.

Two voltage sources are used to supply the circuit. The first voltage source is the AC line voltage V ^ g ^ and the second voltage source used in the circuit is the filtered and regulated 26 V DC power supply voltage. The rectified alternating current voltage VRE T is coupled to the resistor 556 which is in series with the thermistor 554 coupled to ground. The ratio of resistor 556 to thermistor 554 is approximately 2: 1. Thus, the voltage at node A is 1/3 of VRECT. Node A is also connected to the 26 V supply via diode 604. Therefore the maximum possible voltage at node A is 26 V. This is the highest voltage at which the electronic components in the early warning circuit will be exposed of Arc. This allows a designer to combine most of the circuit into an integrated circuit breaker for arc fault / ground fault current. A graph illustrating the waveform trace present at node A and other nodes in the circuit is shown in Figure 10. The waveform trace labeled 680 represents the voltage at node A. Note that to avoid confusion the dotted horizontal line representing the ground level for trace 680 only rose above the X axis. The solid line lower (X axis) represents the ground level for all other traces. With reference to Figures 9 and 10, the thermistor 554 performs a regulation function on full-wave rectified voltage - The regulation is necessary in order to obtain the measurement of time necessary for the proper operation of the circuit. As the line voltage of alternating current rises above its nominal value, ie 120 VRMS, the current through the thermistor 554 increases. This causes the temperature of the thermistor 554 to rise causing its resistance to decrease, thus lowering the voltage at the node A. When the voltage of the alternating current line falls below its rated voltage, the current through the thermistor 554 decreases and the thermistor cools. The drop in temperature causes the resistance of the thermistor to increase, thus increasing the voltage at node A. In this way, a stabilized reference voltage is created at node A. To help understand the operation of the circuit of Figure 9, The circuit operation will be described during a half cycle of the alternating current line. The description begins at the point in the alternating current cycle where the voltage at node A is at a zero potential as the line of alternating current passes through a junction. This is represented in Figure 10 at point Q. At this time, the base of transistor 594 is at zero potential. The emitter 594 deviates at about 5 V by the resistor 598 and the transistor 600 which operates as a zener diode. Thus, transistor 594 is off. The voltage at the Y node is about 5 V due to the voltage divider made of a resistor 598 and the zener 600. Since the transistor 594 is off, the voltage in the collector is not lowered to the 5 V present in the node Y. Otherwise the voltage in the collector rises to 26 V. This generates a sufficient voltage at the node C to interrupt the transistor 604 which functions as a zener diode. The current thus flows through the resistors 596, 602 and zener 604, generating sufficient voltage across the resistor 608 to turn on the transistor 610. However, at this moment in the half cycle, the transistor 606 is saturated due to the diverted voltage. splitter formed from resistor 563, 564. This keeps the base of transistor 610 in virtual ground, preventing it from being turned on. The transistor 610 that remains off prevents the pulse generating circuit comprising the transistors 624, 638 from operating. The operation of the pulse generating circuit is described hereinafter. The voltage at node A thus rises from zero potential until it reaches approximately 6 V. At this time, the voltage at the base of transistor 594 reaches a high enough level to turn on the transistor. Note that the voltage at the base of transistor 594 closely monitors the voltage at node A, since the ratio of resistors 590, 592 is relatively high. Transistor 594 on lowers the voltage at node C to a voltage lower than the interrupting voltage of zener 604. This removes any base voltage in transistor 610 thus keeping it off. The voltage at node A continues to rise until it reaches the point represented by point S in Figure 10. This voltage corresponds to the voltage of the zener diode (approximately 12V) of transistor 574 which functions as a zener diode. The transistors 566, 568 are connected in a single programmable junction configuration with a programmed voltage equal to the zener voltage of 12 V of the zener 574 plus a 0.6 V diode drop across the diode 570. The operation of the programmable transistors of a single union is described in greater detail in the General Electrical SCR Manual, 5th edition. As the voltage at node A exceeds the programmed voltage of 12.6 V, the single bond activates in a manner similar to a controlled silicon rectifier. Due to the avalanche phenomenon, both transistors 566 and 568 remain saturated while there is a minimum clamping voltage of 2 to 3 V present. Note that resistors 565, 567 are equal valued resistors. Thus, the voltage at node D reflects the voltage at node A divided by two. Accordingly, when the single-junction transistors 566, 568 are activated, the voltage at the D node becomes 6.3 V. The values of the two resistors 576, 582 are chosen so that the value of the resistor 582 is 10 times. that of resistor 576. This causes transistor 578 to function as an emitter follower where its emitter voltage tracks the voltage at node A divided by two. After the single junction is activated, the capacitor 588 starts charging via the variable resistor 586. Note that the variable resistor 586 is adjusted so that the capacitor 588 charges the zener voltage of the zener 558 within approximately 4 to 5 milliseconds . Zener 558 is coupled to capacitor 588 via resistor 559. This time corresponds approximately to point T in Figure 10. This delay ensures that activation of the controlled silicon rectifier occurs later in the downstream portion of the alternating current cycle. At point T in the half cycle, the voltage across capacitor 588 reaches the breakdown voltage of zener 558. This causes the voltage at the junction of resistor 560 and zener 558 to rise, forcing transistor 562 to saturation . This in turn pulls the base of transistor 606, that is, node B, to virtual ground. Transistor 606, which was saturated to this point, changes to off. The transistor 606 being turned off causes the inhibition line (node C) to be released. This puts the pulse generated by the circuit comprising the transistors 610, 624, 638 in the ready state to receive a start pulse from the comparator circuit comprising the transistor 594. Until now, the transistor 594 was in saturation, due to its emitter deviation via the 598 resistor and the zener 600. Although the voltage at node a begins to fall, at point T it is still above the zener voltage of the zener 600. Shortly after that, the voltage at node A falls below the reference voltage at node Y, which is approximately 6 V. This is shown at point U in the Figure 10. At this point, transistor 594 is turned off and the collector voltage of transistor 594 is raised to the full power supply voltage of 26V which exceeds the interruption voltage of zener 604. This causes the voltage in the base of the transistor 610 rises to 26 V minus the voltage drop through the zener 604, thus activating the circuit that generates the pulse. The circuit that generates the impulse consists of two stages. The first stage is composed of the resistors 612, 620, 622, 616, the transistor 610, the capacitor 614 and the diode 618. The pulse created by the transistor 610, through the resistor 612, is delayed and narrowed by the other components. The variable resistor 616 provides adjustment for the delay and width for the pulse. The narrow negative pulse created by the first stage is used to momentarily turn off the transistor 624, thus activating the second stage. The second stage comprises the resistors 626, 630, 634, 636, the transistor 624, the capacitor 628 and the diode 632. The pulse generated by the transistor 624 is also delayed and narrowed by the components that make up the second stage. The variable resistor 634 provides a function similar to the variable resistor 616 in the first stage. The narrow negative pulse created by the second stage momentarily turns off the transistor 638. While the transistor 638 is turned off, the voltage on its collector is pulled to 26 V via the resistor 640. The positive, narrow pulse, PROMO_ARK_PRECOZ thus produced is introduced, via the coupling capacitor 642, to the activating circuit of the silicon controlled rectifier 236 via the resistor 648. The silicon controlled rectifier thus activates a point V (Figure 10) in the middle cycle. Resistor 649 joins the signal of IMPULS0_ARC0_PREC0Z to the ground potential to prevent the silicon controlled rectifier from activating due to apocryphal signals. Due to the configuration of the emitter follower of transistor 578, capacitor 588 will start to discharge through diode 584 and resistor 582 when the voltage at node D drops below the emitter voltage of transistor 578. The voltage across the capacitor 588 closely follows the voltage that falls on the node D until the voltage across the capacitor 588 falls below the interruption voltage of the zener 558. At this time, the base of the transistor 562 is removed. The transistor 562 turns off, allowing the transistor 606 to turn on. This causes the circuit that generates the impulse to turn off. This is represented as point W in Figure 10. At about the same time, the voltage at node A drops to 2 to 3 V. This is the minimum maintenance voltage of the single-junction transistor comprising transistors 566 , 568 and the one union stops driving. Thus the circuit returns to its original state before the voltage at node a reaches the zero potential. In this way, the silicon controlled rectifier is consistently activated when the voltage at node A drops to approximately 5 V. This corresponds to an alternating current line voltage through the silicon controlled rectifier of approximately 15 V. Silicon controlled rectifier shuts off as the voltage through it approaches zero volts. The total series impedance commuted by the silicon controlled rectifier is approximately 3 ohms. This impedance is derived from the relay coil 218, the capacitor 219 and the resistors 220, 223. Thus, at the time it activates the controlled silicon rectifier, the alternating current line is charged with an equivalent load of approximately 5 A The total energy dissipated by this circuit branch can be approximated as vM- sin 1 VPEAK P = - vM? 2 180 170 - • 15-5 180 = 37.5 180 1 W This amount of dissipation can be neglected in most cases. Thus, for example, the circuit of the present invention can be placed in the housing of a standard ground fault circuit interrupter receptacle without requiring special heat sinking. The rest of the early arc detection circuit works to evaluate the quality of the alternating current line. The transistors 650, 654 are configured to operate as a two-input "Y" gate. The first input of the gate is the base of transistor 654 which is high active when a pulse is present at the junction of capacitor 552 and inductor 550. It is noted that the LC network comprising capacitor 552 and inductor 550 operates to produce a usable voltage pulse only when there is a high impedance in the alternating current line. The second input, ie, the base of the transistor 650, is active high when the output of the circuit based on transistors 624, 638 is turned on. In this way, both transistors 650, 654 are turned on only when the controlled silicon rectifier is activated and there is a pulse at the node Z. When both transistors 650, 654 are turned on simultaneously, the capacitor 656 starts charging from the supply of 26 V direct current energy via resistors 596, 602, 652 and diode 657. In the case where the alternating current line is not degraded, ie, low impedance, its source impedance is typically below 0.06 ohms. Thus, the voltage across the variable resistor 223 (Figure 7) is high enough to bypass the transistor 658 to saturation. Notice that the SLIDE CONTACT_SCR signal connects the base of the transistor 658 with the sliding contact terminal of the variable resistor 223. Subsequently, the capacitor 656 is discharged preventing any substantial voltage from accumulating. This works to disable the alarm signal ACTIVA_ARCO_PRECOZ which is introduced in the activating circuit of the silicon controlled rectifier 236 (Figure 12). Note that the impulses generated through the inductor 550 are of negligible amplitude and thus could not load the capacitor 656 to any appreciable degree.

In the event that the alternating current line is in poor condition, ie has high source impedance, a pulse is generated at the Z node between the capacitor 552 and the inductor 550 when it activates the controlled silicon rectifier. When the AC line is "poor", its source impedance rises approximately 3 to 5 ohms. Thus, with as little as a 10 A load, the AC line voltage drops to 90 V, which is below acceptable limits. In that case, the pulse generated through the inductor 550 is high enough to turn on the transistor 654. In addition, the transistor 650 is turned on when the drive pulse for the controlled silicon rectifier is generated, thereby enabling charging of the capacitor 656. Due to the lower current flowing through the silicon controlled rectifier, the voltage generated through the variable resistor 223 is insufficient to turn on the transistors 658. This allows the voltage in the capacitor 656 to rise sufficiently to cause it to become active the alarm signal ACTIVA_ARCO_PRECOZ. Note that the resistor 223 is a variable resistor that allows to fix the level of deterioration of the alternating current line in which the alarm will be generated. The time constant of the resistors is 596, 602, 652 and the capacitor 656 is of the order of 5 to 10 seconds. This relatively long period of time provides a large amount of noise immunity. Note that although it is possible for a charge to be turned on at the precise moment in a half cycle so as to cause the capacitor 656 to charge, the probability of this occurring during each half cycle for 5 to 10 seconds is extremely low. Alternatively, an expert in the electronic art could modify the circuit presented in Figure 14 to activate the silicon controlled rectifier after several half cycles, instead of each half cycle. This serves to reduce the energy dissipation of the device. A graph illustrating the voltage VREQT for an entire cycle of the alternating current cycle is shown in Figure HA. A graph illustrating voltage Vj ^^ and in greater detail around zero crossing for an alternating current line having relatively low impedance of 0.05 ohms is shown in Figure 11B and for an alternating current line having relatively high impedance of 3 ohms is shown in Figure 11C. The silicon controlled rectifier 224 is activated when the voltage VjyrrjT reaches approximately 15 V at this time the alternating current line is charged with approximately 3 ohms. If the AC line has a low source impedance then the voltage VJ ^ J only drops a fraction of a volt. For example, with an alternating current source impedance of 0.05 ohms, the voltage Vj ^ cp drops an amount? Vj ^ g ^ given by the following. 3? VRECT = 15 ~ 15"3 + 0.05 = 0.24 V On the other hand, if the AC line has high source impedance then the voltage drops considerably for the short period that the silicon controlled rectifier is on. For example, with a source impedance of 3 ohms, the voltage J ^ J drops an amount -? VRECT given by the following. 3? VRECT = 15 ~ 15 3 + 3 = 7.5 V A graph illustrating the voltage present at the Z node superimposed on the voltage V EQJ over a complete cycle of the alternating current cycle is shown in Figure 12A. A graph illustrating the voltage present at the Z node superimposed on the VREQT voltage during activation of the silicon controlled rectifier for an AC line having a relatively high impedance of 3 ohms is shown in Figure 12B and for a current line alternating which has a relatively high impedance of 3 ohms is shown in Figure 12C. The voltage at the node Z is very noisy since the inductor 550 is of high impedance at high frequencies. In addition, the LC network causes a phase change of the voltage at the node Z relative to the voltage of the alternating current line. The capacitor 552 and the inductor 550 are preferably chosen to keep the noise below the threshold that would turn on the transistor 654. In addition, the "Y" gate formed by the transistors 654, 650 operates to sample the voltage at the node Z only when the silicon controlled rectifier is activated. If the impedance of the alternating current line is low then the signal at the Z node changes relatively little, as shown in Figure 12B. However, if the line impedance is high, the voltage Vj ^ g changes abruptly when the controlled silicon rectifier is activated which causes the LC network to resonate. The LC network comprises the capacitor 552 and the inductor 550 operates as an oscillator that is stable at the rate at which the alternating current voltage is changing. However, an abrupt change in voltage, for example, a step function, will cause the LC network to oscillate or resonate at its resonance frequency. The greater the voltage step of ^ ECT ', the greater the voltage oscillations in Z mode.

The resonance voltage at the Z node is input to the base of the transistor 654 causing the capacitor 656 to be turned on and charged via the diode 657. Note that the transistor 654 needs to be turned on multiple times in order to sufficiently change the capacitor 656 so that activates the alarm signal ACTIVA_ARCO_PRECOZ. This provides some immunity to noise and resonance at the Z node when the arc fault / ground fault current interrupter device is initially turned on. The voltage at the node Z is coupled to the base of the transistor 654 via a voltage divider formed from the variable resistor 553 and the resistor 555. In addition, the base of the transistor 654 is coupled to the capacitor 557 to ground. Resistors 553, 555 and capacitor 557 improve the operation of the early detection circuit of tonnage. The resistors 553, 555 function as a voltage divider that sets the level of the resonance voltage at which the transistor 654 will turn on. The resistor 553 is variable to allow the level of the resonance voltage to be set. Note that the level of the resonance voltage produced by the LC network is proportional to the step height generated in the VJZEQT voltage which in turn is proportional to the impedance of the AC line. The capacitor 557 operates to filter a strange high frequency, particularly radio frequency, from the base of the transistor 654 which could otherwise turn it on. The noise of a continuous nature of high energy could potentially create a false indication of high impedance of alternating current line. With reference to Figures 6 and 7, the output of the transformer 234 is input to two separate circuits. One circuit is the high frequency circuit (HF) 188 comprising a high pass filter 190, a full wave rectifier 192, an amplifier 194 and the integrator 196. The second circuit is the alternating current line frequency circuit 200 comprising low pass filter 202, full wave rectifier 204, amplifier 206 and integrator 208 The division of the output signal of the transformer 234 into two signals of different frequencies allows the device to react to different combinations of the alternating current line frequency and high frequency arcing signals. This allows the arc fault circuit interrupter circuit to react appropriately to many different arc and overcurrent situations. A schematic diagram illustrating the portion of the high frequency circuit of the arc fault detection device of the present invention in more detail is shown in Figure 13. The high pass filter 190 comprises a passive high pass filter (LC network). ), an amplifier and an active operational amplifier based on a high-pass filter in series. The capacitor 242 is chosen to have negligible impedance for frequencies above about 500 KHz, while the inductor 246 is chosen to be an open circuit above 500 KHz. Thus, high frequencies pass through the filter. At low input frequencies the capacitor 242 has a high impedance and the inductor 246 appears as a virtual cut to ground, thus severely attenuating the low frequency signals. The resistor 240 helps to prevent the LC network consisting of the capacitor 242 and the inductor 246 from resonating by damped oscillations. Thus the LC network functions as a high pass filter whose output is input to the operational amplifier 250. The gain of the operational amplifier 250, defined by the resistors 248 and 254, is set to provide a convenient functional range of high frequency tonnage signals for subsequent signal processing operations. Resistor 252 provides temperature compensation, allowing the detector to operate at temperatures greater than ambient temperature without any loss of accuracy. The operational amplifier 250 also functions as a compensator, producing a low impedance source for the connected series of filters built around the operational amplifier 264. This filter comprises a Chebychev active high-pass, two-pole filter with a cutoff frequency of approximately 500 KHz. This filter provides high attenuation of signals below 500 KHz, thus preventing the communication signals of the carrier of the power line present in the AC line (which could reach frequencies as high as 400 KHz) interfere with the detection of arc faults. The filter is constructed of the capacitors 256, 258, the resistors 162, 260 and the operational amplifier 164. The resistor 266 is used for temperature compensation. The output of the Chebychev filter enters an entire wave rectifier 192 which is capable of rectification at input voltages in the millivolt range. The rectifier 192 comprises an operational amplifier 272 by which the positive input of the operational amplifier is maintained to ground via the resistor 270. The diodes 276, 278 provide rectification of the signal. Due to the feedback via the resistor 274, loss in the signal is not achieved. The resistors 268, 274 define the gain of the rectification step 192. The high-frequency pulse direct current signal output by the full-wave rectifier 192 enters the amplifier 194 comprising the operational amplifier 282 and the resistor 280. The amplifier 194 functions as a voltage follower or impedance comparison compensator that provides a low resistance source for the arc current signal which is representative of the peak level of the arc current on the alternating current line. The arc current signal is the voltage of the high frequency processed signal, which contains all the peaks and gutters of the original signal. If this voltage is too high, the device will disconnect the relay. The output of the amplifier 194 is input to the integrator 196 which operates to generate a signal representative of the level of the average peak arc current present in the alternating current line. The integrator preferably has an integration time of about 100 s. The output interference signal of the full-wave rectifier 192 is matched and averaged via the diode 284, the resistors 288, 286 and the capacitor 290. The resistor 286 and the capacitor 290 are large enough to match the fast fluctuations of the voltage. high frequency arcing signal and converting them to a more convenient slow motion direct current level for the arc detection circuit 198 (Figure 6). The resulting averaged arc current signal is output via the voltage compensator / compensator 292. A schematic diagram illustrating the frequency circuit portion of the alternating current line of the arc fault detection device of the present invention in greater detail is shown in Figure 14. In contrast to the high frequency circuit 188 of Figure I3, the AC line frequency circuit 200 of Figure 14 performs low pass filtering. The input LC network of the low pass filter 202 comprising the capacitor 302 and the inductor 300 functions as a low pass filter. The frequencies lower than 500 Hz pass with negligible attenuation. At these frequencies, the inductor 300 is virtually a short circuit and the capacitor 302 has high impedance. At frequencies above 500 Hz, the inductor 300 is of high impedance and the capacitor 302 has low impedance thus severely attenuating any high frequency content in the input signal. Resistor 240 (Figure 13) also prevents this second LC network from resounding. The output of the LC network enters an amplifier constructed from the operational amplifier 308 and the resistors 304, 306, 310. The gain of the operational amplifier 308, defined by the resistors 304, 306, is set so that the frequency circuit Alternating current line 200 provides 1 V per 10 A flowing on the AC power line. This precise ratio of current to voltage allows the circuit to accurately detect and reject low level arcing produced by common devices connected to the arc fault / ground fault current interrupter device. Resistor 310 provides temperature compensation in a manner similar to resistor 252 (Figure 13). The operational amplifier circuit 308 also functions as a compensator producing a low impedance output source for the filter built around the operational amplifier 322. The filter coupled in series with the operational amplifier circuit 308 is an active low pass Chebychev filter. , of two poles, with a cutoff frequency of approximately 500 Hz. The use of an active filter provides a much sharper cut of high frequencies. The low pass filter is constructed of the resistors 312, 316, 320, the capacitors 314, 318 and the operational amplifier 322. The output of the Chebychev filter enters a full wave rectifier 204 which is capable of rectifying at voltages of entry in the millivolt range. The rectifier 204 comprises an operational amplifier 330 by which the positive input of the operational amplifier is maintained to ground via the resistor 329. The diodes 328, 332 provide rectification of the signal. Due to the feedback via the resistor 326, signal loss is not achieved. The resistors 324, 326 define the gain of the rectification stage 204. The low-frequency direct current signal output from the full-wave rectifier 204 enters to amplifier 206 comprising an operational amplifier 336 and resistor 334. Amplifier 206 operates as a voltage follower or impedance comparator compensator that provides a low resistance source for the AC line current signal that is representative of the level peak current line current of alternating current in the electrical line that monitors the arc fault / ground fault current interrupter device. The AC line current signal is the voltage of the low frequency processed signal, which contains all the peaks and gutters of the original signal. If this voltage is too high, the device will disconnect the relay. The output of amplifier 206 enters the integrator 208 which functions to generate a signal representative of the average peak line current level of the alternating current. The integrator preferably has an integration time of approximately 100 ms. The output damped signal of the full-wave rectifier 204 is matched and averaged via the diode 340, the resistors 338, 342 and the capacitor 344. The resistor 338 and the capacitor 344 are large enough to match the fluctuations of the line frequency signal of alternating current and converting them to a direct current level that moves slower convenient for the arc detection circuit 198 (Figure 6). The capacitor 344 is slowly discharged by the resistor 342. The resulting averaged arc current signal is output via the voltage / compensator follower 346. The resistors and capacitors in the average circuit 208 are preferably chosen to attenuate the signals generated by the surge currents. entry of typical household appliances containing, for example, electric motors, incandescent lamps and switching power supplies. The input currents generated by these devices produce a short-lived voltage peak which decays very quickly after the device is turned on. Thus, the alternating current line frequency circuit 200 outputs two signals, the first signal being proportional to the current of the alternating current peak line flowing in the power line and the second signal being proportional to the current of the line of average alternating current flowing in the power line. The high-frequency circuit 188 also outputs two signals, the first signal being proportional to the peak current of the frequency components above 500 KHz (with the highest frequency limited by the physical characteristics of the operating components and amplifiers used) and the second signal being proportional to the average current of the frequency components above 500 KHz. These four signals are used by the arc detection circuit 198 (FIG. 6) to allow the arc fault / ground fault current interrupter device to react adequately to a wide range of hazardous conditions. The use of the four signals also allows the device not to take into account both the input currents and the noise typically generated by domestic appliances, while reliably detecting dangerous arcing conditions. Alternatively, it may be possible to remove either the initial passive LC type filtering or the active filtering (operational amplifiers) and still provide sufficient filtering of the AC line frequency signal and any high frequency arcing signal for the device work as intended. It would also be considerable to ensure the attenuation of any signal in the frequency bands used for power line carrier communications. The schematic diagrams illustrating the arc detection circuit portion of the arc fault detection device of the present invention are shown in more detail in Figures 15A, 15B and 15C. The arc detection circuit works to generate two activation signals called ACTIVA_ARCO and ACTIVA_PROMEDIO. The generation of the first ACTIVA_ARCO signal is described first. With reference to Figure 15A, the arc detection circuit operates to detect when the peak alternating current line frequency current or the peak high frequency arc current is above a previously determined threshold that has been determined not to It is safe. The peak AC line frequency current of the alternating current line circuit 200 (Figure 14) is paired via the resistor 350 and the capacitor 352 before being input to the comparator 358. The minus input of the comparator is the output of a voltage divider that serves as a reference voltage. The resistor 354 and the potentiometer 356 form the voltage divider. This reference voltage is set to a value representing the highest allowable peak AC line current on the AC line. Preferably, the highest allowable peak AC line current is 100 A. When the peak voltage of the frequency of the AC line is higher than the set threshold, the normally low output of comparator 358 will go high. If the other inputs to gate "0" 360 were previously low then the comparator 358 that goes high causes the signal ACTIVA_ARCO to go high. This, in turn, causes the silicon controlled rectifier activator circuit 236 (Figure 7) to activate the silicon controlled rectifier and open the relay, disconnecting the power to the load. This circuit is particularly useful for detecting risky, short-term arching, where appreciable load current is flowing through the arch and energy line as when an extension cord is cut by the sharp edge of the metal leg of a chair. Similarly, the peak high frequency current of the high frequency circuit 188 (FIG. 13) is paired via the resistor 366 and the capacitor 368 before being put into the comparator 370. The minus input of the comparator is the output of a digital splitter. voltage that serves as a reference voltage. Resistor 362 and potentiometer 364 form the voltage divider. This reference voltage is set at a value representing the highest peak high frequency arc current permissible on the AC line. When the high frequency peak voltage is greater than the fixed threshold, the normally low output of the comparator 370 will go high. If the other inputs to gate "O" 360 were previously low then the comparator 370 that goes high causes the signal ACTIVA_ARCO goes high. This, in turn, causes the activating circuit of the silicon controlled rectifier 236 (Figure 7) to activate the silicon controlled rectifier and open the relay, disconnecting the power to the load. This circuit is particularly useful for detecting short-term risky arcing, where appreciable charge current is flowing through the arc and power line as when an extension cord is cut by the sharp edge of the metal leg of a chair. Both the peak alternating current line frequency and peak high frequency comparator circuits are preferably constructed so that the relay in the arc fault / ground fault current interrupter will be disconnected approximately within three cycles of alternating current, that is, 40 ms, when 100 A conditions of arcing and / or overcurrent of the AC line are detected. This level of detection and disconnection speed is called Level 3 priority. The other two levels, Levels 2 and 1 are lower in priority and consequently more time is needed before the relay is disconnected. The rapid response associated with the overcurrent and overcurrent situations of Level 3 priority is achieved by using the peak voltages output of the alternating current and high frequency circuits instead of the average voltages. This provides an instantaneous disconnection reaction for excessive inrush currents. In addition, it also provides extra margin to detect very large arcs, such as those with a large alternating current line frequency component and a sufficient amount of energy to start a fire fairly quickly. The novel approach to arc detection used in this invention provides very rapid response to a wide range of dangerous scenarios. The device uses the two comparators 358, 370 to quickly turn off the AC power for the load in the following three different situations: (1) when the line has high levels of tonnage (2) when the current of the AC line peak exceeds the capacity of the line and (3) when the line is overloaded due to excessive arcing. Normal input currents associated with motors and incandescent bulbs, for example, although of short duration, they can be very high. A graph illustrating the magnitude of an input current versus time for an incandescent lamp is shown in Figure 16. An incandescent load 15A was connected to the load side of the arc fault / ground fault current interrupter and was measured the input current. A peak input current of approximately 130 A was measured. This peak input would normally generate enough voltage to disconnect the arc fault / ground fault current interrupter. However, the capacitors 352, 368 are chosen to provide a time delay of approximately 25 ms for the comparators 358, 370, respectively. As can be seen from the graph in Figure 16, after about 10 ms the peak current has dropped to below 80 A. This time delay prevents false disconnection by input currents, since the comparators 358, 370 are configured to disconnect within 40 ms at a load current of 100A. The next lower priority level, Level 2, is associated with high average arc, that is, the average alternating current line frequency current or the average high frequency arc current greater than 1.5 times the current breaker ratio of arc fault / ground fault. At this priority level the comparator circuit is preferably such that the relay in the arc fault / ground fault current interrupting device will be disconnected within 100 ms. Note that the user can not disable arc detection at priority levels 2 and 3 since it is desirable that the arc fault / ground fault current interrupting device always be disabled in the presence of conditions that are determined to be dangerous . The circuit used to implement the priority of Level 2 will now be described in greater detail. With reference to Figure 15B, the average alternating current line current of the alternating current line circuit is input to the further input of the comparator 408. A voltage reference source is input to the minus input of the comparator 408. The reference voltage is generated via the potentiometer 375 and the operational amplifier 376 which forms a voltage regulation circuit. The voltage regulation circuit provides the adjustable reference voltage for a resistive divider network comprising the resistors 398, 400, 402, 404, 406. The values of the resistors are chosen so as to create multiple reference levels of the current of average AC line frequency, for example, 30, 20, 10, 5 and 2.5 A. The reference voltage created at the minus input for comparator 408 corresponds to an average alternating current of 30 A on the alternating current line. Thus, if the detected AC line current level is above 30 A, the output of comparator 408 goes high causing the output of gate "0" 422 to go high. The output of gate "0" 422 is input to gate "0" 360 which operates to output the signal ACTIVA_ARCO to the activating circuit of the silicon controlled rectifier. Similarly, a voltage reference source is input to the minus input of the comparator 390. The reference voltage is generated via the potentiometer 377 and the operational amplifier 378 which forms a voltage regulating circuit. The voltage regulating circuit provides the adjustable reference voltage for a resistive divider network comprising the resistors 380, 382, 384, 296, 388. The values of the resistors are chosen to create multiple reference levels of the current of settlement, for example, dangerous, high, medium and low. The reference voltage created at the input minus to the comparator 390 corresponds to a dangerous tonnage level. Thus, if the detected average high frequency current level is below this level, the output of the comparator 390 goes high making the output of the "0" 422 gate go high. The output of gate "0" 422 is input to gate "0" 360 which operates to output the signal ACTIVA_ARCO to the activating circuit of the silicon controlled rectifier. The two comparators 390, 408 are configured to take a break in the presence of unsafe conditions. They are connected through "0" gates to the activating circuit of the silicon controlled rectifier by controlling the arc fault / earth fault current interrupter relay. This provides the Level 2 priority by disconnecting with a disconnect time of approximately 100 ms. This rapid disconnection can not be disabled or delayed by the user, as is the case with the priority detection Level 1. The output of the comparator 390 goes high if the unsteady arching persists for approximately 100 ms, while the output of the comparator 408 goes high if the total average current exceeds 30 A for a time duration of approximately 100 ms, that is, six cycles of alternating current. An average AC line current of 30 A indicates that the arc fault / safe ground fault current interrupter powered through the current capacity is being exceeded by 50 to 100 percent. Note that the typical ground fault circuit interrupters are calculated for 15 to 20 A of alternating current fed through the current. When these circumstances occur, the energy to the load is interrupted. It is noted that the average alternating current line and the high frequency signals are used as inputs to reduce the sensitivity of the disconnection action of the arc fault / ground fault current interrupter to the waveform or its frequency. Thus, the type of arc detected or the type of load energized through the arc fault / ground fault current interrupter does not effect the device's ability to disconnect when dangerous conditions occur. The comparator 390 reacts to high frequency currents while the comparator 408 reacts to alternating current line frequency, ie 50 or 60 Hz. The output of comparator 408 goes high when the average current exceeds 30 A in the AC power line. In this way the device provides overcurrent protection against continuous overload, as well as protection against excessive peak currents exceeding 100 A for more than 2 to 3 cycles. The arc detection circuit also comprises two banks of comparators, one associated with the average alternating current line current and the other associated with the average high frequency arcing current. Three comparators 410, 412, 414 have their inputs less derivative at different reference voltage levels generated by resistor divider 398, 400, 402, 404. The plus input of each comparator is coupled to the average AC line current voltage. . The resistor values are chosen so that the output of comparator 410 will go high when the average AC line current exceeds 20 A, the output of comparator 412 will go high when the average AC line current exceeds 10A and the output of comparator 414 will go high when the average AC line current exceeds 5 A. As previously described, the output of comparator 408 will go high when the average AC line current exceeds the dangerous level of 30 A. The signal from The average AC line current is fed to comparators 408, 410, 412, 414 through diode 372. A capacitor 418 provides greater matching of the average AC line current signal and the resistor 420 ensures that the capacitor 418 discharge when the average AC line current decreases. Additional feedback resistors can be added to the inputs over the comparators to provide hysteresis thus reducing oscillations. In a similar way, the arc detection circuit i comprises the comparators 392, 394, 396 to detect several levels of average arc current in the line. The inputs less than each of the comparators are coupled to different derivations in the voltage divider which comprises the resistors 380, 382, 384, 386, 388. The values of the resistors of the voltage divider are calculated to change the output of the voltage divider. comparator 396 up when the average arc current level exceeds a "low" level. A "low" tonnage level is defined as the minimum level of tonnage required to start a fire. The output of comparator 394 goes high when the average arcing current exceeds a "medium" level. The output of comparator 392 goes high when the average arc current level exceeds a "high" level. As previously described, the output of comparator 390 goes high when the average arc current level exceeds a level considered "dangerous" under any circumstance. A "dangerous" level is defined as the amount of tonnage that would produce an average arc current of 30 A. The average arc current voltage signal is fed to comparators 390, 392, 394, 396 through diode 374. The cyclist 446 provides greater pairing of the average arc current signal and the resistor 448 provides a discharge path for the capacitor 446. Additional feedback resistances can be added to the inputs of each of the comparators to provide hysteresis thus reducing the oscillations. Note that the integrating circuits in the AC line and high frequency circuit that provide the input to the arc detection circuit create a time delay of approximately 85 to 100 ms. The time delay prevents the relay from disconnecting and disconnects the power during a current input, which always occurs when inductive, capacitive or incandescent loads are turned on (Figure 16). Alternatively, a delayed disconnect mechanism is provided for signals with lower average arc. These signals are given priority Level 1. Level 1 is the lowest priority and the arc fault / ground fault current switch will disconnect within 1 to 2 seconds at this arc level. In addition, the user has the option of delaying or preventing disconnection due to Level I arching through the chronometer circuit described in more detail later herein. The user can also enable an audible warning device instead of making the arc fault / ground fault current switch disconnect. Various levels of detection are provided by the two comparator configurations 390, 392, 394, 396 and 408, 410, 412, 414. The device can suitably react at different levels of alternating current line current and average arc current by applying the output of the comparators to a logic circuit. In particular, comparators 392, 410 are associated with high-level arc detection, comparators 394, 412 with mid-level arc detection and comparators 396, 414 are associated with low-level arc detection. These different tonnage necks produce a Level 1 priority disconnect. Below a certain level of average arc current, an arc can be considered non-hazardous because it has insufficient energy to start a fire. An example of a non-hazardous tonnage is a charge of static electricity. The reference voltage provided to the comparator 396 by the voltage divider represents an average arc current level that contains the minimum amount of energy to initiate a fire. This is the lowest detection point and has been determined experimentally by analyzing many tuning of arc waves. The reference voltage for comparator 414 is preferably set at 0.5 V. This reference voltage is calculated equal to the direct current voltage of the average AC line current signal when 5 A current flows on the load side of the arc fault / ground fault current interrupter device. When the average arc current signal reaches the minimum level required to be dangerous, that is, "low" level, the output of comparator 396 goes high. The output of the comparator 396 is input to an input of the "Y" gate 444. The output of the comparator 414 is inverted and is input to the second input of the "Y" gate 444. Thus, the output of the "Y" gate 444 is high only when a "low" is detected, that is, a dangerous minimum level of tonnage and less than 5A flows on the load line. The reference voltage for comparator 412 is preferably set at 1 V. This reference voltage is calculated equal to the direct current voltage of the average AC line current signal when 10 A of current flows on the load side of the arc fault / ground fault current interrupter device. When the average arc current signal reaches the "medium" level, the output of the comparator 394 goes high. The output of the comparator 394 is input to an input of the "Y" gate 426. The output of the comparator 412 is inverted and is input to the second input of the "Y" gate 426. Thus, the output of the "Y" gate 426 is high only when the "average" arc level is detected and less than 10 A flows in the load line. The reference voltage for comparator 410 is preferably set at 2 V. This reference voltage is calculated equal to the direct current voltage of the average AC line current signal when 20 A current flows on the load side of the arc fault / ground fault current interrupter device. When the average arc current signal reaches the "high" level, the output of the comparator 392 goes high. The output of the comparator 392 is input to an input of the "Y" gate 424. The output of the comparator 410 is inverted and is input to the second input of the "Y" gate 424. Thus, the output of the "Y" gate 424 is high only when the "high" arc level is detected and less than 20 A flows through the load line. The table below summarizes the average arc required for the different levels of priority disconnection. Note that the peak alternating current line current or peak high frequency arcing current is 100 A excess will immediately disconnect the device. This is a priority 3 disconnect. The following table only describes average current disconnection levels.

Note that the example arc detection circuit of Figures 15A, 15B and 15C is shown to comprise three levels of average arc current detection, ie, high, medium and low, for illustrative purposes only. Higher or lower levels of average arc current detection are possible without departing from the scope of the invention alternatively, since slowly changing direct current levels are involved, analog-to-digital (A / D) converters could be used. to digitize the average AC line and the high frequency signals to enter them in a microcontroller. The microcontroller would be conveniently programmed to generate an output that depends on the levels of the two input signals. The microcontroller could also perform a hysteresis function in software for each level of detection. As described above, the output of each of the "Y" gates goes high only if the detected arc current is greater than the level allowed for a particular level of AC line current. This also implies that for every average AC line current level, there is an average arc current level that is tolerated, for example, as a by-product of the particular load such as vacuum cleaners, electric shavers, food processors, etc. These common appliances each have an amount of tonnage associated with their operation. The signal level of arcing produced by these devices is generally less than the signal from an uncontrolled arc with the same current flow. Thus, because the arc detection circuit tolerates a specific amount of arcing for each level of AC line current, the false disconnection of the device is avoided whenever these types of apparatus are used.

The exits and "Y" gates 424, 426, 444 are introduced to a "0" 428 gate. If some of the exits of the "Y" gate are high, the output of gate "0" 428 goes high.

The output of gate "0" 428 is input to gate "Y" 434. An additional comparator 416 is included in the arc detection circuit to eliminate any false disconnection due to noise in the alternating current line. Noise can be created by spikes generated by various sources of radio-frequency pick-up or electrostatic discharge such as when someone walks on a nylon mat and touches the housing of an extension cord or plug. In addition, an apparatus such as electric shaving can generate a substantial amount of arcing noise since it consumes minimal current by falsely disconnecting the device. The buyer 416 causes the disturbances of the above type, white noise, light decrease noise, and t c e t, to be ignored, by increasing the noise immunity of the arc detector. The comparator 416 is in its lowest position in the totem pole structure for the detection of average AC line current. The reference voltage, input to the input minus comparator, is set by the variable resistor 406. The comparator 416 operates to keep the output of the "Y" gate 434 low when at least a minimum level of current flows through the switch of arc fault current / ground fault. The output of the "Y" gate 434 can only go high if the AC line current is above a minimum level. In the example given here, this level is arbitrarily set to 2.5 A. Thus, only faults that contain enough energy to start a fire will disconnect the arc detector. As is well known, electric power is represented as P = I2R or VI, therefore as I approaches zero the energy in the arc approaches zero. Therefore, the energy becomes negligibly small and can be considered a static arc. As an illustrative example, walking on a dry nylon carpet can produce static voltages as high as 50, 000 V although the current is only a few μA. Thus the total energy in the arc is in the range of W which is not enough to start a fire. The Silid and the "Y" port 434 is input to the input plus of the comparator 442 via the resistor 430 and the capacitor 432. The resistor 430 and the capacitor 432 operate to generate a delay of 1 to 2 seconds. Small short-lived arcs that persist for more than 100 ms, but are not continuous, are usually not dangerous. The delay of 1 to 2 seconds causes these intermittent arcs to be ignored, for example those produced by opening and closing switches. The delay also provides greater immunity to noise from sources of short-lived or sporadic noise such as lighting controls. The output of comparator 442 goes high when the voltage on capacitor 432 exceeds the reference voltage set by divider 436, 438. Hysteresis is provided by resistor 443 which prevents the comparator from oscillating. The comparator 442 also functions as a compensator for the following steps. The output of the comparator 442 is input to the chronometer circuit and local / remote inhibition circuit. In addition, the output of the comparator 442 may optionally be input to an audible alarm 440 which comprises a buzzer or other known audible alarm device. Optionally, a user-controlled switch can be connected to the output of comparator 442 to provide the option of driving the audible alarm indicating a priority 1-level arc failure or disconnecting the device via the timer circuit described later in I presented. A problem associated with prior art arc fault circuit interrupters is that they disconnect annoyingly when equipment or apparatuses that produce signals such as heavy arc, eg, welders, are used. The present invention comprises timer circuits 186 (Figure 6) that function to temporarily disable the detection of arc faults for a period of time such as minutes or even hours. Arcing detection during the time in which the detector output is disabled causes the period of disablement to be extended for a time equal to the total time in which the tonnage is detected. Thus, if the detection of the arc was disabled for one hour and 10 minutes, and the arcing is detected during that time, the detector becomes enabled one hour and 10 minutes later. In this way the detection of the arc can remain disabled for longer periods of time thus allowing the user to uninterrupted the equipment or apparatus. A schematic diagram illustrating the portion of the chronometer circuit of the arc fault detection device of the present invention in greater detail is shown in FIG.

Figure 17. The function of the chronometer circuit 186 is to generate an active low INHIBIT signal that is input with the priority of Level 1 related to the signal ACTIVA_PROM output by the arc detection circuit. The signal INHIBIT is generated by a timer 506 and is normally high. The signal INHIBIT is entered with the signal ACTIVA_CRONOMETRO via the "Y" gate 516 to generate the signal ACTIVA_CRONOMETRO. The signal ACTIVA_CRONOMETRO is then introduced to the activating circuit of the silicon controlled rectifier 236 (Figure 7). Since the chronometer output is normally high, the ACTIVA_PROM signal is normally allowed for the relay to be disconnected. The application of an active high pulse to the RESET input of the chronometer starts the operation of the chronometer. When a pulse is applied to the input? And reset, the INHIBIT signal is pulled down until the timer count reaches a specific number of clock cycles. During the time that the INHIBIR signal is down, the ACTIVA_CRONOMETER signal is disabled. After the chronometry has been disabled, the INHIBIT signal returns to its active high state. The 50 or 60 Hz phase conductor of the AC line serves as the clock source for timer 506. The timer comprises zero detection means, well known in the art, for detecting zero crossings of the AC wave which forms the stopwatch input clock signal. Within the chronometer, the 50 or 60 Hz high-voltage sine wave is converted to a low-voltage square wave of the same frequency. The chronometer also comprises counting means, such as a plurality of Johnson counters. The square wave generated internally is used as the clock input for the counters. By convenient selection of the counter means, any period of time can be arbitrarily generated by the chronometer. For example, with 60 Hz of alternating current and a division of 216,000 counter, the timer output returns to high status one hour after it has been reset. A door (not shown) separates the clock generator from the counters inside the chronometer. This door is controlled by an entry labeled DISABLE CLOCK, which is internally locked. When the DISABLE CLOCK entry is returned to active under the stopwatch, it counts again from the point where it stopped. The stopwatch also includes an entry for RESTORE. An active high pulse at the RESET input forces the timer output, that is, the INHIBIT signal, down and sets all the counter registers to zero. The timer is preferably of the resettable type, ie it can be done to start counting from scratch at any time, even during counting. A continuous active on top of the RESET input will keep the counter at zero and therefore keep the INHIBIT signal permanently down. When the INHIBIT signal is high, the TIMER CLOCK DISABLE input is pulled upwards via the "O" 502 door exit. This prevents the stopwatch from counting longer and locks the stopwatch in a high output setting. As described above, detection of a Level 1 priority arc fault will extend the disabling period. Assuming that the INHIBIT signal is low, that is, the stopwatch is counting, a high signal ACTIVA_PROMEDIO will produce a stop at the DISABLED entry CLOCK of the chronometer through the "O" 502. Thus, the stopwatch pauses during the period of time that the ACTIVE_PREDEDIO signal is high. This means that the rehabilitation of the signal of ACTIVA_CRONOMETRO is delayed by the amount of time in which the signal ACTIVA_PROMEDIO is high. If the chronometer is not counting, that is, the INHIBIT signal is high, then the signal ACTIVATE_PROMEDIO has no effect on the chronometer. This method of delaying the stopwatch is used to ensure that the signal of ACTIVA_CRONOMETRO will be restored, even if the arching begins while the chronometer is counting. Priority level 1 is intermittent in shape, since there is not enough energy to sustain the tonnage for long periods. Therefore, even if level 1 priority arcing begins while the timer is counting, the counter will still increase during the gaps between arcs, and arc detection will be enabled at some point after arcing begins. Thus, the chronometer circuit significantly reduces the disconnection due to the normal arcing generated by the equipment and the devices, while ensuring that the GFCI / AFCI will eventually disconnect in the presence of arcs. Note that the arching in priority levels 2 and 3 is never disabled. While the stopwatch is counting, the INHIBIT signal is low, thus disabling the signal of ACTIVA_CRONOMETRO. A light emitting diode (LED) 512 is connected to the output of the timer 506. The light emitting diode is also connected to the power supply VQQ via the current limiting resistor 510. When the INHIBIT signal is low, the emitting diode light comes on indicating that the arc detection has been temporarily disabled. When the INHIBIR signal is high the light emitting diode is extinguished indicating that the arc detection is enabled. Three signals combine to form the RESET signal: INH_A, INH_B and INH_C. These three signals are input together through gate "0" 508 to generate the RESET signal input to the RESET input of timer 506. Thus, INH_A, INH_B or INH_C when going high will reset the stopwatch. The three signals introduced in the "O" gate 508 will now be described in greater detail. The timer can be reset by a user by momentarily depressing the push button switch 498. The signal INH_A, which is normally low through the resistor 500 connected to ground, is momentarily turned on high. An alternative is to connect switch 498 to the interrupting mechanism that provides the test pulse for the ground fault circuit interrupter circuit. Arc detection is disabled for a predetermined period of time when the ground fault circuit interrupter is tested. In other words, testing the ground fault circuit interrupter before a device such as a vacuum cleaner is used in the home will ensure that the device will not be disconnected when the vacuum is used. Arc detection is automatically enabled a stopwatch period after the use of an arc-generating device is disconnected. As described above, the chronometer output is normally high, allowing arc detection. An alternative is for the INHIBIT signal to go high immediately after the power is first applied to the arc fault circuit interrupter device. An alternative is for the timer to reset after the power is applied. A third and preferred alternative for the INHIBIR signal that will be pulled down during some cycles of alternating current, for example, 1 second, and then allowed to rise active. This produces greater noise immunity, as the transients associated with the energy being applied will be ignored by the arc fault circuit interrupter circuit. Moreover, the arc fault circuit interrupter is not unnecessarily inhibited for a long period of time. In situations where machinery is used that generates arc throughout the day, as in a factory with arc welding equipment, the detection of arc faults is only practical at night. Thus, the arc fault circuit interrupter should be disabled during the day and enabled at night. A photocell of cadmium sulfide or cadmium selenide 522 is provided to inhibit Level 1 priority arc faults from disconnecting the device. The photocell 522 is connected to the Vc via the resistor 520. During daylight hours, the resistance of the photocell drops to a very low value, creating a drop in the input to the inverter 518. The output of the inverter INH_C rises causing the RESET of the stopwatch to rise. This disables the ACTIVA_PROMEDIO signal to deactivate the device. Conversely, at night or in the absence of light, the resistance of photocell 522 rises to a high value causing the input to inverter 518 to rise. The inverter output drops, removing the INH_C signal, enabling the stopwatch and allowing the arc detector to be disconnected. Note that in the absence of light, the photocell resistance of cadmium selenide can be raised to 100 MO or more. A third source, INH_B, for the RESET input is also input to the "O" gate 514. This INH_B signal is generated by the local / remote inhibition circuit which will now be described in greater detail. A schematic diagram illustrating the local / remote inhibition circuit portion of the arc fault detection device of the present invention is shown in greater detail in Figure 18. The local / remote inhibition circuit 184 comprises the circuit which also inhibits the ACTI A_PROMEDIO signal to deactivate the device. The local / remote inhibition circuit 184 can be constructed as an integral part of the arc fault / ground fault current interrupter device or it can be constructed in its own external housing and connected to the main part by a plurality of wires. The local / remote inhibition circuit operates to turn the device on and off via the momentary oppression button, turn the arc fault circuit switch on and off via an infrared receiver, turn the arc fault circuit interrupter on and off via a signal from an external communication source and send a signal, indicating the occurrence of an arc fault, to a remotely located receiver via any convenient means of communication. The infrared (IR) reception is achieved through the IR detector 470 which may comprise an infrared diode which functions to pick up the pulse signal of an infrared transmitter 454. The transmitter may comprise a fixed transmitter or, in the alternative, any television or stereo remote control that emits infrared pulses modulated by a frequency in the range of 30 to 45 KHz. A receiver diode in the infrared detector 470 changes its impedance after reception of infrared pulse energy. The capacitor 472 passes these pulses through the resistor 474 at the same time blocking the direct current. This limits the sensitivity of the device to any constant or slowly changes the level of light, for example, daylight. The direct driving current through the potentiometer 474 charges the capacitor 478 through the diode 476. The resulting direct current level is output to an optocoupler 482. The current flowing to the optocoupler input causes its output to rise. The output of the opto coupler is input to a "0" 490 gate. A high output of the opto coupler causes the output of the "0" gate to rise. The output of the "0" gate 490 is input to an oscillatory circuit 492. The swing circuit 492 operates in one of two alternative modes, selected by the user. In the first mode, the rocker circuit 492 operates to change its output from low to high to high to low after each low to high transistor of its input. In the second mode, the rocker circuit 492 operates to produce a high active pulse after each low to high transition of its input. The output of the tilting circuit 492 forms the signal INH_B, which is input to the "0" 508 gate (Figure 17). In the first rocker switch mode the signal INH_B remains high until another input to the swing circuit is presented. The arc detector is disabled until the local / remote inhibition circuit releases the INH_B signal. In the second rocker switch mode, pulse INH_B resets the timer but the arc fault circuit interrupter is automatically enabled after a predetermined period of time. The output state of the output of the local / remote inhibition circuit is indicated via the light emitting diode 496, which is connected to the INH_B via the resistor 494. In the first rocker switch mode, the light emitting diode on indicates that the arc fault circuit interrupter is being disabled via remote means. In the second rocker switch mode, a rapid ignition of the light emitting diode 496 indicates that a reset pulse has been sent to the timer 506 (Figure 17). In addition, circuit 184 also comprises the circuit to allow a user to reset the timer or permanently disable the arc fault / ground fault current interrupter device from a remote location. One end of the momentary push button switch 484 is connected to ground and the other end is connected to a rebound eliminator circuit 488. The input to the rebound eliminator circuit 488 is aided by the resistor 486 connected to Vcc. The output of the rebound eliminator circuit is input to the "0" gate 490. The rebound eliminator circuit operates to pull one down while the switch 484 is opened. When the switch is closed, the output of the rebound eliminator circuit 488 rises causing the output of the "O" gate 490 to go high, toggling the INH_B signal. The local / remote inhibition circuit 184 also comprises the ability to receive an on / off command via a convenient communication means. For example, this communication means may comprise any energy line, radiofrequency, twisted pair or infrared communication technology carrier. An example of power line bearer communications includes the Lon Works and CEEus communications system. By way of example only, the present invention incorporates a 460 energy line carrier receiver, such as the CCS receiver manufactured by Leviton manufacturing, Little Neck, New York, which operates to receive aThe signal transmitted to the power line decodes and interprets the received command and produces a signal to the optocoupler 464. The carrier signal of the power line CCS is modulated by a carrier of 121 KHz. This signal is extracted from the alternating current line through the capacitor 450 and the coupling transformer 452. The capacitor 456 and the resistor 458 function to filter in high pass the input to the receiver 460. The output of the opto coupler 464 is introduced to the gate "0" 490. Thus, a high output of the optocoupler 464 causes the INH_B to exit the tilting circuit 492 to change states. Without departing from the scope of the invention, other methods of communication such as those mentioned above can be used in place of the CCS system.

In addition, the present invention comprises communication means, for example, power line carrier transmitter 462, for transmitting arc fault information to a remotely located receiver, accurately determining the location of the fault. A dedicated indicator panel can be connected to the remote receiver where the arc fault information is monitored by building personnel. This feature is desirable in industrial or commercial facilities, such as schools, supermarkets, etc., where the electrical system is centrally supervised. The signal ACTIVAR_PR0MEDI0 of the arc detection circuit is input to the compensator 468 to the transmitter 462 which operates to generate an output signal based on the • status of ACTIVATE_PR0MEDI0. Although the tonnage may cease or be intermittent, the capacitor 466 maintains sufficient charge to keep the transmitter 462 activated long enough to transmit the required information through the alternating current line. The transmitter 462 comprises power transistor means for transferring the output of the transmitter onto the alternating current line via the terminals of the phase and neutral line side. Note that both the phase and neutral line connections and the indicator panel are placed upstream of the arc fault / ground fault current interrupter so that the case in which the device is disconnected is not disconnected.

Furthermore, it is noted that even if the timer has been activated, temporarily inhibiting the signal of ACTIVATE_PROMEDIO, the occurrence of an arc fault is nevertheless transmitted to a remote indicator via transmitter 462. It is desirable to have an indication of an arc fault. even if it is generated from equipment or devices. Alternatively, the signal ACTIVA_CRONOMETER can be input to the transmitter 462 thus preventing the reporting of arc faults while the signal INHIBIT is low. As discussed above, the arc detector of the present invention can be used as an independent arc fault detector or combined with other types of circuit breaker devices in addition to a ground fault circuit interrupter. When used as a stand-alone device, the arc fault / ground fault current interrupter circuit of Figure 7 is modified to include only circuit related to failure. In particular, one of the ground fault circuit interrupters related to the transformers 233 and its related circuit including the LM1851 IC 225 would be removed. The activating circuit of the silicon controlled rectifier 236 would only need four inputs, i.e. PRECOQUE_ARCH, ARRANGE_ARMO_TEMPRANO, ACTIVA_ARCO and ACTIVA_CRONOMETRO. The rest of the circuit would be, that is, MOV, bridal diode, coil, power supply, relay switches, and so on.

Although the invention has been described with respect to a limited number of embodiments, it will be appreciated that many variations, modifications and other applications of the invention can be made.

Claims (57)

1. CLAIMS 1. An arc fault circuit interrupter (AFCI) device electrically connected to a seventh electrical wiring between an electrical power source that includes phase and neutral line side conductors and a load side that includes phase and neutral conductors, the device comprising: arc fault circuit elements for detecting high impedance in the electrical wiring system, the arc fault circuit elements operative to generate a first arc fault activating signal when the impedance of the electrical wiring system exceeds a first predetermined threshold; activating elements for generating an interruption signal after receiving the first arc fault activation signal, - and electrically connected switching elements in series between the phase and neutral line side conductors and the phase load side conductors and neutral, these switch elements to disconnect the electrical power source to the phase and neutral load side conductors in response to the interruption signal. The device according to claim 1, further comprising circuit interrupting elements for interrupting the flow of current to a load electrically connected to the device in response to predetermined criteria. The device according to claim 2, wherein the circuit breaker element comprises a ground fault circuit interrupter element (GFCI) for detecting the occurrence of a ground fault between the phase conductor and ground or between the neutral conductor and ground, the ground fault circuit element operative to generate a signal to activate ground fault in response to ground fault detection. The device according to claim 1, further comprising a transformer through which the phase and neutral conductors pass, the transformer operating as a ground / neutral differential transformer for the ground fault and operational circuit element. to generate an arc fault pickup signal for its run through the arc fault circuit element which is proportional to the current flowing through the phase and neutral conductors. The device according to claim 1, wherein the arc fault circuit element comprises test elements for periodically testing the electrical wiring system to determine a high impedance condition. 6. The device according to claim 5, wherein the test element tests the electrical wiring system to determine a high impedance condition every half cycle of the electrical power source. The device according to claim 1, wherein the arc fault circuit element comprises elements for generating a pulse substantially proportional to the source impedance of the electrical wiring system. 8. The device according to claim 1, wherein the arc fault circuit element comprises elements for activating a thyristor device within the ground fault circuit ele- lent for a time sufficiently short to not cause the switch element to disconnect. the electric power source of the load, said activation of the thyristor device briefly charges an LC network through the electric power source so that a pulse generated therefrom is indicative of a high impedance condition. The device according to claim 1, wherein the ground fault circuit element comprises a transformer through which the phase and neutral line side conductors pass through and further comprise a dividing element of current electrically connected to either the phase or neutral conductors to separate the current flow into two portions so that a small portion flows around the transformer thereby generating a differential current proportional to the current flowing through the phase conductor or neutral. 10. The device according to claim 9, wherein the current separating element comprises an impedance. The device accog to claim 9, wherein the current separating element comprises a resistor. 12. The device accog to claim 9, wherein the current separating element comprises a reactance. The device accog to claim 1, wherein the arc fault circuit element comprises: current measuring elements for capturing the level of alternating current flowing through an electric load placed on each load side of the device; high frequency circuit elements for generating a peak high frequency signal and an average high frequency signal corresponding to the peak and average levels, respectively, of the high frequency current flowing through the load; AC line frequency circuit elements to generate a peak AC line frequency signal and an average alternating current line frequency signal corresponding to the peak and average levels, respectively, of the frequency current of Alternating current line flowing through the load and arc detection elements to generate a second arc fault activation signal according to the high frequency peak signal, the average high frequency signal, the frequency signal of AC line peak and the AC line frequency signal average. The device according to claim 13, wherein the arc detecting element comprises elements for generating the second arc fault activating signal when either the high frequency peak signal exceeds a previously determined second threshold or the frequency signal Peak line voltage exceeds a previously determined third threshold, the generation of the second arc fault activating signal provides an immediate response to dangerous levels of arcing or AC line current. The device according to claim 13, wherein the arc detecting element comprises elements for generating the second arc fault activating signal when either the average high frequency signal exceeds a previously determined second threshold or the frequency signal The average AC line voltage exceeds a previously determined third threshold, the generation of the second arc fault activating signal provides an immediate response to dangerous levels of arcing or AC line current. 16. The device according to claim 13, wherein the arc detection element comprises elements for generating the second arc fault activation signal after a variable time delay that depends on the detected arc level or the level of alternating current line detected. The device according to claim 13, wherein the arc detector element comprises elements for generating the second arc fault activation signal based on a plurality of arc fault disconnection levels which depend on the magnitude of the arc fault. the average AC line current. The device according to claim 13, wherein the arc detection element comprises elements for generating the second arc fault activation signal based on a plurality of arc fault disconnection levels depending on the level of the arc fault. Alternating current line current detected. 19. The device according to claim 13, further comprising elements for simultaneously detecting the peak and average magnitude of the high-frequency arcing current and the AC line current so as to provide an immediate response to dangerous levels. in arc or line current of alternating current. The die according to claim 13, further comprising elements for partially disabling the arc detection for a finite period of time, providing the disabling of arc detection to a user the ability to use an electrical device that exhibits arcing. , the chronometer element enabling the arc detection after the use of the electric device has been discontinued. 21. The device according to claim 1, further comprising communication elements for the communication of the generation of the interruption signal. 22. The device according to claim 1, which also comprises elements to receive an external command to disable and disable the arc detection according to it. 23. The device according to claim 1, further comprising elements for a user to manually turn the arc detection on and off. 24. The device according to claim 1, further comprising elements for disabling arc detection during daylight hours and enabling arc detection at night. 25. The device according to claim 1, further comprising elements for enabling and disabling arc detection according to signals received from a remote infrared transmitter. 26. An arc fault circuit interrupter (AFCI) device electrically connected to an electrical wiring system between a power source that includes phase line and neutral side conductors and a load side that includes phase conductors and neutral, the device comprising: separation elements to separate the current flowing through the device in two portions so that a signal proportional to the current flow is generated through the phase and neutral conductors; arc fault circuit elements to detect the occurrence of an arc fault in the electrical wiring system, the arc fault circuit elements operative to generate an arc fault activating signal in response to the detection of a fault in the arc. arc; activating elements coupled with the arc fault circuit element, the activating elements for generating an interruption signal after receiving the arc fault activation signal; switch elements electrically connected in series between the conductors of the phase line and neutral side and the conductors of the phase and neutral load side, these switching elements to disconnect the power source to the conductors of the phase and neutral load side as a response to the interruption signal; and chronometer elements to partially disable arc detection over a finite period of time, disabling arc detection provides a user with the ability to use an electrical device that displays arcing, enabling the chronometer element to detect arcing after that the use of the electrical device has been discontinued. 27. An arc fault circuit interrupter (AFCI) device electrically connected to an electrical wiring system between an electrical power source that includes phase and neutral line side conductors and a load side that includes phase conductors and Neutral, the device comprising: first arc fault circuit element for measuring impedance in the electrical wiring system, the first arc fault circuit element operative to generate a first arc fault activating signal when the impedance of the arc fault system electrical wiring exceeds a previously determined first threshold; second arc fault circuit element for measuring the peak high frequency current level and the peak alternating current line current current flowing through the device to an electrical load connected to the load side, the second circuit element of operating arc fault to generate a second arc fault activating signal when the peak high frequency current exceeds a predetermined second threshold or when the peak alternating current line current exceeds a predetermined third threshold, - activating elements to generate an interruption signal after receiving the first arc fault activation signal or the second arc fault activation signal; and switching elements electrically connected in series between the conductors of the phase and neutral line side and the conductors of the phase and neutral load side, these switching elements to disconnect the electric power source to the conductors of the phase load side and neutral in response to the interruption signal. 28. An arc fault circuit interrupter (AFCI) device electrically connected to an electrical wiring system between an electrical power source that includes phase and neutral line side conductors and a load side that includes phase conductors and Neutral, the device comprising: first arc fault circuit element for detecting high impedance in the electrical wiring system, the first arc fault circuit element operative to generate a first arc fault activating signal when the system impedance electrical wiring exceeds a previously determined first threshold; second arc fault circuit element for measuring the average high frequency current level and the average alternating current line frequency current flowing through the device to an electrical load connected to the load side, the second circuit element operating arc fault to generate a second arc fault activating signal when the average high frequency current exceeds a predetermined second threshold or when the ac line frequency current exceeds a previously determined third threshold; activating elements to generate an interruption signal after receiving the first arc fault activation signal or the second arc fault activation signal, - and switching elements electrically connected in series between the conductors of the phase and neutral line side and the conductors of the phase and neutral load side, these switching elements to disconnect the electric power source to the conductors of the load side of phase and neutrals in response to the interruption signal. 29. A disposable arc fault circuit interrupter (AFCI) electrically connected to an electrical wiring system between a power source that includes phase and neutral line side conductors and a load side that includes phase conductors and Neutral, the device comprising: first arc fault circuit element for detecting high impedance in the electrical wiring system, the first arc fault circuit element operative to generate a first arc fault activating signal when the system impedance of electrical wiring exceeds a previously determined first threshold; second arc fault circuit element for measuring the average high frequency current level and the average alternating current line current current flowing through the device to an electrical load connected to the load side, the second circuit element of operating arc fault to generate a second arc fault activating signal using a plurality of disconnection levels of the average high frequency current based on the level of the AC line frequency current, - trigger elements to generate a interrupt signal after receiving the first arc fault activation signal or the second arc fault activation signal, - and electrically connected switching elements in series between the phase and neutral line side conductors and the side conductors phase and neutral load, these switch elements to disconnect the electrical power source trica to the drivers of the phase and neutral load side in response to the interruption signal. 30. An arc fault circuit interrupter device (AFCI i) electrically connected to an electrical wiring system between a power source that includes phase and neutral line side conductors and a load side that includes faee conductors and neutroe, the device comprising: current measuring elements for sensing the level of alternating current flowing through an electrical load placed on the load side of the device, first arc fault circuit element for detecting a high impedance condition in the electrical wiring system, high frequency elements to generate a high frequency signal that corresponds to the high frequency current level flowing through the load, - AC line frequency elements to generate a frequency signal of alternating current line corresponding to the level of alternating current line frequency qu e flows through the load, - arc detection elements to generate an arc fault activation signal according to the high frequency signal and the alternating current line frequency signal; activation elements for generating an interruption signal after receiving the arc fault activation signal; and interrupting elements electrically connected in series between the conductors of the phase and neutral line side and the conductors of the phase and neutral load side, the interrupting element for disconnecting the electric power source to the conductors of the load side of phase and neutral in response to the interruption signal. 31. The device according to claims 26, 27, 28, 29 or 30, further comprising circuit interrupting elements for interrupting the flow of current to a load electrically connected to the device in response to predetermined criteria. 32. The device according to claim 31, wherein the circuit interruption element comprises ground fault circuit interrupter (GFCI) elements for detecting the occurrence of a ground fault between the phase and ground conductor or between the neutral conductor and ground, the ground fault circuit element operative to generate a ground fault activating signal in response to ground fault detection. The device according to claims 27, 28, 29 or 30, wherein the first arc fault circuit element comprises test elements for testing the electric wiring system for a high impedance condition on a periodic basis. 34. The device according to claim 33, wherein the test element is the electrical wiring system for determining a high impedance condition every half cycle of the electric power source. 35. The device according to claim 27, 28, 29 or 30, wherein the first arc fault circuit element comprises elements for generating an impulse substantially proportional to the source impedance of the electric wiring system. 36. The device according to claim 27, 28 or 29, wherein the first arc fault circuit element comprises elements for activating a thyristor device coupled with the interruption element sufficiently briefly so as not to cause the interrupter element to disconnect. the power source of the load, the activation of the thyristor device by briefly charging an LC network through the electric power source so that a pulse generated therefrom is indicative of a high impedance condition. 37. The device according to claim 27, 29 or 30, further comprising circuit interruption elements comprising a transformer through which the conductors of the fae and neutral line side pass through, and further comprises elements of division of current electrically connected to the phase or neutral conductors to separate the current flow into two portions so that a small portion flows around the transformer, thereby generating a differential current proportional to the current flow through the phase or neutral conductor . 38. The device according to claims 26, 27, 28, 29 or 30, further comprising a transformer through which the phase and neutral conductors pass, the transformer operating as a ground / neutral differential transformer and operating for generate an arc fault pickup signal for use by the arc fault circuit element which is proportional to the current flowing through the phase and neutral conductors. 39. The device according to claim 38, wherein the current dividing element comprises an impedance. 40. The device according to claim 38, wherein the current separating element comprises a resistor. 41. The device according to claim 38, wherein the current divider element comprises a reactance. 42. The device according to claims 26, 27, 28, 29 or 30, further comprising elements for partially disabling the arc detection for a finite period of time, disabling the arc detection provides a user with the ability to of using an electrical device that exhibits arcing, the chronometer element enables arc detection after the use of the electrical device has been discontinued. 43. The device according to claims 26, 27, 28, 29 or 30, further comprising communication elements for communicating the generation of the interruption signal. 44. The device according to claims 26, 27, 28, 29 or 30, further comprising elements for receiving an external disable command and disabling the arc detection according to the same. 45. The device according to claims 26, 27, 28, 29 or 30, further comprising elements for a user to manually turn the arc detection on and off. 46. The device according to claims 26, 27, 28, 29 or 30, which further comprises elements for disabling arc detection during daylight hours and enabling arc detection at night. 47. The device according to claim 26, 27, 28, 29 or 30, further comprising elements for disabling and enabling arc detection according to signals received from a remote infrared transmitter. 48. In an arc fault circuit interrupter (AFCI) device connected to an electrical wiring system via phase and neutral line side conductors and phase and neutral load side conductors, a method for detecting arc faults , which comprises the steps of: detecting the existence of a condition of high impedance in the electric wiring system and generating a first arc fault signal as a response to it; to capture the level of alternating current that flows through an electric charge placed on the load side of the device; generate a high frequency signal corresponding to the level of high frequency current flowing through the load, - generate an AC line frequency signal corresponding to the level of alternating current line current flowing to through the charge; generating a second arc fault activation signal according to the high frequency signal and the alternating current line frequency signal; and disconnecting the source of electrical power to the phase and neutral load side conductors in response to the first and second arc fault signals. 49. The method according to claim 48, further comprising the step of detecting the occurrence of a ground fault between the phase conductor and ground or between the neutral conductor and ground and generating a ground fault activating signal in response to them. 50. The method according to claim 48, wherein the step of capturing comprises the step of separating the current flowing through either the phase or neutral conductor so that a differential current proportional to the current that is generated is generated. flows through the phase or neutral conductor. 51. The method according to claim 48, further comprising the step of providing a transformer through which the phase and neutral conductors pass, the transformer used to detect the occurrence of a ground fault between the phase conductor and neutral and capture the level of current flowing through the electrical load. 52. The method of compliance with the claim 48, which further comprises the step of partially disabling the arc detection for a finite period of time, the disabling of arc detection provides a user with the ability to use an electrical device that exhibits arcing, and enable arc detection after that the use of the electrical device has been discontinued. 53. The method according to claim 48, further comprising the step of communicating the generation of the interrupt signal. 54. The method of compliance with the claim 48, which further comprises the step of receiving an external disable command and disabling the arc detection according to it. 55. The method according to claim 48, further comprising the step of providing the ability for a user to manually turn on and off the arc detection. 56. The method according to claim 48, further comprising the step of disabling arc detection during daylight hours and enabling arc detection at night. 57. The method according to claim 48, further comprising the step of disabling and enabling the detection of the arc according to signals received from a remote infrared transmitter. SUMMARY An arc fault detector considered as an independent unit and in combination with a ground fault circuit interrupter (GFCI) operates to provide protection from potentially dangerous arc fault conditions. When combined with a ground fault circuit interrupter, the combination of arc fault / ground fault circuit interrupter (AFCI / GFCI) provides protection for both arc fault and ground fault conditions. A single transformer is used to detect faults between neutral, earth and arc faults. An impedance divides the current flow into two portions to generate differential current proportional to the current flowing through the conductors. An early arc detector periodically tests the AC line to determine high impedance between the device and a main circuit breaker panel. The arc fault circuit interrupter / ground fault circuit interrupter device detects both the AC line frequencies and the high frequencies associated with the arc. Both the average and instantaneous values of the arcing signals of both the AC and high frequency line frequency are processed to generate an arc fault signal. The device allows the arc detector to differentiate between high-level destructive arcing and low-level arcing such as that generated by typical household appliances and equipment. This serves to reduce the occurrence of false disconnection. The device also includes a timer circuit, which allows the user to temporarily disable the arc detector, and includes communication means to enable the device to communicate the occurrence and location of the arc fault to a centralized monitoring station.