MXPA98009022A - Structure of image signal data, image coding method and ima decoding method - Google Patents

Abstract

The present invention relates to a data structure of an image signal that includes a reproduction cycle identifier that indicates to the image display cycle of each frame whether it is variable or not. When the display cycle identifier indicates that the display cycle is fixed, display cycle data is inserted into a coded image data header, and data is inserted in relation to the frame number in each frame. On the other hand, when the display cycle identifier indicates that the display cycle is variable, display time data is inserted for each frame. Therefore, when the encoded image data having a fixed display cycle is decoded and displayed, the decoded image data can be displayed by a simple circuit structure, i.e., based on the display cycle data and the frame number data having a relatively small amount of data (number of bits), without referring to the display time data having a relatively large amount of data for each frame. In addition, this data structure can be applied to an encoded image signal that has a variable display cycle.

Description

SIGNAL DATA STRUCTURE OF P ^ KET IMAGE ENCODING METHOD AND IMAGE DECODING METHOD FIELD DB THE INVBNCIQW The present invention relates to an image signal data structure, an image coding method and an image decoding method. More particularly, the invention relates to an image signal data structure which includes reproduction timing data for reproduction timing which includes decoding the display of an image for each of the frames as components of an image, generation (coding) of an encoded image signal that includes the reproduction timing data and the decoding of the encoded image signal. Further, the present invention relates to an image coding apparatus for generating the encoded image signal, an image decoding apparatus performing the aforementioned decoding, a data storage medium containing an encoded image signal of the data structure described above, and a data storage medium containing an image processing program to implement the encoding and REF: 28747 decoding, mentioned above by the use of a computer.

BACKGROUND OF THE INVENTION In recent years, we have seen the arrival of multimedia in which data of audio, video and other data are handled integrally, as well as additional information media, that is, means to transmit information to people such as newspapers, magazines, televisions, radios and phones that have been adopted as multimedia objects. Generally, the term "multimedia" means that it represents, not only characters, but also diagrams, spoken speech and especially images simultaneously in relation to one another. In order to handle conventional information media such as multimedia objects, it is necessary to convert media information into a digital format. When the amount of data of each information medium described above is estimated as a quantity of digital data, in case of characters, the amount of data for each character is 1-2 octets. However, in the case of spoken speech, the amount of data is 64 kbit / s. (quality for telecommunication), and in the case of a movie, it is more than 100 mbit per second (quality for the current television broadcast). In this way, in the information medium such as televisions, it is not practical to process such mass data as they are in a digital format. For example, although the visual telephones have already implemented the use by ISDN (integrated services digital network) that has a transmission speed of 64 kbps-1.5 Mbps, it is impossible to transmit an image of a television camera as such by the ISDN. In this way, data compression technologies are topped. In the case of visual telephones, a standardized film compression technology such as H.261 is used by ITU-T (International Telecommunication Union-Telecommunication Sector). In addition, according to an MPEG1 data compression technology, it is possible to record image data, along with audio data on a common music CD (compact disc). The MPEG (Moving Picture Experts Group) is an international standard that is related to a technology to compress and expand an image signal that corresponds to a movie, and MPEG1 is a standard for compressing data from a movie at 1.5 Mbps, that is, Compress data from a television signal to approximately 1/100. Since the transmission speed at which MPEG1 is directed is limited to approximately 1.5 Mbps, MPEG2 capable of compressing film data at 2-15 Mbps has been standardized to meet the demand for higher image quality. In image compression and expansion technologies, according to MPEG1 and MPEG2 which have already been implemented, only a fixed frame rate is basically used, specifically, the intervals between frame image display timings respective are regular. Thus, there are only several kinds of frame rates, and in MPEG2 a frame rate designated by a flag is selected (frame rate code) which is standardized with coded data, of a plurality of frame rates (frame rate values) with reference to a table shown in figure 13. Under the existing circumstances, the standardization of MPEG4 has now been advanced by the working group for the standardization of MPEG1 and MPEG2 (ISO / IEC JTC1 / SC29 / G11). MPEG4 allows coding and signal operation in object units, and performs new functions necessary in the multimedia era. MPEG4 allows coding and signal operation in object units, and performs new functions required in the multimedia era. MPEG4 originally aimed at standardizing image processing at a low bit rate, but the object of standardization has now been extended to more versatile image processing that includes a high bit rate image processing adaptable to an image interlaced. Also in MPEG4, when you add a table similar to the table for MPEG2 (see figure 13) at the beginning of a video object layer (corresponding to an MPEG2 video stream), the frame rates can be expressed from according to the table. However, in MPEG4, since image signals are processed in a wide range from a low bit rate image signal to a high quality bit rate image signal, the number of frame rates required It is uncountable. Therefore, it is difficult to make the decision of frame speeds by using a table. In this way, MPEG4 uses a data structure that includes frame display time data inserted in each frame, in order to work with an almost uncountable number of fixed frame rates and, in addition to process an image that has variable intervals of image display portions or decoding timing of the respective frames. Fig. 14 shows a data structure of a conventional encoded image signal 200. The encoded image signal 200 corresponds to an image (in MPEG4, a series of frames that constitutes an image corresponding to an object) and includes a header H at the beginning. The H header is followed by code sequences SaO, Sal, Sa2, ..., San corresponding to the frames F (0), F (l), F (2), ..., F (n), respectively , sequences of code which are arranged according to priority for transmission (transmission order). Here, "n" is the quantity that indicates the order of data transmission of each frame in the sequence of frames that corresponds to an image, and n of the initial frame is 0. In this example, in the beginning of the SaO code sequences , Sal, Sa2, ..., San of the respective frames, the data of display time DtO, Dtl, Dt2, ... Dtn indicating the display timings of the frames are arranged. The respective display time data is followed by coded image data CgO, Cgl, Cg2, ..., Cgn. Since each of the display time data indicates a time relative to a reference time, the amount of data required to express this display time, i.e., the number of bits of the display time data, is increased. as the number of frames constituting the image increases. In addition, at the decoding end of the encoded image signal according to the display time data DtO -Dtn inserted in the SaO-San code sequences corresponding to the respective frames, the image display of each frame is brought to at the time indicated by the exhibition time data. Figure 15 shows the order of transmission and the order of display of the coded image data corresponding to each frame in the series of frames. As described above, "n" indicates the order of transmission, and "n1" indicates the order of display (n 'of the initial frame is 0). further, the frames F (n) F (0) ~ F (18) are placed in the base in the order of frames in the data structure shown in Fig. 14 (transmission order). Frames F (n) arranged in the order of transmission are rearranged according to the display order of the frames as shown by the dates in Figure 15, resulting in frames F '(n1), F' ( 0) F¡ (18)) arranged in the order of display. Consequently, a frame F (n) and a frame F '(n1) related to each other with an arrow are identical. For example, the frames F (0), F (l), F (2) and F (3) are identical to the frames F! (0), D '(3), F' (l), and F ' (2), respectively. Between the frames F (n), F (0) ~ F (18)) placed in the order of transmission, the frames F (0) and F (13) are frames I (intraimage) (hereinafter also referred to as I-VOP).

The frames F (l), F (4), F (7), F (10) and F (16) are frames P (predictive image) (hereinafter referred to as P-VOP), and frames F (2) ), F (3), F (5), F (6), F (8), F (9), D (ll), F (12), F (14), F (15), F (17) ) and F (18) are frames B (bidirectionally predictive image) (hereinafter also referred to as B-VOP). When frames F (n) F (0) ~ F (18)) placed in the order of transmission (IPBBPBBPBBPBBIBBPBB) are reareglan in the order of display (IBBPBBPBBPBBPBBIBBP), this display order n1 is represented by frame numbers B (n) B (0) ~ B (18)) corresponding to the respective frames F (n). That is, the numbers of frames B (n) representing the numbers n 'indicate the order of display. To be specific, as shown in Figure 15, B (0) = 0), B (l) = 3, ..., B (17) = 16, B (18) = 17. Consequently, the L-cycle of image display of the I-VOP is 15, and the cycle of image display M of the VOP that includes both the I-VOP and the P-VOP is 3. The number of frames B (n) = n 'is represented by the following formulas (1) ~ (3) using n. B (n) = n = 0 (n = 0) ... (1) B (n) = (n) + M-1 (n = Mxi + l) ... (2) where i and M are numbers integers not less than 0 (0, 1, 2, ...). B (n) = n ~ l (where n is different from the previous values) ... (3). The first I-VOP satisfies the condition (n = 0), the I-VOP satisfies the condition (n = Mxi + l) and the B-VOP satisfies the condition (when n it is different from the previous values).

The formulas (1) ~ (3), define the relation B (n) = n 'between the order of display n1 and the order of transmission n in the case in which the code sequences of the frames corresponding to the I- VOP P-VOP and B-VOP respectively transmit periodically. In other cases than those mentioned above, the order of display n 'and the order of transmission n are correlated one by one by a relational expression or a method different from that of formulas (1) ~ (3). Figure 16 is a diagram for explaining an example of an image display method wherein the intervals of the image display timings of the respective frames are variable. In the figure, t '(n), t' (l), t '(2), t' (3), t '(4), ...) indicates the interval at the moment in which the display of the image of the frame F '(n'-l) and the moment in which the display of the image of the frame F' (n!), and h '(l), h' (2) and h '(3) indicate the times for image display of the frames F' (l) (, F '(2) and F' (3), respectively, with time h '(0) for the frame image display F '(0) as a reference In addition, h (n) h (l), h (2), h (3), h (4), ...) indicates the time the frame image display F ( n), F (2), F (3), F (4), ...) with time h '(0) for the frame image display F (0) = F' (0) as a reference .

Consequently, the display time h '(n1) of the frame F' (n1) arranged in the order of display is expressed by h '(n') = h '(n' ~ l) + t '(n') and h '(0) = 0. After . the decoding and display of the image of the encoded image signal having the data structure shown in Figure 14 will be briefly described using Figure 16. At the decoding end, when the encoded image signal 200 shown in the figure is entered. 14, the encoded image data CgO, Cgl, Cg2, ... of the respective frames F (0), F (l), F (2), ... are decoded as the constituents of the encoded image signal, and the images corresponding to the frames F (0), F (l), F (2), ... are displayed at the time of image display h (0), h (l), h (2) ,. .. based on the display time data DtO, Dtl, Dt2, ... of the respective frames. In this way, even when the intervals between the image display timings of the respective frames (image display cycle) of the coded image signal are not fixed, that is, they are variable., the encoded image signal is decoded at the decoding end and displayed at a prescribed timing. When the intervals between the image display timings of the respective frames of the coded image signal are fixed, as in the case where the intervals are variable, the images corresponding to the frames F (0) are displayed, F (l), F (2), ... in the times of image display h (0), h (l), h (2), ... on the basis of the display time data DtO, Dtl , Dt2, ... of the respective frames. Incidentally, when you express a frame rate (number of frames displayed in a second) simply with k bits (k: natural number), you can not express a frequency used for television broadcast, for example, 29.97 .. .Hz (to be exact, 30000/1001 Hz). In this way, such a frame rate is expressed as follows. That is, a prescribed time interval (module 1 time), for example, a second, is divided into N (N: natural number) to obtain a subunit of time (l / N) and, using this as a unit of time (time interval 1), the display time of each frame is expressed both for the image that has a variable frame rate and for the image that has a fixed frame rate. To be specific, as shown in Figure 17 (a), the display time of each of the images VOP0, V0P1, VOP2 and V0P3 corresponding to frames F '(0), F '(l), F' (2), and F '(3) arranged in the order of display is expressed by y pieces (increase in VOP velocity) of l / N (subunit of time) with a time X as a reference, that is, is expressed by y / N: For the images V0P1, V0P2, V0P3 and V0P4, and is defined as follows: y = y'0, y = y ' l, y = y'2 and y = y'3, respectively. Figure 17 (c) shows an encoded image signal 200a having a data structure in which the image display timings of the respective frames are expressed by using the time subunit (l / N sec) and y. The encoded image signal 200a includes a header H containing time subunit Dk data indicating N (natural number) to obtain the time subunit, and the H header is followed by Sbn code sequences (SbO, Sbl, Sb2, ...) corresponding to the respective frames F (n), (F (0), F (l), F (2), ...). Each Sbn code sequence contains data multipliers of display sites Dyn (DyO, Dyl, Dy2, ...) indicating a display time h (n), h (0), h (l), h (2) ,. ..) which is measured by using the time subunit (l / N) and the number of (l / N), with time X as a reference. In Figure 17 (c) Cgn (CgO, Cgl, Cg2, ...) are the coded image data corresponding to the respective frames F (n), F (0), F (l), F (2) , ...). However, when the VOPO image is an I-VOP (frame I), V0P2 and V0P3 are B-VOP (frames B), and V0P4 is a P-VOP (frame P), as shown in Fig. 17 (b) in the bitstream of the coded image signal 200a shown in Fig. 17 (c), the P-VOP (VOP3) and the B-VOP (VOP1 ) are placed as code sequences of frames F (l) and F (2) which follow the frame code sequence F (0) that corresponds to I-VOP (VOPO). A description of the drawbacks of the image signal data structures described with respect to Figures 14-16 is now provided. As described above, in 'an encoded image signal obtained by encoding an image signal having a fixed frame display timing interval T, the frame display time h (n) of each frame is expressed by h (n) = n'xT, where n 'is the number that indicates the display order, and n' = B (n). In other words, when the encoded image signal having the fixed frame display interval T (i.e., a coded signal of an image having a fixed frame rate) is decoded for display if the period T (the interval of fixed display) is detectable at the end of decoding, the display time h (n) of the nth frame F (n) in the order of transmission can be decided only by increasing the interval and display T by n '(= B ( n)) times. However, when the encoded image signal is decoded, there is no choice but to perform a complicated display using the display type data Dtn (DtO, Dtl, Dt2, ...) inserted in the coded image signals corresponding to the respective frames F (n), (F (0), F (l), F (2), ...) as shown in Figure 14. Below is a description of the drawbacks of the signal data structures of images described with respect to Figures 17 (a) -17 (c). As described above, in the proposed image signal data structure the current MPEG4, even when setting the frame rate, the value of this frame rate can not be known unless several frames are decoded and, therefore, Therefore, it is difficult to simplify the circuit structure to implement the actual decoding process. This problem will be briefly described. When VOPO is I-VOP (frame I), VOP1 and VOP2 are B-VOP (frames B) and the VOP3 is a P-VOP (frame P) as shown in figure 17 (b), since the frame F (0) corresponds to the I-VOP (frame I) is followed by the frame F (l) corresponding to P-VOP (frame P) and the frame F (2) corresponding to B-VOP (frame B) in the bit stream of the coded image signal 200a shown in figure 17 (c), the display cycle of frame (1 fixed VOP increment), that is, the interval between the I-VOP display timing and the display timing of the next B-VOP (frame B), can not be known until the frame F is transmitted (2) ) corresponding to B-VOP (frame B).

BRIEF DESCRIPTION OF THE INVENTION The present invention is made to solve the problems described above and has as its objective to provide an image signal data structure which allows a reproduction process that includes decoding an image display for an encoded image signal having a fixed cycle of reproduction for each frame at the decoding end, such as a fixed frame rate (image display cycle for each frame) by using a simple physical hardware structure, and also allows a reproduction process for a signal from encoded image that has a variable reproduction cycle for each frame, such as a variable frame rate. Another object of the present invention is to provide an image coding method and an image coding apparatus capable of performing an image coding process which allows a reproduction process that includes decoding and displaying an image for a coded image signal that has a fixed cycle of reproduction for each frame at the decoding end, such as a fixed frame rate (cycle of image display for each frame) by using a simple structure of physical elements, which also allows a reproduction process for a encoded image signal having a variable cycle of reproduction for each frame, such as a variable frame rate. Still another objective of the present invention is to provide an image decoding method and an image decoding apparatus capable of performing an accurate reproduction process including decoding and displaying an image for a coded image signal, according to the determination of if the reproduction cycle of each frame is variable or not. Yet another objective of the present invention is to provide an image signal data structure which allows the detection of the value of a frame rate or the like of an encoded image signal having a fixed frame rate or the like, before decoding each frame, and that simplifies several structures of physical elements to implement a reproduction process that includes decoding and displaying an image. A further object of the present invention is to provide an image coding method and an image coding apparatus capable of detecting the value of a frame rate or the like of an encoded image signal having a fixed frame rate or the like before decoding each frame, and performing a reproduction process that includes decoding and displaying an image for the encoded image signal by a simple structure of physical elements. A further objective of the present invention is to provide an image decoding method and an image decoding apparatus capable of accurately decoding the encoded image signal obtained by the coding process described above. Another object of the present invention is to provide a data storage medium containing an encoded image signal having the data structure described above, and a data storage medium containing an image processing program for implementation, with a computer, the image coding method and the image decoding method described above. Other objects and advantages of the invention will become apparent from the detailed description that follows. The detailed description and the specific embodiments described are provided for illustration only since various additions and modifications within the spirit and scope of the invention will become apparent to those familiar with the art, from the detailed description. According to a first aspect of the present invention, a data structure of an image signal is provided for which an image reproduction of each frame is performed in the prescribed cycle, and the image signal data structure includes a reproduction cycle identifier which indicates whether the image reproduction cycle for each frame is variable or not. Therefore, when the reproduction cycle for each frame is fixed, the production of the image signal can be performed, such as the decoding of the encoded image signal and display of the decoded image signal by a simple circuit structure . According to a second aspect of the present invention, in the image signal data structure of the first aspect, the reproduction cycle identifier is a display cycle identifier which indicates whether the image display cycle for each frame is variable or not. Therefore, when the image display cycle for each frame is fixed, the display of the decoded data obtained by decoding the encoded image signal can be carried out by a simple circuit structure. According to a third aspect of the present invention, the image signal data structure of the second aspect includes a fixed display cycle identifier which indicates that the image display cycle for each frame is fixed, such as the cycle identifier. of exhibition; the display cycle data indicates that the display cycle for each frame; and the frame position data corresponding to each frame and indicate the positional relationship of each frame with the previous and subsequent frames. Therefore, when the image display cycle for each frame is fixed, the display timing of the frame can be defined according to the display cycle data and the frame position data. According to a fourth aspect of the present invention, the image signal data structure of the second aspect includes a variable display cycle identifier which indicates the image display cycle for each frame as a variable, such as the cycle identifier of display; and display timing data indicating the timing at which the image display of each frame is performed, the timing is adjusted relatively to the selected desired reference time of at least one reference time, according to each frame. Therefore, when the image display cycle for each frame is variable, the timing of the frame image display can be defined according to the display timing data. According to a fifth aspect of the present invention, in the image signal data structure of the first aspect, the reproduction cycle identifier is a display cycle identifier which indicates whether the decoding cycle of a coded image signal corresponding to each frame is variable or not. Therefore, when the decoding cycle for each frame is fixed, the decoding of the encoded image signal can be performed by a simple circuit structure. According to a sixth aspect of the present invention, the image signal data structure of the fifth aspect includes a fixed decode cycle identifier which indicates that the decoding cycle for each frame is fixed, such as the decoding cycle identifier; the decoding cycle data indicates the decoding cycle for each frame; and the frame position data corresponding to each frame and indicate the positional relationship of each frame with the previous and subsequent frames. Therefore, when the decoding cycle for each frame is fixed, the decoding timing of the frame can be defined according to the decoding cycle data and the frame position data. According to a seventh aspect of the present invention, the image signal data structure of the fifth aspect includes a variable decoding cycle identifier which indicates that the decoding cycle for each frame is variable, such as the decoding cycle identifier; and decoding timing data indicating the timing at which the decoding of each frame is performed, the timing is adjusted in relation to a desired reference time selected from at least one reference time, according to each frame. Therefore, when the decoding cycle for each frame is variable, the decoding timing of the frame can be defined according to the decoding timing data. According to an eighth aspect of the present invention, there is provided an image coding method for encoding an image signal corresponding to a specific image to generate a coded image signal, and transmitting the coded image signal together with the identifier of reproduction cycle that indicates whether the image reproduction cycle for each of the frames constituting the image is variable or not. In this method, when an image signal having a fixed cycle of image reproduction for each frame is inputted as the image signal to be encoded, the reproduction cycle data and the frame position data are transmitted together with the identifier of reproduction cycles, the reproduction cycle data indicating the image reproduction cycle for each frame, and the frame position data corresponding to each frame and indicating the position relationship of each frame with the previous and subsequent frames .. When an image signal having a variable cycle of image reproduction for each frame is inputted as the image signal to be encoded, the reproduction timing data is transmitted together with the reproduction cycle identifier, the timing data of reproduction indicating the timing at which the image reproduction of each frame is performed, the timing is adjusted in relation to a desired reference time selected from at least one reference time, according to each frame. In this method, the image signal having a variable cycle of image reproduction for each frame and an image signal having a fixed cycle of image reproduction for each frame can be encoded together with data indicating the reproduction timing of the frame. Each frame according to each image signal. Therefore, when the reproduction cycle is set for each frame, the number of bits required to adjust the playing time can be reduced and, in addition, the reproduction of the image having a variable frame reproduction cycle can be performed in the same way as conventional reproduction. According to a ninth aspect of the present invention, in the image coding method of the eighth aspect, the reproduction cycle identifier is a display cycle identifier which indicates whether the image display cycle for each frame is variable or do not; the reproduction cycle data is display cycle data indicating the image display cycle for each frame; and the reproduction timing data is display timing data indicating the timing at which the picture display of each frame is performed, the timing is adjusted in relation to a desired reference time selected from at least one time of reference, according to each frame. Therefore, when the display cycle is set for each frame, the number of bits required to adjust the display time can be reduced and, in addition, the display of the image having a variable frame display cycle can be performed. in the same way as conventional expression. According to a tenth aspect of the present invention, in the image coding method of the eighth aspect, the reproduction cycle identifier is a decoding cycle identifier which indicates whether the decoding cycle of the encoded image data corresponds to each frame is variable or not; the reproduction cycle data is decoding cycle data indicating the decoding cycle for each frame; and the reproduction timing data is decoding timing data indicating the timing at which the decoding of each frame is performed, the timing is adjusted relatively to a desired reference time that is selected from at least one reference time , according to each frame. In this way, when setting the decoding cycle for each frame, the number of bits required to adjust the decoding time of each frame can be reduced and, in addition, the decoding of the image having a decoding cycle can be performed. variable frame in the same way as conventional decoding. According to a eleventh aspect of the present invention, there is provided an image decoding method for decoding an encoded image signal which includes encoded image data corresponding to frames constituting an image, and a reproduction cycle identifier which indicates whether the image reproduction cycle for each frame is variable or not. In this method, when the reproduction cycle identifier indicates that the image reproduction cycle for each frame is fixed, the decoded image data obtained by decoding the encoded image data corresponding to each frame becomes image data having a reproduction timing which is decided in accordance with the reproduction cycle data indicating the reproduction picture cycle for each frame and the frame position data indicating the position relationship of each frame with the previous and subsequent frames , data which are included in the encoded image signal. When the reproduction cycle identifier indicates that the image reproduction cycle for each frame is variable, the decoded image data obtained by decoding the encoded image data corresponding to each frame which are image data having a reproduction timing decided in accordance with the timing data of reproduction which are included in the encoded image signal and indicate the timing at which the image reproduction of each frame is carried out, the timing is adjusted relatively to a desired reference time which is selected from at least one reference type, according to each frame. Therefore, the reproduction of the encoded image signal, which includes decoding and displaying, can be performed precisely according to whether the reproduction timing of each frame of the encoded image signal is variable or not. According to a twelfth aspect of the present invention, in the image decoding method of the eleventh aspect, the reproduction cycle identifier is a display cycle identifier which indicates whether the image display cycle of each frame is variable or not; the reproduction cycle data is display cycle data indicating the image display cycle for each frame; and the reproduction timing data is display timing data indicating the timing at which the display of each frame is performed. Therefore, the display of the image signal can be carried out accurately according to whether the display timing of each frame of the encoded image signal is variable or not. According to a thirteenth aspect of the present invention, in the image decoding method of the eleventh aspect, a decoding timing is established at which the decoding of each frame is carried out, according to the timing data of each frame. display of a plurality of frames that include an object frame that has just been decoded. Therefore, not only the display but also the decoding of each frame can be carried out according to the display timing data. According to a fourteenth aspect of the present invention, in the image decoding method of the thirteenth aspect, based on the display timing data of the object frame and the display timing data of the frames subsequently displayed to the frame. In this object, the decoding timing of the object frame is set to a timing that is earlier, for a prescribed deviation time, compared to the previous display timing between the display timings of the object frame and the next frame. Therefore, the decoding of each frame can be performed according to the display timing data, without impeding the display flow.

According to a fifteenth aspect of the present invention, in the image decoding method of the fourteenth aspect, when the display timing of the object frame is earlier than the display timing of the next frame, the deviation time is set to a length greater than the time required to decode the object frame; and when the display timing of the next frame is earlier than the display timing of the object frame, the deviation time is set to a length greater than the sum of the time required to decode the object frame and the time required to decode the next frame . Therefore, the decoding of coded image data corresponding to a series of frames including P-VOP and B-VOP as well as I-VOP can be performed in accordance with the display timing data. According to a sixteenth aspect of the present invention, in the image decoding method of the eleventh aspect, the reproduction cycle identifier is a decoding cycle identifier that indicates whether the decoding cycle of the encoded image data which correspond to each frame is variable or not; the reproduction cycle data is decoding cycle data indicating the decoding site for each frame; and the reproduction timing data is decoding timing data indicating the timing at which the decomposition of each frame is performed. Therefore, the decoding of the encoded image signal can be carried out accurately according to whether the decoding timing of each frame of the encoded image signal is variable or not. According to a seventeenth aspect of the present invention, the image signal data structure of the first aspect further includes time subunit data indicating the length of a subunit of time which is obtained by dividing a prescribed time interval. Between N (natural number), by the natural number N; and reproduction cycle multiplier data indicating that the image reproduction cycle for each frame is the time subunit multiplied by M (natural number) by the multiplier M. Therefore, when processing an encoded picture signal that has a fixed frame rate, the value of the frame rate can be detected before decoding each frame, so that the various structures of physical elements can be simplified to implement the reproduction that includes decoding and display. According to a eighteenth aspect of the present invention, in the image signal data structure of the seventeenth aspect, the reproduction cycle identifier is a display cycle identifier which indicates whether the image display cycle for each frame is variable or not; and the reproduction cycle multiplier data is display site multiplier data which indicates that the image display cycle for each frame is the time subunit multiplied by M (natural number), by the multiplier M. Therefore, various structures of physical elements can be simplified to implement the image display. According to a nineteenth aspect of the present invention, in the image signal data structure of the seventeenth aspect, the reproduction cycle identifier is a decoding cycle identifier that indicates whether the frame decoding cycle is variable or not; and the reproduction cycle multiplier data are decoding cycle multiplier data which indicate that the decoding cycle for each frame is the time subunit multiplied by M (natural number) by the multiplier M. Therefore, it is they can simplify various physical element structures to implement decoding. According to a twentieth aspect of the present invention, an image coding method is provided for encoding an image signal corresponding to a specific image to generate a coded image signal, and transmitting the coded image signal together with a reproduction cycle identifier which indicates whether the cycle of Image reproduction for each of the frames that make up the image is variable or not. In this method, when the image signal having a fixed cycle of image reproduction for each frame is inputted as the image signal to be encoded, the time subunit data and the cycle multiplier data are transmitted together. reproduction with the reproduction cycle identifier, the time subunit data indicate the length of time subunit which is obtained by dividing a prescribed time interval between M (natural number) by the natural number M, and the multiplier data of production site that indicate the image reproduction site for each, frame is the time subunit multiplied by M (natural number), by the multiplier M. Therefore, when processing a processed image signal that has a fixed frame rate, the value of the frame rate can be detected before decoding each frame, so that playback can be performed which includes decoding and displaying tion with a simple structure of physical elements. According to a twenty-first aspect of the present invention, in the image coding method of the twentieth aspect, the reproduction cycle identifier is a display cycle identifier that indicates whether the image display cycle for each frame is variable or not; and the reproduction site multiplier data is display site multiplier data which indicates that the image display cycle for each frame is the time subunit multiplied by M (natural number) by the multiplier M. Therefore , various structures of physical elements can be simplified to implement the display at the decoding end. According to a twenty-second aspect of the present invention, in the image coding method of the twentieth aspect, the reproduction cycle identifier is a decoding cycle identifier which indicates whether the decoding cycle for each frame is variable or not.; and the multiplication, reproduction cycle data is decoding cycle multiplier data which indicates that the decoding cycle for each frame is the time subunit multiplied by M (natural number) by the multiplier M. Therefore, Several physical element structures can be simplified to implement decoding. According to a twenty-third aspect of the present invention, there is provided an image decoding method for decoding an encoded image signal including the following data: encoded image data corresponding to frames constituting an image; a reproduction cycle identifier which indicates whether the image reproduction cycle for each frame is variable or not; data of subunit of time that indicate the length of a subunit of time which is obtained by dividing a time interval prescribed in N (natural number), by the natural number N; and the reproduction cycle multiplier data indicating that the image reproduction cycle for each frame is the time subunit multiplied by M (natural number), by the multiplier M. In this method, when the reproduction cycle identifier indicates that the image reproduction cycle for each frame is fixed, the decoded image data obtained by decoding the encoded image data corresponding to each frame produce image data having a reproduction timing which is decided according to the time subunit data indicating the length of the time subunit and the reproduction cycle multiplier data indicating the image reproduction cycle for each frame. Therefore, when processing an encoded image signal having a fixed frame rate, the value of the frame rate can be detected before decoding each frame, so that the structure of physical elements at the end can be simplified. of decoding. According to a twenty-fourth aspect of the present invention, in the image decoding method of the twenty-third aspect, the reproduction cycle identifier is a display cycle identifier that indicates whether the image display cycle for each frame is variable or not; and the multiplication data of the reproduction cycle are display cycle multiplier data which indicate that the image display cycle for each frame is the time subunit multiplied by M (natural number) by the multiplier M. Therefore, , the structure of physical elements for display at the decoding end can be simplified. According to a twenty-fifth aspect of the present invention, in the image decoding method of the twenty-third aspect, the reproduction cycle identifier is a decoding cycle identifier which indicates whether the decoding cycle of each frame is variable or do not; and the reproduction cycle multiplier data is data of the decoding cycle multiplier which indicates that the decoding cycle for each frame is the time subunit multiplied by M (natural number) by the multiplier M. Therefore, the structure of physical elements can be simplified to decode at the decoding end. According to a twenty-sixth aspect of the present invention, an image coding apparatus for encoding an image signal corresponding to a specific image is provided, and the apparatus comprises an encoder for encoding an input image signal and encoded output image; a cycle decision unit for deciding whether the image reproduction cycle for each of the frames constituting the image is variable or not, based on the image signal, and transmitting a reproduction cycle identifier indicating the result of the decision; a first data generator for generating reproduction cycle data indicating the image reproduction cycle for each frame, according to the image signal; a second data generator for generating frame position data corresponding to each frame and indicating the positional relationship of each frame with the previous and subsequent frames, according to the image signal; a third data generator for generating reproduction timing data indicating the timing at which the image reproduction is performed for each frame, according to the image signal; an ON / OFF switch for switching the circuit between the ON state in which the reproduction cycle data is transmitted, and the OFF state where the reproduction cycle data is interrupted, according to the reproduction cycle identifier; a selector switch for selecting one of the frame position data and the reproduction timing data, according to the reproduction cycle identifier; a multiplexer for multiplexing the outputs or transmissions of the encoder, the cycle decision unit, and the switches in a prescribed order; and the image encoding apparatus transmits a bit stream obtained by the multiplication as a coded image signal. In this apparatus, an image signal having a variable cycle of image reproduction for each frame and an image signal having a fixed cycle of image reproduction for each frame can be encoded with data indicating the reproduction timing of each frame. frame according to each image signal. Therefore, when the reproduction cycle is set for each frame, the number of bits required to adjust the playback time can be reduced and, in addition, the reproduction of the image having a frame production cycle can be easily performed. variable. According to a twenty-seventh aspect of the present invention, an image decoding apparatus for decoding and reproducing the image signal output of the image coding apparatus of the twenty-sixth aspect is provided, and the apparatus comprises a demultiplexer for receiving the signal encoded image, and separating the encoded image signal into the encoded image data, the reproduction cycle identifier, the reproduction cycle data, the frame position data and the reproduction timing data, and then transmitting these data; a decoder for decoding the encoded image data, frame by frame, to generate decoded image data; an ON / OFF switch for switching the circuit between the ON state where the reproduction cycle data is transmitted, and the OFF state, when the reproduction cycle data is interrupted, according to the reproduction cycle identifier; a selector switch for selecting one of the frame position data and the reproduction timing data, according to the reproduction cycle identifier; and a display unit for performing image display of each frame according to the decoded image data; and wherein at least one of the decoded by the decoder and the image display by the display unit is performed at a reproduction timing determined by the reproduction cycle data and the frame position data or a decided reproduction timing. by the reproduction timing data, according to the reproduction cycle identifier. Therefore, the reproduction of the encoded image signal, which includes decoding and displaying, can be performed precisely according to whether the reproduction timing of each frame of the encoded image signal is variable or not. According to a twenty-eighth aspect of the present invention, an image coding apparatus for encoding an image signal corresponding to a specific image is provided, and the apparatus comprises an encoder for encoding an input image signal and image data. encoded output; a cycle decision unit for deciding whether the image reproduction cycle for each of the frames constituting the image is variable or not, based on the image signal, and transmitting a reproduction cycle identifier indicating the result of the decision; a first data generator for generating time subunit data indicating the length of a subunit of time which is obtained by dividing a prescribed time interval between N (natural number), by the natural number N; and a second data generator for generating reproduction cycle multiplier data indicating that the image reproduction cycle for each frame is the time subunit multiplied by M (natural number), by the multiplier M, according to the signal of image; a third data generator for generating reproduction timing data indicating the timing at which the image reproduction of each frame is carried out, according to the image signal; a first ON / OFF switch for switching the circuit between the ON state where the time subunit data is transmitted, and the OFF state where the time subunit data is interrupted, according to the reproduction cycle identifier; a second ON / OFF switch to switch the circuit between the ON state, where the reproduction cycle multiplier data is transmitted, and the OFF state where the reproduction cycle multiplier data is interrupted, according to the reproduction cycle identifier; a multiplexer for multiplexing the outputs of the encoder, the cycle decision unit, the third data generator and the first and second ON / OFF switches in a prescribed order; and the image encoding apparatus transmits a bit stream obtained by the multiplication as the encoded image signal. Therefore, when an encoded image signal having a fixed frame rate at the decoding end is processed, the value of each frame rate can be detected before decoding each frame, whereby the reproduction of the frame can be performed. encoded image signal, including decoding and display, through a simple structure of physical elements. According to a twenty-ninth aspect of the present invention, an image decoding apparatus for decoding and reproducing the encoded image signal output from an image coding apparatus of the twenty-eighth aspect is provided, and the apparatus comprises a demultiplexer for receiving the encoded image signal and separating the encoded image signal into the encoded image data, and reproduction cycle identifier, the time subunit data, the reproduction cycle multiplier data and the reproduction timing data , and then transmit this data; a decoder for decoding the encoded image data, frame by frame, to generate decoded image data; a first ON / OFF switch to switch the circuit between the ON state, where the reproduction cycle multiplier data is transmitted, and the OFF state where the data is interrupted, of the reproduction cycle multiplier, in accordance with the reproduction cycle identifier; a second ON / OFF switch for switching the circuit between the ON state where the reproduction timing data is transmitted and the OFF state where this data is interrupted, according to the reproduction cycle identifier; an display unit for performing image display of each frame according to the decoded image data; wherein at least one of the decoded by the decoder in the image display by the display unit is performed at a reproduction timing determined by the reproduction data decided by the subunit time data and the cycle multiplier data. reproduction or a reproduction timing determined by the reproduction timing data, according to the reproduction cycle identifier. Therefore, when an encoded image signal having a fixed frame rate is processed, the value of the frame rate can be detected before decoding each frame, so that the structure of physical elements at the end can be simplified. decoding According to a thirtieth aspect of the present invention, a data storage means is provided that contains an image signal for which image reproduction is performed for each frame, in a prescribed cycle, and the image signal includes a playback cycle identifier that indicates whether the image reproduction cycle for each frame is variable or not. For the. both, when using the data storage medium, when the reproduction cycle is set for each frame, reproduction of the image signal can be performed, such as decoding the encoded image signal and displaying the decoded image signal , with a simple circuit structure. According to a thirty-first aspect of the present invention, a data storage means is provided that contains an image signal for which image reproduction is performed for each frame in a prescribed cycle, and the image signal includes a playback cycle identifier which indicates whether the image reproduction for each frame is variable or not; the time security data indicates the length of a subunit of time which is obtained by dividing a prescribed time interval between N (natural number) by the natural number N, and the reproduction of data of the cycle multiplier which indicates that the image reproduction cycle for each frame is the time subunit multiplied by M (natural number), by the multiplier M. Therefore, when using the data storage medium, the value of a fixed frame rate can be detected of an encoded image signal before decoding each frame, whereby several physical element structures can be simplified to implement reproduction that includes decoding and displaying. According to a thirty-second aspect of the present invention, a data storage medium containing an image processing program is provided, and the image processing program is a coding program which allows a computer to execute the coding. of an image signal by the image coding method of the eighth aspect. Therefore, by loading the program into a computer, it is possible to implement an apparatus that reduces the number of bits required to adjust the playback time when the frame reproduction cycle is set, and that can facilitate the reproduction of an image that have a variable frame reproduction cycle.

According to a thirty-third aspect of the present invention, a data storage medium containing an image processing program is provided, and the image processing program is a decoding program which allows a computer to perform decoding. of an image signal encoded by the image decoding method of the eleventh aspect. Therefore, by loading the program into a computer, it is possible to implement an apparatus that can accurately perform the reproduction of the encoded image signal, and includes decoding and displaying, according to whether the reproduction timing of each frame is variable or not. According to a thirty-fourth aspect of the present invention, a data storage medium containing an image processing program is provided, and the image processing program is a coding program which allows a computer to execute the coding. of an image signal by the image coding method of the twentieth aspect. Therefore, when loading the program into a computer, it is possible to increase an apparatus that can detect the value of a fixed frame rate of a coded image signal before decoding each frame, and that can perform the reproduction of the signal of encoded image, which includes decoding and display, through a simple structure of physical elements. According to a thirty-fifth aspect of the present invention, a data storage medium containing an image processing program is provided, and the image processing program is a decoding program which allows a computer to perform decoding. of an image signal encoded by the twenty-third image decoding method. Therefore, when loading the program of a computer, it is possible to implement an apparatus that can detect the value of a fixed frame rate of an encoded image signal before decoding each frame, and that can simplify the structure of physical elements in the decoding end.

BRIEF DESCRIPTION OF THE DRAWINGS Figures 1 (a) and 1 (b) are diagrams illustrating the data structure of the coded image signal having a fixed frame display cycle and the data structure of an encoded data signal having a cycle of display of variable frame, respectively, according to a first embodiment of the present invention. Figure 2 is a diagram for explaining the image display based on the coded image signal having a fixed frame display cycle, according to the first embodiment. Figure 3 is a flow chart of an encoding process for generating the connected image signals having a data structure according to the first embodiment. Figures 4 (a) and 4 (b) are block diagrams illustrating the structures of the image coding apparatus according to the first embodiment and a modification of the first embodiment, respectively. Figure 5 is a flow diagram of a decoding process for decoding the encoded image signals having the data structures according to the first embodiment. Figures 6 (a) and 6 (b) are block diagrams illustrating the structures of the image decoding apparatus according to the first embodiment and the modification thereof, respectively. Figures 7 (a) and 7 (b) are diagrams illustrating the data structure of an encoded image signal based on MPEG4 and having a fixed frame display site, and the data structure of a coded image signal , based on MPEG4 and having a variable frame display cycle, respectively, according to a second embodiment of the present invention.

Figure 8 is a flowchart of a coding process for generating coded image signals having the data structures according to the second embodiment. Figures 9 (a) and 9 (b) are block diagrams illustrating the structures of the image coding apparatus according to the second embodiment and a modification of the second embodiment, respectively. Figure 10 is a flow diagram of a decoding process for decoding the encoded image signals having the data structures according to the second embodiment. Figures 11 (a) and 11 (b) are block diagrams illustrating the structures of the image decoding apparatus according to the second embodiment and the modification thereof, respectively. Figures 12 (a) and 12 (b) are diagrams for explaining a data storage medium containing a program for executing the encoding or decoding processes according to any of the modalities mentioned above by a computer system, and Figure 12 (c) is a diagram to explain the computer system. Figure 13 is a diagram illustrating a table of fixed frame rates of MPEG2.

Fig. 14 is a diagram for explaining an encoded image signal having a conventional data structure. Figure 15 is a diagram illustrating the order of data transmission in a series of frames that constitute an image, as compared to the order of data display. Fig. 16 is a diagram for explaining the image display based on a conventional encoded image signal having a variable frame display cycle. Figures 17 (a) and 17 (b) are diagrams to explain a method for expressing frames display times (VOP) based on MPEG4, and Figure 17 (c) is a diagram for explaining the current data structure of an image signal encoded based on MPEG4.

[Mode 1] Figure l (a) shows a data structure of a coded image signal 100a having a fixed (constant) frame display cycle according to a first embodiment of the present invention. Figure 1 (b) shows a data structure of a coded image signal 100b having a variable frame display cycle according to the first embodiment. The encoded image signal 100a shown in FIG. 1 (a) is obtained by encoding an image signal corresponding to an image (in MPEG4, an image corresponds to an object) and having a fixed frame display cycle. The encoded image signal 100a includes a header H at the beginning, and the header H is followed by the code sequences SaO, Sal, Sa2, ..., San corresponding to the respective frames F (0), F (l) , F (2), ..., F (n), sequences of code which are arranged in the order of transmission. In the encoded image signal 100a, the header H contains a display cycle identifier Df indicating that the frame display cycle is fixed (fixed display cycle identifier) and display cycle data Dp indicating the cycle of display cycle. frame display. The frame number data B0, Bl, B2, ..., Bn are inserted at the beginning of the code sequences of SaO, Sal, Sa2, ..., San corresponding to the respective frames, and each of the frame number data indicates the frame number B (n) corresponding to the order n 'for display of the frame. In addition, the SaO, Sal, Sa2, ..., San code sequences corresponding to the respective frames contain the encoded image data CgO, Cgl, Cg2, ..., Cgn obtained by encoding image signals of the respective frames , respectively.

Figure 2 is a diagram for explaining an example of an image display method in which the intervals of image display timings of the respective frames are set. In the figure, the same reference numerals as those shown in figure 16 indicate the same components, and T indicates a frame display cycle of an image in which the frame display timing intervals are set. In the encoded image signal 100a, as shown in FIG. 2, the display times h (n) of the frames F (n) (n = 0, l, 2, ...) arranged in order of transmission are express by h (n) = B (n) xT when the display time h (0) (= h '(0)) of the frame F (0) is 0. To be specific, the time, of display h (2) of the frame F (2) is expressed by h (2) = B (2) xT, the display time h (3) of the frame F (3) is expressed by h (3) = B (3) xT, the display time h (l) of the frame F (l) is expressed by h (l) = B (l) xT, and the display time h (4) of the frame F (4) is expressed by h (4) = B (4) xT. Accordingly, in the reproduction of the encoded image signal 100a, the decoded image data obtained by decoding the encoded image data corresponding to the respective frames are displayed successively at the display times h (n). The frame number B (n) indicating the number n 'of the display order is determined as a function of the number n of the order of transmission, according to the formulas (1) ~ (3). On the other hand, the encoded image signal 100b shown in Figure 1 (b) is obtained by encoding an image signal corresponding to an image (in MPEG4, an image corresponds to an object) and having a variable frame display cycle. The encoded image signal 100b includes a header H at the beginning, and the header H is followed by code sequences SbO, Sbl, Sb2, ..., Sbn corresponding to the respective frames F (0), F (l), F (2), ..., F (n), which are placed in the order of transmission. In the encoded image signal 100b, the header H contains a display cycle identifier Df indicating that the frame display cycle is variable (variable display cycle identifier). The display time data (display timing data) DtO, Dtl, Dt2, ..., Dtn indicate the display times h (0), h (l), h (2), ..., h ( n), to which are inserted the respective frames F (0), F (l), F (2), ..., F (n) that are to be displayed, in the principles of the SbO code sequences, Sbl, Sb2, ..., Sbn corresponding to the respective frames. In addition, the encoded sequences SbO, Sbl, Sb2, ..., Sbn corresponding to the respective frames include coded image data CgO, Cgl, Cg2, ..., Cgn obtained by encoding the image signals of the respective frames.

When the encoded image signal 100b is reproduced, the image display is carried out in a manner similar to that described for the encoded image signal 200 having the conventional data structure shown in Figure 14. A description is now provided. of the function and the effect. According to the first embodiment of the invention, in the encoded image signal 100a having a fixed frame display cycle (FIG. 1 (a)), the fixed display cycle identifier Df indicating that the display cycle of frame is fixed and the display cycle Dp data indicating the frame display cycle, are inserted in the header of the complete image data, and the frame number data B0, Bl, B2, ..., Bn which respectively indicate the frame numbers B (0), B (l), B (2), ..., Bn which are inserted in the respective frames. In the encoded image signal 100a having such a data structure, the display cycle data Dp indicates the frame display cycle T and the frame number Bn data of each frame indicate which frame number in an image is, when it is counted in the order of exhibition. Therefore, the display time h (n) of each frame F (n) can be decided uniquely by these data Dp and Bn.

On the other hand, in the encoded image signal 100b having a variable frame display cycle (Fig. 1 (b)), the variable display cycle identifier Df indicating that the frame display interval is variable, is inserted. in the header of the entire image data, and the display time data DtO, Dtl, Dt2, ..., Dtn indicating the times of display h (0), h (l), h (2) are inserted. ), ..., h (n) of the respective frames in the respective frames as well as the data structure of the conventional encoded image signal 200. Therefore, when the encoded image signal 100b is reproduced, the images of the respective frames F (0) ~ F (n) are displayed at the display times h (0) ~ h (n) indicated by the data of DtO -Dtn display time. As described above, since the display cycle identifier Df is inserted which indicates whether the frame display cycle is fixed or variable in the header of the coded image signal, even an image having an image can be handled. Variable frame display cycle. For an image having a fixed frame display cycle, the image display of each frame can be carried out in accordance with the display cycle data DP and the frame number Bn data having a relatively large amount of data. small, without referring to the DtO -Dtn display time data that have relatively large amounts of data. Therefore, the circuit structure of an image processing circuit at the decoding end can be simplified. Next, a description of an image signal coding process for generating the encoded image signals 100a and 100b, and a decoding process for decoding these encoded image signals are provided. Figure 3 is a flowchart of the coding process. In the figure, "n" is the number corresponding to the order of data transmission of each frame in a series of frames that constitute an image. In the coding process, first, it is decided whether the frame display cycle of an input image signal corresponding to a specific image is fixed or variable (stage Sil). When the result of the decision is that the frame display cycle is fixed, an identifier, Fixed cycle cycle Df is added indicating that the frame display cycle is fixed, to the H header of the bit stream corresponding to the image signal (Slla stage). In addition, the number n indicating the order of transmission of each frame is used as an account value, and this account value n is set to 0 (step S12a). Subsequently, the display cycle Dp data indicated by the fixed frame display cycle T is added to the header of the bit stream corresponding to the image signal (stage S13a). Subsequently, as a SaO code sequence corresponding to the first frame F (0) of the specific image in the order of transmission, the frame number data Bn (= B0) and the encoded image data Cgn (= CgO) are successively add to the H header (steps S14a and S15a). Subsequently, it is decided whether or not the frame is processed in the image signal coding process (hereinafter referred to as "object frame") is the last frame of the specific image in the transmission order (step S16a). When the object frame is not the last frame, the count value n is incremented by 1 (step S17a), and the next frame F (l) is subjected to the process of steps S14a ~ S17a. The process of steps S14a ~ S17a is repeated until it is decided in step S16a that the object frame is the last frame. On the other hand, when the result of the decision in the Sil stage is that the frame display cycle is variable, a variable display cycle identifier Df indicating that the frame display cycle is variable, is added to the header H of the bit stream corresponding to the image signal (step Sllb), In addition, the number n indicating the transmission order of each frame is used as an account value, and this count value n is set to 0 ( step S12b). Then, as a code sequence corresponding to the first frame F (0) of the specific image in the transmission order, the display time data Dtn (= Dt0) and the encoded image data Cgn (= Cg0) are successively added to the H header (steps S13b and S14b).

Subsequently, it is decided whether the frame is processed or not in the image signal coding process (object frame) is the last frame of the specific image in the order of transmission (Step S15b). When the object frame is the last frame, the count value n is incremented by 1 (step S16b), and the next frame F (l) is subjected to the process of steps S13b-S16b. The process is repeated in steps S13b ~ S16b until it is decided in step S15b that the object frame is the last frame. Figure 4 (a) is a block diagram illustrating an image coding apparatus 1000 as physical elements that perform the coding process according to the first embodiment. The image coding apparatus 1000 includes an encoder 1110 for encoding an input image signal Sg to generate encoded image Cgn data; a decision unit 1131 for deciding whether the frame display cycle of the input image signal Sg is fixed or not, i.e. is fixed or variable, and transmitting a display cycle identifier Df indicating whether the display cycle it is fixed or not; and a display cycle data generator 1132 (first data generator) for generating display cycle data Df indicating a fixed frame display cycle T, based on the input image signal Sg. In addition, the image coding apparatus 1000 includes a number data generator 1133 (second data generator) for generating frame number Bn data indicating the number of each frame in the order of transmission (frame number B (n) ), based on the Sg signal of the input image; and a display time data generator 1134 (third data generator) for generating display time data Dtn indicating the time h (n), of displaying each frame F (n), based on the image Sg signal of entry. In addition, the image coding apparatus 1000 includes an ON / OFF switch 1141 for switching the circuit between the ON state where the display cycle data Dp of the data generator 1132 is transmitted, and the OFF state where they are interrupted. the display cycle Dp data, based on the display cycle Df identifier from decision unit 1131; and a selector switch 1142 for selecting one of the frame number data Bn from the data generator 1133 and the display time data Dtn from the data generator 1134, based on the display cycle identifier Df from of decision unit 1131.

In addition, the image coding apparatus 1000 includes a multiplexer 1120 (MUX) for multiplexing the display cycle identifier Df from the decision unit 1131, the encoded Cgn data from the encoder 1110, the cycle data Dp display from the ON / OFF switch 1141, and the output of the selector switch 1142, to generate a multiplexed bit stream MI. The multiplexer 1120 transmits the multiplexed bitstream M as the encoded image signal 100a having a fixed frame display cycle or the encoded image signal 100b having a variable frame display cycle. The operation of the image coding apparatus 1000 will be briefly described. When an image signal Sg corresponding to a specific image is input to the apparatus 1000, the decision unit 1131 decides whether the frame display cycle of the image signal Sg is variable or not, and transmits the cycle identifier Df of display indicating the result of the decision. Meanwhile, the first, to third data generators 1132-1134 generate the display cycle data Dp, the frame number data Bn and the display time data Dtn, respectively, based on the image signal Sg, and the encoder 1110 encodes the image signal Sg and transmits the encoded image data Cgn.

The display cycle identifier Dg and the encoded image data Cgn are transmitted through the multiplexer 1120. The display cycle data Dp is transmitted through the ON / OFF switch 1141, which is turned on or off according to the display cycle identifier Df to the multiplexer 1120. The frame number data Bn and the display time data Dtn are transmitted through the selector switch 1142, which selects one of the data Bn and the data Dtn according to with the display cycle identifier Df, to the multiplexer 1120. That is, when an image signal having a fixed cycle of image display for each frame F (n) is inputted as the image signal Sg, the following data are transmitted through the multiplexer 1120: the display cycle identifier Df, the display cycle data Dp indicating the cycle of the display image of the respective frames, and the data os Bn of the frame number corresponding to the respective frames and indicating the positional relationships of the respective frames. In the multiplexer 1120, the encoded image data Cgn, the fixed display cycle identifier Df, the display cycle data Dp and the frame number data Bn are multiplexed and transmitted as the encoded image signal 100a.

On the other hand, when an image signal having a variable image display cycle of the respective frames F (n) is input as the image signal Cg, the following data is transmitted to the multiplexer 1120: the cycle identifier Df of variable display, and the Dtn data of display time indicating the timing at which the display of the image of each frame is carried out, the display time h (n), which adjusts relatively to one of the desired of a plurality of reference times according to each frame. In the multiplexer 1120, the encoded image data Cgn, the variable display cycle identifier Df and the display time data Dtn are multiplexed and transmitted as the encoded image signal 100b. Next, the decoding process of the encoded image signals 100a and 100b using Figure 5 will be described. Initially, the display cycle identifier Df in the multiplexed bit stream MI sent from the coding end (one of the signals 100a and Encoded image 100b) is detected to decide whether the display cycle of the encoded image signal is fixed or not (step S21). When the result of the decision is that the exhibition cycle is fixed, the count value n corresponding to the number of each frame F (n) in the order of transmission is set to O (step S21a) and subsequently, the display cycle data Dp indicating the display cycle T are read from the header of the encoded image signal (step S22a). Then, the frame number Bn data is read by indicating the frame number B (n) of the header of each frame (step S23a), and the display time h (n) of each frame is calculated by h (n) = B (n) xT (step S24a). Then, the encoded image Cgn data corresponding to the frame F (n) is decoded, and the decoded image data corresponding to the frame F (n) is considered as data to be displayed in a display time h (n) ) (step S25a). Subsequently, it is decided whether or not the frame F (n) to be processed (object frame) is the last frame of the specific image in the order of transmission (step S26a). When the object frame is the last frame, the decoding process is completed. When the object frame is not the last frame, the account value is increased by 1 (step S27a) and, subsequently, steps S23a-S26a described above are repeated until it is decided in step S26a that the object frame is the last frame. On the other hand, when it is decided in step S21 that the display cycle is variable, the count value n, which corresponds to the number n of each frame F (n) in the order of transmission, is set to 0 (stage S21b) and, subsequently, the display time data Dtn is read indicating the display time h (n) of the frame F (n) of the header of each frame (step S22b), and the display time h (n) of the frame F (n) is decided according to the data Dtn of display time (Step S23b). Subsequently, the encoded image Cgn data corresponding to the frame F (n) are decoded and the decoded image data of the frame F (n) are considered as data to be displayed in the display time h (n) (stage S24b). Subsequently, it is decided whether the frame F (n) is processed or not (object frame) and whether it is the last frame of the specific image in the order of transmission (step S25b). When the object frame is the last frame, the decoding process is completed. When the object frame is not the last frame, the count value n is incremented by 1 (step S26b). Subsequently, steps S23a ~ S26a described above are repeated until it is decided in step S25b that the object frame is the last frame. As described above, the encoded image signals having the data structures shown in Figs. 1 (a) and 1 (b) are decoded in the procedure shown in Fig. 5. Fig. 6 (a) is a diagram of blocks illustrating the structure of an image decoding apparatus as physical elements that perform the decoding process according to the first embodiment.

The image decoding apparatus 2000 receives the multiplexed bit stream MI (the encoded image signal 100a or 100b) transmitted from the image coding apparatus 1000, and submits the multiplexed bit stream MI to reproduction including decoding and displaying. More specifically, the image decoding apparatus 2000 includes a demultiplexer (DEMUX) 2110 for extracting, from the multiplexed bit stream MI, the encoded image data Cgn, the display cycle identifier Df, the display cycle data Dp. and the Bn data of frame number or the Dtn data of display time, and transmits this data; and a decoder 2120 for decoding the encoded image data Cgn and transmitting the decoded image data Rg. In addition, the image decoding apparatus 2000 includes an ON / OFF switch 2140 for switching the circuit between the ON state where the display cycle data Dp is transmitted, and the OFF state, where the data Dp of the display is interrupted. exhibition cycle; and a selector switch 2150 for selecting one of the data Bn of the frame number and the display time data Dtn, based on the identifier Df of the display cycle and transmission of the selected data.

In addition, the image decoding apparatus 2000 includes a display unit 2130 for displaying the decoded image Rg data at the prescribed timing based on the display cycle identifier Df and the outputs of the switches 2140 and 2150. The following will be described briefly the operation of the image decoding apparatus 2000. When the multiplexed bit stream MI of the image coding apparatus 1000 is input to the image decoding apparatus 2000, in the demultiplexer 2110, the display cycle identifier Df and the display cycle data Dp are separated from the MI stream. of multiplexed bits. In addition, the encoded image data Cgn and the frame number Bn data or the display time data Dtn are separated for each frame of the multiplexed bit stream MI. The encoded image data Cgn of each frame is decoded by the decoder 2120 and then transmitted as decoded image Rg data to the display unit 2130. The display cycle Dp data is transmitted through the ON / OFF switch 2140 which is turned on or off by 1 identifier, Display cycle Df to the display unit 2130, and the frame number Bn data or the display time Dtn data of each frame are transmitted through the 2150 selector switch, which selects one of these data according to with the display cycle Df identifier, towards the display unit 2130. In the display unit 2130, the image of each frame corresponding to the decoded image data Rg having a fixed display cycle is displayed at a prescribed display timing based on the display cycle data Dp and the data Bn frame number, while the image of each frame corresponding to the decoded image Rg data having a variable display cycle is displayed at a prescribed display timing based on the display time data Dtn. As described above, in the image signal data structure according to the first embodiment, since the coded image signal obtained by encoding an image signal includes the display cycle identifier Df indicating whether the cycle of image display for each frame is variable or not, when the image display cycle for each frame is fixed, the decoded image Rg data can be displayed by a simple circuit structure, ie, based on the cycle Dp data display and Bn frame number data having a relatively small amount of data (number of bits) without referring to the display time data (display timing data) Dtn having a relatively large amount of data (number of bits) for each frame. Further, since the encoded image signal 100a has a fixed display cycle and includes display cycle data Dp indicating the image display cycle T and the data (frame position data) Bn indicating the number B ( n) of frame which indicates the relation of position of the frame with the previous and subsequent frames, the timing of image display of each frame can be decided by a simple calculation, TxB (n). In addition, the encoded image signal 100b having a variable display cycle includes the display time data (display timing data) Dtn indicating the display time (display timing) h (n) to which it is going to the image of each frame, display time which is set relatively to a desired time h '(0) between a plurality of reference times, according to each frame (see Figure 2) is displayed. Therefore, when the image display cycle of each frame is variable, like the conventional data structure, the image display timing h (n) of each frame F (n) in the Dtn data can be adjusted of exhibition time. In addition, the image coding apparatus 1000 according to the first embodiment includes the decision unit 1131 for generating the display cycle identifier Df which indicates whether the image display cycle is variable or fixed, based on the signal of input image. When the input image signal has a fixed display cycle, the encoded image data Cgn is multiplexed with the display cycle identifier Df, the display cycle data Dp indicates the image display cycle, and the Bn data of frame number indicate the positional relationship of each frame with the previous and subsequent frames, and the data multiplexed in this way are transmitted. When the input image signal has a variable display cycle, the encoded image data Cgn is multiplexed with the display cycle identifier Df and the display time data Dtn indicating the display time h (n) of each frame F (n), and the data multiplexed in this way are transmitted. Therefore, when the image display cycle for each frame is variable or fixed, the data to decide the display timing of each frame are transmitted together with the encoded image Cgn data. Therefore, the number of bits required to decide the display time can be reduced when the frame display cycle is fixed. In addition, the image that has a variable frame display cycle can be displayed in the same way as the conventional screen. The image decoding apparatus 2000 according to the first embodiment includes the demultiplexer 2110 which separates the display cycle identifier Df, the display cycle data Dt indicates the image display cycle, the frame number data Dn indicate the positional relationship of each frame, the display time data Dtn indicate the display time h (n) of each frame, and the encoded image data Cgn, of the multiplexed bit stream MI transmitted from the device 1000 of Image coding. In addition, the apparatus 2000 includes the decoder 2120 which decodes the encoded image data Cgn and transmits the decoded image data Rg. In this apparatus, the decoded image Rg data has a fixed display cycle and is displayed at a prescribed display timing based on the display cycle data Dp and the frame number Bn data, while the Rg data of Decoded image having a variable display cycle are displayed at a prescribed display timing based on the display time data Dtn. Therefore, if the frame display cycle of the decoded image Rg data is variable or fixed, the decoded image Rg data for each frame can be displayed at a precise display timing. In the data structure according to the first embodiment, the display cycle identifier Df is inserted at the beginning of the image data (multiplexed bit stream), and the frame number data Bn or the time data Dtn Display are inserted at the beginning of each frame data (code sequence of each frame). However, the display cycle identifier, the frame number data and the display time data are not necessarily inserted into the principles of the corresponding headers. This data can be inserted after synchronous or similar signals insofar as the display cycle identifier and the display cycle data are included in the header of the image data (encoded image signal) while the data of Frame number and display time data are included in the data header (code sequence) that corresponds to the frame. Although in this first embodiment the display cycle data Dp is inserted just after and following the display cycle identifier Df, the display cycle data Dp can be inserted anywhere after the display cycle Df identifier within the header of the image data. In addition, although in the first embodiment serial numbers are provided, such as the numbers n1 (= B (n)) indicating the order of display from the beginning of the image data in the order of display as shown in Figure 2, it is not always necessary to provide such serial numbers. A plurality of numbers from the first number to the last number can be periodically provided as frame numbers, which have been determined in advance. For example, when frame numbers are expressed with 4 bits, numbers from 0 to 15 are periodically supplied to the frames. In this case, the display time is expressed by h '(n>) = hp' (15) + (n '+ l) xT where hp1 (n1) indicates the display time corresponding to the number B (n) (= n ') of the frame in the previous period. Consequently, h '(n') indicates the display time corresponding to the number B (n) (= n ') of the frame in the cycle after hp' (n1). In the formula hp '(15) it indicates the time of exhibition of the last frame in the previous period. In addition, although in this first modality each frame is specified by using frame number data, any data can be used insofar as it specifies the positional relationship of each frame with the previous and subsequent frames, for example, data that indicate the positional relationships of the respective frames according to a specific rule or data specifying the positional relationships of the respective frames with reference to a prescribed table. Furthermore, in this first embodiment, the display time data indicates the time relative to a plurality of reference time, and a reference time for a plurality of frames can be set or the display time of the previous frame can be used as the reference time. In addition, a plurality of reference times can be adjusted in advance, and which reference time will be used to express the frame display time which can be decided according to some rule or signal. In addition, the data structure of the image signal encoded according to this first embodiment includes the display cycle identifier, the display cycle data and the frame number data or the display time data, these data are used to adjust the display timing of each frame, as the additional data to decide the reproduction timing of each frame at the decoding end. However, instead of these additional data to decide the display timing of each frame, the data structure of the encoded image signal may include additional data to decide the decoding timing of each frame, specifically, the cycle identifier of the frame. decoding, decoding cycle data and frame number data or decoding time data. Next, such data structure will be described as a modification of the first mode.

(Modification of Modality 1) In the data structure according to the modification of the first mode, the display cycle identifier Df and the display cycle data Dp in the encoded image signal 100a of the first mode are replaced with the decoding cycle identifier and the decoding cycle data, and the display time data Dtn in the encoded image signal 100b of the first mode are replaced with the decoding time data. The decode cycle identifier indicates whether the cycle of a decoding process for decoding a coded picture signal for each frame is variable or not, and a fixed decoding cycle identifier is inserted in an encoded picture signal having a cycle of fixed decoding while inserting a variable decoding cycle identifier into a coded picture signal having a variable decoding cycle. In addition, the decoding cycle data indicates the decoding cycle DT of each frame, and the decoding time data indicates the timing at which the decoding of each frame is carried out (decoding time Dh (n)), timing which adjusts relatively to one of a plurality of desired reference times, according to each frame. The coding process for generating the encoded image signal having the data structure according to this modification of the first embodiment is performed by replacing the steps Sil, Slla, Sllb, S13a, and S13b in the flow of figure 3 as follow. That is, the process of deciding the display cycle in the Sil stage is replaced with the decision of whether the decoding cycle is fixed or not; the process of adding the fixed display cycle identifier Df in the step Slla is replaced with the process of adding the fixed decoding cycle identifier; and the process of adding the variable display cycle identifier Df in step Sllb is replaced with the process of adding the variable decoding cycle identifier. In addition, the process of adding the display cycle Dp data in step S13a is replaced with the process of adding the decoding cycle data; and the process of adding the display time data Dtn in step S13b is replaced with the process of adding the decoding time data. Figure 4 (b) shows the structure of an image coding apparatus 1000a as physical elements to perform the coding process according to the modification of the first embodiment.

The image coding apparatus 1000a includes a decision unit 1131a for deciding whether or not the frame decoding cycle of the input signal Sg is fixed, ie, it is fixed or variable, and transmitting a cycle identifier DEf. decoding indicating whether the decoding cycle DT is fixed or not, instead of the decision unit 1131 of the image coding apparatus 1000 of the first mode. In addition, the image coding apparatus 1000a includes a decoding cycle data generator 1132a (first data generator) which generates decoding cycle data DEp indicating the frame decoding cycle DT (fixed cycle), based on in the input image Sg signal, and the decoding time data generator 1134a (third data generator) which generates decoding time DEtn data indicating the decoding time of each frame, based on the Sg signal of input image, in place of the display cycle data generator 1132 and the display time generator 1134 of the image coding apparatus 1000. Other constituents are identical to those of the image coding apparatus 1000 of the first embodiment. In the image coding apparatus 1000a constructed in this way, the multiplexer 1102 (MUX) multiplexes the decoding cycle identifier DEf from the decision unit 1131a, the encoded image data Cgn from the encoder 1110, the data Decoding cycle DEp from the ON / OFF switch 1141, and the output of the selector switch 1142, and transmits a multiplexed My bit stream as an encoded image signal having a fixed decode cycle or an encoded picture signal which has a variable decoding cycle. On the other hand, the process for decoding the encoded image signal having the data structure according to this modification of the first embodiment is performed by replacing the steps S21, S22a, S22b, S23a, S23b, S24a, S24b and S25a in the flow of figure 5 as follows. That is, the process of deciding the display cycle in step S21 is replaced with the process of deciding if the. decoding cycle is fixed or not; the process of reading the display cycle data Dp indicating the display cycle T in step S22a is replaced with the process of reading the data DEp of the decoding cycle indicating the decoding cycle DT; and the process of reading the display time data Dtn indicating the display time h (n) in step S22b is replaced with the process of reading the decoding time data DEtn indicating the decoding time Dh (n) .

In addition, the process of deciding the display time h (n) upon reading the data Bn of the frame number in steps S23a and S24a is replaced with the process of deciding the decoding time Dh (n) of the image data of the frame number. each frame based on the DEp data of the decoding cycle and then decide the display time h (n) of each frame based on the Bn data of the frame number. In addition, the process of deciding the display time h (n) based on the display time data Dtn in step S23b is replaced with the process of deciding the decoding time Dh (n) based on the data DEtn of time of decoding, and then decide the display time h (n) based on the DEtn data. In addition, the process of decoding the encoded image Cgn data of the frame F (n) and displaying them in the display time h (n) in step S25a is replaced with the process of deciphering the encoded image Cgn data of the frame F ( n) in the decoding time Dh (n) and display them in the display time h (n); and the process of decoding the encoded image Cgn data of the frame F (n) and displaying it at time h (n) in step S24b is replaced with the process of decoding the encoded image Cgn data of the frame F (n) in the decoding time Dh (n) and display them at the time h (n) of the display.

Figure 6 (b) is a block diagram illustrating the structure of an image decoding apparatus 2000a as physical elements that perform the decoding process according to the modification of the first embodiment. The image decoding apparatus 2000a receives the multiplexed bitstream Mia transmitted from the image coding apparatus 1000a, and submits the multiplexed bit stream Mia to reproduction including decoding and displaying. More specifically, the image decoding apparatus 2000a includes a demultiplexer 2110a (DEMUX) for extracting, from the multi-biased Mya current, the encoded image data Cgn, the decoding cycle identifier DEf, the decoding cycle data DEp, and the frame number Bn data or the data DEtn of decoding time, and transmits this data, in place of the demultiplexer 2110 of the image decoding apparatus 2000 to the first mode. In addition, the image decoding apparatus 2000a includes a first ON / OFF switch 2140a for switching the circuit between an ON state where the decoding cycle data DEp is transmitted, and a OFF state where the DEp data is interrupted. decoding cycle, based on decoding cycle DEf identifier; and a second ON / OFF switch 2150a for switching the circuit between the ON state where the frame number data Bn and the OFF state are transmitted where the frame number data Bn is interrupted, based on the DEf identifier. of decoding cycle; and a third on / off switch 2160a for switching the circuit between the ON state, where the decoding time data DEtn is transmitted, and the OFF state, where the decoding time data Dtn is interrupted, based on the decoding cycle DEf identifier. In the image decoding apparatus 2000a, the decop cycle data DEp transmitted from the first ON / OFF switch 2140a and the decode time data DEtn transmitted from the third ON / OFF switch 2160a are supplied to the decoder 2120a and the display unit 2130a while the frame number data Bn transmitted from the second ON / OFF switch 2150a is supplied to the display unit 2130a. In the decoder 2120a, the encoded image data Cgn having a first fixed decoding cycle is decoded frame by frame in the timing (decoding time Dh (n)) decided by the decoding cycle data DEp, while the data is decoded. Cgn of encoded image having a variable decoding cycle are decoded frame by frame at the timing (decoding time Dh (n)) decided by decoding time data DEtn. In addition, in the display unit 2130a, the data Decoded image Rg having a fixed decoding cycle are displayed frame by frame at the timing (display time h (n)) decided by the decoding cycle data DEp and the frame number Bn data, while the data Decoded image Rg having a variable decoding cycle are displayed frame by frame at the timing (display time h (n)) decided by the decoding time data DEtn. Other constituents of the image decoding apparatus 2000a are identical to the image decoding apparatus 2000 of the first embodiment. In the following, the image decoding apparatus 2000a will be briefly described. When the multiplexed Mia bitstream is input to the apparatus 2000a, in the demultiplexer 2110a, the encoded image data Cgn, the decoding cycle identifier DEf, and the decoding cycle data DEp, and the frame number Bn data or the decoding time DEtn data is separated from the My input bit stream.

In the decoder 2120a, when the decoding cycle of the input encoded image signal is set, the encoded image data Cgn is decoded frame by frame at the timing (decoding time Dh (n)) decided by the data DEp of decoding cycle. Then, the decoded image data Rg output of the decoder 2120a is displayed frame by frame at the timing (display time h (n)) decided by the decoding cycle data DEp and the frame number data Bn. On the other hand, when the decoding cycle of the encoded image signal is variable, the encoded image data Cgn is decoded frame by frame at the timing (decoding time Dh (n)) decided by the decoding time data Dtn . Then, the decoded image data Rg transmitted from the decoder 2120a is displayed frame by frame at the timing (display time h (n)) decided by the decoding time data DEtn. In the modification of the first embodiment, as in the first embodiment, since the encoded image signal obtained in encoding an image signal includes the decoding cycle identifier DEf which indicates whether the image decoding cycle of each frame is variable or not, when the image decoding cycle for each frame is fixed, the encoded image data can be decoded by a simple circuit structure, that is, they can be decoded according to the decoding cycle data DEp alone , without reference to decoding time DEtn data having a large amount of data (number of bits) for each frame. In the modification of the first modality, emphasis has been placed on an image decoding apparatus which performs the image display of each frame as well as the decoding of each frame according to data to decide the decoding timing of each frame , data which are included in the encoded image signal. However, an image decoding apparatus which performs the decoding of each frame as well as the image display of each frame according to the data to receive the display timing of each frame, which data are included in a signal of encoded image is also within the scope of the present invention. In this case, the decoding timing at which the decoding of each frame is carried out is adjusted according to the display timing data of the plurality of frames including an object frame to be decoded. That is, based on the display timing data of the object frame and the display timing data of the next frame subsequently transmitted to the object frame, the decoding timing of the object frame is set to a timing that is earlier by a deviation time. prescribed, instead of the previous display timing between the display timings of the object frame and the following frame. To be specific, when the display timing of the object frame is prior to the display timing of the next frame subsequently transmitted to the object frame, the deviation time is set to a length greater than the time required to decode the object frame. On the other hand, when the display timing of the next frame (eg, B-VOP) transmitted subsequently to the object frame (eg, P-VOP) is earlier than the display timing of the object frame, the deviation time is adjusted to a length greater than the sum of the time required to decode the object frame and the time required to decode the next frame.

[Modality 2] Figure 7 (a) shows a data structure of a coded image signal 120a having a fixed frame display cycle, according to a second embodiment of the present invention.

The encoded image signal 120a is obtained by encoding an image signal which corresponds to an image (in MPEG4, an image corresponds to an object) and they have a fixed frame display cycle. The encoded image signal 120a has a H header at the beginning, and the header H is followed by sequences of code ScO, Sel, Sc2, ..., Sen corresponding to frames F (0), F (l), F (2), ..., F (n), respectively, sequences of codes which are placed in the order of transmission. In the encoded image signal 120a, the following data is included in the header H: display cycle identifier Df indicating the fixed frame display cycle or not; display cycle multiplier data Dm indicating that the frame display cycle is the time subunit (l / N) multiplied by M (natural number) by the multiplier M, that is, how many times (M) the cycle of frame display is as big as the time subunit (l / N); and the time subunit Dk data indicating the value N (natural number) to obtain the time subunit (l / N). In addition, at the beginning of the sequence of code ScO, Sel, Sc2, ..., Sen of the respective frames, the data of display time DyO, Dyl, Dy2, ..., Dyn indicating the times of display and '0, y'3, y'l, - .., y'n' of the respective frames (with reference to figure 17 (a)) are inserted. In the H header of the encoded image signal 120a, the subunit time data Dk, the display cycle identifier Df and the display cycle multiplier data Dm are set so that this data is transmitted in this order. In the ScO, Sel, Sc2, .., Sen code sequences of the respective frames, the display time data DyO, Dyl, Dy2, ..., Dyn are followed by coded image data CgO, Cgl, Cg2, ..., Cgn, respectively. In this coded image signal 120a, assuming that the reference time is x (reference to figure 17 (a)), the display times h (0), h (l), h (2), ... of the frames F (0), F (l), F (2), ... that correspond to VOPO, VOP3, VOP1, ... are expressed by x + y / N (y = y'0, y '3 , y'l, ...) based on the display time data DyO, Dyl, Dy2. However, since the encoded image signal 120a includes the subunit time data Dk and the display cycle multiplier data Dm, the display of each frame can be carried out without using display time data ( DyO, Dyl, Dy2, ...). To be specific, based on the time subunit (l / N) obtained from the time subunit Dk data and the value of M (natural number) obtained from the display cycle multiplier data Dm, the cycle is obtained T of frame display (= Mxl / N), and the image of each frame is displayed in the original display time h (n) (= x + yxMxl / N) of each frame F (n), decided by time Reference x - 84 - follows the fixed cycle display identifier Df (step S33). Subsequently, an account value n, which corresponds to the number n indicating the order of transmission of each frame F (n) as a constituent of the specific image, is set to 0 (step S35). Subsequently, since a code SaO sequence corresponding to the first frame F (0) of the specific image in the order of transmission, the display time Dyn data (= DyO) and the encoded image Cgn data are added successively ( = CgO) from the frame to the H header (steps S36 and S37). Subsequently, it is decided whether the framework is processed or not (hereinafter referred to as the "object frame") in the image signal is the last frame of the specific image in the transmission order (step S38). When the object frame is not the last frame, the count value n corresponding to the frame F (n) (= F (0)), the order of transmission of which is nth is increased by 1 (step S39) and the following frame F (n + 1) (= F (1)) is subjected to the process of steps S36-S39. The process of steps S36-S39 is repeated until step S38 is decided that the object frame is the last frame. The coded image signal 120a is generated through the process steps described above. On the other hand, when the result of the decision in step S31 is that the display cycle is variable, a variable display cycle detector Df-85 indicates that the display cycle of the image signal is variable and is added to the header H of the bit stream corresponding to the image signal so as to follow the time subunit data Dk (step S34). Subsequently, the processes of steps S35-S39 are carried out, whereby the encoded image signal 120b is generated. Figure 9 (a) is a block diagram illustrating an image coding apparatus 1200 as physical elements that perform the coding process according to the second embodiment. The image coding apparatus 1200 includes an encoder 1110 for encoding an input image signal Sg to generate coded image data Cgn, and a decision unit 1131 for deciding whether the frame display cycle of the image signal Sg input is fixed or not, that is, it is fixed or variable, and transmit a display cycle Df identifier that indicates whether the display cycle is fixed or not. In addition, the image coding apparatus 1200 includes three data generators as follows: a time subunit data generator 1232 (first data generator) for generating time subunit data Dk based on the input image signal Sg. A display cycle multiplier data generator 1233 (second -86 data generator) for generating display cycle multiplier data Dm which indicates a numerical value M to express the frame display cycle by a multiplier (M) for the subunit of time, based on the Sg signal of input image; and a display time data generator 1234 (third data generator) for generating display time Dyn data (display timing data) indicating the display time h (n) of each frame, based on the Sg signal of input image. In addition, the image coding apparatus 1200 includes an ON / OFF switch 1241 for switching the circuit between the ON state where the display cycle multiplier data Dm is transmitted, and the OFF state where the multiplier data Dm is transmitted. of display cycle are interrupted, based on the display cycle identifier Df from decision unit 1131. The image coding apparatus 1200 further includes a multiplexer 1220 (MUX) for multiplexing the time subunit data Dk from the first data generator 1232, the display cycle identifier Df from the decision unit 1131, the display cycle multiplier data Dm for switch 1241, display time data Dyn for the third data generator 1234, and encoded image data Cgn from encoder 1110, to generate a multiplexed bit stream M2. The multiplexer 1120 transmits the multiplexed bit stream M2 as the encoded image signal 120a or the encoded image signal 120b. The operation of the image coding apparatus 1200 will be briefly described. When an image signal Sg corresponding to a specific image is input to the apparatus 1200, the decision unit 1131 decides whether the display cycle of the image signal Sg is variable or not, and transmits the display cycle identifier Df. indicating the result of the decision. Meanwhile, data generators 1232-1234, first to third, generate time subunit Dk data, display cycle multiplier data Dm, and display time Dyn data, respectively, based on the image Sg signal , and the encoder 1110 encodes the image signal Sg and transmits the encoded image data Cgn. The time subunit data Dk, the display cycle identifier Df and the display time Dyn data, and the encoded image data Cgn are continuously transmitted to the multiplexer 1220. The display cycle multiplier data Dm is transmitted through the switch 1241, which is in the ON state by the display cycle identifier Df, to the multiplexer 1220.

That is, when an image signal having a fixed cycle of image display is inputted as the image signal Sg, the time subunit data Dk, the display cycle identifier Df, the cycle multiplier data Dm. display, the display time Dyn data of each frame and the encoded image Cgn data of each frame are transmitted to the multiplexer 1220. In the multiplexer 1220, the time subunit Dk data, the display cycle identifier Df, the display cycle multiplier data Dm, the encoded image data Cgn and the display time Dyn data are multiplexed, and the encoded image signal 120a is transmitted as the multiplexed bit stream M2. On the other hand, when an image signal having a variable image display cycle is inputted as the image signal Sg, the switch 1241 is shifted to the OFF state in accordance with the display cycle identifier Df. In this state, the time subunit data Df, the display cycle identifier Df, the display time Dyn data of each frame and the encoded image Cgn data of each frame are transmitted to the multiplexer 1220. In the multiplexer 1220 , the time subunit data Df, the display cycle identifier Df, the display time Dyn data and the encoded image data Cgn are multiplexed, and the decoded-89 image signal 120b is transmitted as the current M2 of multiplexed bits. Next, a description of the decoding process for decoding an encoded image signal having a data structure according to this second embodiment is provided, with reference to FIG. 10. FIG. 10 is a flowchart of the decoding process. In the decoding process, initially, the time subunit data Dk included in the multiplexed bit stream M2 (coded image signal 120a or 120b) sent from the coding end is read (step S40), and the cycle identifier Df The display is detected to decide whether the display cycle of the encoded image signal is fixed or not (step S41). When it is decided that the display cycle is fixed, the display cycle multiplier data Dm, which expresses the display cycle T by a multiplier M for 3rd subunit of time (l / N) are read from the H header of the encoded image signal (step S42a). Subsequently, based on the time subunit data Dk and the display cycle multiplier data Dm, the frame display cycle T is obtained by T = (l / N) xM (step S43a). Subsequently, the count value n ', which corresponds to the number n1 of each frame F' (nt) from the first frame in the order of display, is set to 0 (step S44a), and time-90-to display h '(n1) of each frame F' (n1) is obtained by h '(n1) = n'xT (step S45a). At this time, the encoded image data Cgn corresponding to each frame F (n) are decoded in the order of transmission, generating the Rg data of decoded image data corresponding to the frame F (n). Subsequently, it is decided whether the object frame F '(n1) counted in the order of the screen is the last frame of the specific image or not (step S46a). When the object frame is the last frame, the dessodification process is completed. When the object frame is not the last frame, the count value n 'in 1 is incremented (step S47a), and the processes of steps S45a ~ S47a are repeated until it is decided in step S46a that the object frame is the last frame. In the decoding process, the decoded image Rg data corresponding to each decoded frame F '(n1) is displayed at the display time h1 (n1) in the prescribed display order n'. On the other hand, when it is decided that the display cycle is variable in step S41, the count value n corresponding to the number n of each frame F (n) in the order of transmission is set to 0 (step S42b). Subsequently, the display time Dyn data indicating the display time h (n) of each frame F (n) are read from the H header of the frame F (n) (step S43b), and the display time is obtained - 91 -h (n) of each frame F (n) according to the display time Dyn data (step S44b). At this time, the encoded image Cgn data of each frame F (n) are decoded in the order of transmission. Subsequently, it is decided whether the object frame F (n) counted in the order of transmission is the last frame of the specific image or not (step S44b). When the object frame is the last frame, the decoding process is completed. When the object frame is not the last frame, the value of count n is increased by 1 (step S46b) and, subsequently, the process of steps S42b ~ S46b is repeated, until it is decided in step S45b that the object frame It is the last frame. In the decoding process, the decoded image Rg data corresponding to each decoded frame F (n) are displayed at the display time h (n) of the frame F (n) in the prescribed display order n '. Figure 11 (a) is a block diagram illustrating the structure of an image decoding apparatus 2200 as physical elements that perform the decoding process of the second embodiment. The image decoding apparatus 2200 decodes and reproduces the multiplexed bit stream M2 (the encoded image signal 120a or 120b) transmitted from the image coding apparatus 2000. - 92 - More specifically, the image decoding apparatus 2200 includes a demultiplexer 2210 (DEMUX) for extracting, from the multiplexed bit stream M2, the time subunit data Dk, the display cycle identifier Df, the display cycle multiplier data Dm, the display time Dyn data and the data Cgn of encoded image, and transmits this data; and a decoder 2220 for decoding the encoded image data Cgn and transmitting the decoded image data Rg. In addition, the image decoding apparatus 2200 includes a first ON / OFF switch 2240 for switching the circuit between the ON state, where the display cycle multiplier data Dm is transmitted, and the OFF state, where they are suspended. the display cycle multiplier Dm data, according to the display cycle Df identifier; and a second ON / OFF switch 2250 for switching the circuit between the ON state where the display time Dyn data is transmitted, and the OFF state, where the display time Dyn data is suspended, in accordance with the Df ID of display cycle. In addition, the image decoding apparatus 2200 includes a display unit 2230 which receives the data Dm of the display cycle multiplier and the Dty data of the display time through the first and second ON switches 2240 and 2250. / OFF, respectively, as well as the time subunit Dk data and the decoded image Rg data, and performs the image display on the prescribed display timing based on this data. The operation of the image decoding apparatus 2200 will be briefly described. When the multiplexed bit stream M2 of the image coding apparatus 1200 is input to the image decoding apparatus 2200, in the demultiplexer 2210, the time subunit data Dk, the display cycle identifier Df, and the data Dm of display cycle multiplier are separated from the multiplexed bit stream M2 and, in addition, the display time data Dyn and the encoded image data Cgn are separated frame by frame from the bit stream M2. The frame encoded image data Cgn is decoded by the decoder 2220 and then transmitted as decoded image Rg data to the display unit 2230. Meanwhile, the time subunit Dk data is transmitted directly to the display unit 2230. The display cycle multiplier data Dm is transmitted through the first ON / OFF switch 2240, which is turned on or off by the display cycle identifier Df, to the display unit 2230, while the display data Dyn frame display time are transmitted to -94 through the second ON / OFF switch 2250, which is turned on or off by the display cycle identifier Df, to the display unit 2230. When the multiplexed bit stream M2 is the encoded image signal 120a having a fixed display cycle, the first and second ON / OFF switches 2240 and 2250 are in the ON states, and when the multiplexed bit stream M2 is the 120b coded image signal having a variable display cycle, the first and second ON / OFF switches 2240 and 2250 are in the OFF state. In the display unit 2230, the image of each frame corresponding to the decoded image data Rg having a fixed display cycle is displayed at a prescribed display timing based on the time subunit Dk data and the Dm data. of display cycle multiplier. In this case, the display timing of each frame is the display time h '(n1) which is obtained by means of an arithmetic expression h' (n ') = Txn' (T = (l / N) xM). On the other hand, the image of each frame corresponding to the decoded image Rg data having a variable display cycle is displayed at a prescribed timing based on the display time data Dty. In this case, the display timing is the display time h (n) which is decided by the Dty data of display time. - 95 - Co or described in the above, according to the second embodiment of the invention, since the data structure of the encoded image signal includes time subunit Dk data indicating the length of the subunit of time ( l / N) which is obtained by dividing a prescribed time interval with N (natural number) by the natural number N, and the display cycle multiplier data Dm indicating the fixed frame display cycle T by a multiplier M for the subunit of time (l / N) in addition, to display the identifier Df of cycle that indicates if the cycle of exhibition of each frame is variable or not. Therefore, when an encoded image signal having a fixed frame rate is processed, the fixed frame rate value of the encoded image signal can be detected before decoding each frame, whereby the various frames can be simplified. structures of physical elements to implement the image display. In addition, the data structure of the encoded image signal according to the second embodiment includes data Dk of the time subunit, the display cycle identifier Df, the display cycle multiplier data Dm and the time data Dyn. In the case of display, these data are used to adjust the display timing of each frame, as additional data to decide the reproduction timing for each frame, at the end of - 96 - decoding. However, instead of those additional data for deciding the display timing of each frame, the data structure of the encoded image signal may include additional data to decide the decoding timing of each frame, i.e. subunit data of each frame. time, decoding cycle identifier, decoding cycle multiplier data, and decoding time data. Next, such data structure will be described as a modification of the second mode.

(Modification of Modality 2) In the data structure according to the modification of the second embodiment, the display cycle identifier Df and the display cycle multiplier data Dm in the coded image signal 120a of the second embodiment are replaced with an identifier DEf of decoding cycle and DEp data of decoding cycle multiplier, and the display time Dyn data in the encoded picture signal 120b of the second mode are replaced with decoding time DEyn data. The decoding cycle identifier DEf indicates whether the cycle of a decoding process for decoding a coded picture signal of each frame is variable or not. A DEFL identifier of fixed-97-decoding cycle is inserted into a coded picture signal, the decoding cycle DT of which is fixed, while a variable decoding cycle DEf identifier is inserted into a coded picture signal, the DT decoding cycle of which is variable. The decoder cycle multiplier data DEm indicates the frame decoding cycle DT by an M multiplier for the time subunit (l / N), that is, it indicates how many times (M) the decoding cycle DT is as long as the subunit of time. The decoding time data DEyn indicates the timing at which the decoding of each frame is carried out. The coding process for generating the encoded image signal having the data structure according to this modification of the second embodiment is performed by replacing steps S31, S32, S33, S34 and S36 in the flow of figure 8 as follows . That is, the process of deciding the display cycle in step S31 is replaced with the process of deciding whether the decoding cycle is fixed or not; the process of adding the fixed display cycle identifier Df in step S32 is replaced with the process of adding the fixed decoding cycle DEf identifier; and the process of adding the variable display cycle identifier Df in step S34 is replaced with the process of adding the variable decoding cycle DEf-98 identifier. In addition, the process of adding the display cycle multiplier data Dm in step S33 is replaced with the process of adding the decoder cycle multiplier DEm data; and the process of adding the display time Dyn data in step S36 is replaced by adding the decoding time DEyn data. Figure 9 (b) shows the structure of an image coding apparatus 1200a as physical elements for performing the coding process according to the modification of the second embodiment. The image coding apparatus 1200a includes a decision unit 1131a for deciding whether the frame decoding cycle of the input image signal Sg is fixed or not, that is, it is fixed or variable, and transmitting a cycle identifier DEf of decoding indicating whether the decoding cycle is fixed or not, instead of the decision unit 1131 included in the image coding apparatus 1200 of the second mode. The image coding apparatus 1200a includes a decoding cycle multiplier data generator 1233a (second data generator) which generates the decoding cycle multiplier data DEm indicating the frame decoding cycle by an M multiplier for the decoding cycle. time subunit (l / N), based on the image signal Sg-99-input, in place of the display cycle multiplier data generator 1233 of the image coding apparatus 1200. The apparatus 1200a further includes a decoding time data generator 1234a (third data generator) which generates decoding time data DEyn indicating the decoding time Dh (n) of each frame F (n), based on the input image signal Sg, instead of the display time data generator 1234 of the image coding apparatus 1200. In the image coding apparatus 1200a, the multiplexer 1220a (MUX) multiplies the time subunit data Dk, the decoding cycle multiplier data DEm, in the decoding time data DEyt with the encoded image data Cgn each frame F (n) and transmits an encoded image signal having a fixed decoding cycle or an encoded image signal having a variable decoding cycle such as a multiplexed bit stream M2a. Other constituents of the apparatus 1200a are identical to those of the image coding apparatus 1200 of the second embodiment. Next, the operation of the image coding apparatus 1200a according to the coding of the second embodiment will be briefly described. - 100 - When the image signal Sg is input to the apparatus 1200a, the decision unit 1131a decides whether the decoding cycle of the image signal Sg is variable or not, and transmits the decoding cycle identifier DEf indicating the result of the decision. Meanwhile, the first data generator 1232a generates the time subunit data Dk, and the second and third data generators 1233a and 1234a generate decoding cycle multipliers DEm data and the decode time data DEyn ', respectively. The encoder 1110 encodes the image signal Sg and transmits the encoded image data Cgn. The decoding cycle identifier DEf of the decision unit 1231a, the encoded Cgn data of the encoder 1110, and the data Dk and DEyn from the first and third data generators 1232 and 1234a, are input to the multiplexer 1220a. In addition, the decoder cycle multiplier data DEm from the second data generator 1233a is input to the multiplexer 1220a via the switch 1241a. The multiplexer 1220a multiplexes this data, and transmits an encoded image signal having a fixed decoding cycle or a variable decoding cycle in the multiplexed bit stream M2a. On the other hand, the process for decoding the encoded image signal having the data structure according to this modification of the second embodiment is carried out by replacing steps S41, S42a, S43b, S44a, S44b, S45a. and S47a in the flow of figure 10, as follows. That is, the process of deciding the display cycle in step S41 is replaced with the process of deciding whether the decoding cycle is fixed or not; the process of reading the display cycle multiplier data Dm in step S42a is replaced with the process of reading the decoder cycle multiplier data DEm; and the process of reading Dyn data indicating the display time h (n) in step S43b is replaced with the process of reading the data DEyn indicating the decoding time Dh (n). In addition, the process of obtaining the display time h (n) based on the Dyn data in step S44b is replaced with the process of obtaining the decoding time Dh (n) based on the DEyn data; and the process of adjusting the count value n1 to 0 in step S44a, with count value which corresponds to the number n1 of each frame F '(n') counted in the display order of the initial frame, is replaced with the process of adjusting the account value na 0, account value which corresponds to the number n of each frame F (n) counted in the transmission order of the initial frame. In addition, the process of obtaining the time h1 (n ') of displaying each frame F' (n ') by h, (n') = n'xT in step S45a is replaced with the process of obtaining the time Dh ( n) decoding of each frame F (n) by Dh (n) = n? DT based on the -102 decoding cycle DT and number n indicates the frame transmission order; and the process of increasing the account value n 'in step S47a is replaced by increasing the value of account n. Figure 11 (b) is a block diagram illustrating the structure of an image decoding apparatus 2200a as physical elements that perform the decoding process according to the modification of the second embodiment. The image decoding apparatus 2200a receives the multiplexed bit stream M2a transmitted from the image coding apparatus 1200a, and subjects the multiplexed bit stream M2a to reproduction including decoding and displaying. More specifically, the image decoding apparatus 2200a includes a demultiplexer 2210a (DEMUX) for extracting, from the multiplexed bit stream M2a, the time subunit data Dk, the decoding cycle identifier DEf, the decoding cycle multiplier DEm data, the decoding time DEyn data, and the encoded image Cgn data, and transmits this data, in place of the demultiplexer 2210 of the image decoding apparatus 2200 of the second embodiment.

In addition, the image decoding apparatus 2200a includes, in place of the first and second ON / OFF switch 2240 and 2250 of the image decoding apparatus 2200, a first ON / OFF switch 2240a for switching the circuit between the ON state, wherein the decoding cycle multiplier DEm data is transmitted, and the OFF state, where the DEm data is interrupted, based on the decoding cycle identifier DEf; and a second ON / OFF switch 2250a for switching the circuit between the ON state, where the decoding time data DEyn is transmitted, and the OFF state where the DEyn data is interrupted, based on the cycle identifier DEf of decoding. In the image decoding apparatus 2200a, the time subunit data Dk of the demultiplexer 2210a, and the decoding cycle multiplier data DEm and the decoding time data DEyn of the first and second ON / OFF switches 2240a and 2250a are supplied to the decoder 2220a in the display unit 2230a. In the decoder 2220a, the encoded image data Cgn of each frame F (n), the decoding cycle of which is fixed, is decoded frame by frame at the timing (time Dh (n) = Dt? N of decoding) decided by the time subunit Dk data, and the DEm data of the decoding cycle multiplier-104, while the encoded image Cgn data of each frame F (n), the decoding cycle of which is variable, is decoded frame by frame to the timing (decoding time Dh (n)) decided by decoding time data DEyn. In addition, in the display unit 2230a, the decoded image Rg data of each frame F (n), the decoding cycle of which is fixed, is displayed frame by frame in the timing (display time h (n)) decided for the time subunit data Dk and the decoding cycle multiplier DEm data, while the decoded image Rg data of each frame F (n), the decoding cycle of which is variable, are displayed frame by frame in the timing (display time h (n)) decided by decoding time data DEyn. Other constituents of the image decoding apparatus 2200a are identical to those of the image decoding apparatus 2200 of the second embodiment. The operation of the image decoding apparatus 2200a will be briefly described below. When the multiplexed bit stream M2a is input to the apparatus 2200a, in the demultiplexer 2210a, the time subunit data Dk, the decoding cycle multiplier data DEm, the decoding cycle identifier DEf, the time data DEyn decoding and - 105 - the encoded image data Cgn are separated from the bit stream M2a. In the decoder 2220a, when the decoding cycle of the input encoded image signal is set, the encoded image data Cgn is decoded frame by frame in the timing decided by the frame subunit data Dk and the data multiplier DEm of decoding cycle. When the decoding cycle of the input decoded image signal is variable, the encoded image data Cgn is decoded frame by frame in the timing (decoding time Dh (n)) decided by decoding time data DEyn. The decoding time of the encoded image signal, the decoding cycle of which it is fixed, is decided by the product of the number n indicating that the order of transmission of the decoding cycle DT (= (l / N)? M) , and the decoding time of the encoded image signal, the decoding cycle of which is variable, is decided by decoding cycle data DEyn. In the 2230th display unit, the image of each frame F (n) corresponding to the decoded image data Rg, the decoding cycle of which is fixed, is displayed at a prescribed timing based on the time subunit data Dk and the data DEm of display cycle multiplier. On the other hand, the image of each frame F (n) which - 106 - corresponds to the decoded image Rg data, the decoding cycle of which is variable, is displayed at a prescribed timing based on the DEty data of time of decoding. In this modification of the second embodiment, as in the second embodiment, the encoded image signal Cgn obtained by encoding an image signal includes the decoding cycle identifier DEf indicating that the image decoding cycle of each frame is variable or not, the time subunit data Dk and the decoding cycle multiplier DEm data which indicate a fixed decoding cycle, and the decoding time DEyn data which indicate the decoding time. Therefore, when the image decoding cycle for each frame is fixed, the encoded image signal can be decoded by a simple circuit structure, ie, based on the time subunit data Dk corresponding to an image already the decoding cycle multiplier DEm data having a relatively small amount of data (number of bits) without reference to the decoding DEyn data of time having a relatively large amount of data (number of bits) for each frame. Further, when the image decoding cycle for each frame is variable, as in a conventional decoding process, the encoded picture signal can be decoded with reference to decoding time data DEyn for each frame. In the modification of the second mode, emphasis has been placed on an image decoding apparatus 2200a which performs the image display of each frame as well as the decoding of each frame according to the data to decide the decoding timing of each frame. frame, with data that is included in the encoded image signal. However, an image decoding apparatus which performs the decoding of each frame as well as the image display of each frame, according to data to decide the display timing of each frame, data which are included in the signal of encoded image is also within the scope of the present invention. In this case, the decoding timing at which the decoding of each frame is carried out is adjusted according to the display timing data of a plurality of frames including an object frame to be decoded. That is, based on the display timing data of the object frame and the display timing data of the next frame transmitted subsequently to the object frame, the decoding timing of the object frame is set to a timing which is - 108 - previous, by a prescribed offset time compared to the previous display timing between the display timings of the object frame and the next frame. To be specific, when the display timing of the object frame is earlier than the display timing of the next frame subsequently transmitted to the object frame, the deviation time is set to a length greater than the time required to decode the object frame. On the other hand, when the display timing of the next frame (e.g., B-VOP) subsequently transmitted to the object frame (e.g., P-VOP) is earlier than the display timing of the object frame, the deviation time is adjusted to a length greater than the sum of the time required to decode the object frame and the time required to decode the next frame. When a coding program or a decoding program to implement, with programming elements, the image processing by the coding apparatus or the decoding apparatus according to the first and second embodiments and the modifications thereof, is recorded in a data storage medium such as a floppy disk, Image processing can be easily executed in a separate computer system.- 109 - Figures 12 (a) -12 (c) are diagrams to explain the case in which the coding process or the decoding process according to any of the embodiments and modifications of the invention is executed by a system computer using a floppy disk which contains the encoding program or the decoding program. Figure 12 (a) shows a front view of a flexible disk FD, a cross-sectional view thereof, and a flexible disk body D. Figure 12 (b) shows an example of a physical format of the disk body D flexible. The body D of the flexible disk is contained in a case FC, which provides the flexible disk FD. On the surface of the disk body D, a plurality of tracks Tr are concentrically formed from the outer circumference of the disk towards the inner circumference. Each track is divided into 16 sectors (Se) in the angular direction. Therefore, on the flexible disk FD containing the program mentioned above, the program data is recorded in the allocated sectors of the D-body of the floppy disk. Figure 12 (c) shows the structure for recording or registering the program on the flexible disk FD and performing the image processing by means of programming elements using the program stored on the flexible disk FD. To be specific, when a program is registered on the FD floppy disk, the program data is written to -101 - the FD floppy disk from the Cs computer system through that of the FDD floppy disk drive. When the above-mentioned image coding apparatus or the image decoding apparatus is constructed in the computer system Cs by the program recorded on the flexible disk FD, the program is read from the flexible disk FD by the flexible disk unit FDD and then it is loaded into the computer system Cs. Although a flexible disk is used in the above description as a data storage medium, an optical disk can be used. Furthermore, in this case, the coding process and the decoding process can be performed by programming elements in a manner similar to the case in which the floppy disk is used. The data storage medium is not restricted to the floppy disk and the optical disk, and any medium can be used insofar as it can contain the program, for example, an IC card or a ROM cassette. Further, assuming that the encoded image signal stored in a data storage medium such as a floppy disk has a data structure according to any of the first and second embodiments and the modifications thereto, when the encoded image signal of the flexible disk is decoded and the image corresponding to the decoded image signal is displayed, it is possible to perform the reproduction of the encoded image signal, including the decoding and image display of the image signal, with a structure of simple circuit if the frame display cycle or frame decoding cycle is fixed. It is noted that in relation to this date, the best method known by the applicant to carry out the aforementioned invention, is the conventional one for the manufacture of the objects to which it relates. Having described the invention as above, property is claimed as contained in the following:

Claims (35)

- 112 - CLAIMS

1. A data structure of an image signal for which an image reproduction of each frame is performed in a prescribed cycle, the image signal data structure includes a reproduction cycle identifier which indicates whether the image reproduction cycle for each frame it is variable or not.

2. The image signal data structure, according to claim 1, characterized in that the reproduction cycle identifier is a display cycle identifier that indicates whether the image display cycle of each frame is variable or not.

3. The image signal data structure, according to claim 2, characterized in that it includes: a fixed display cycle identifier which indicates that the image display cycle for each frame is fixed, such as the cycle identifier display; display cycle data that indicate the image display cycle for each frame; and frame position data that correspond to each frame and that indicate the relationship of position of each frame with the previous and subsequent frames. - 113 -

4. The image signal data structure, according to claim 2, characterized in that it includes: a variable display cycle identifier which indicates that the image display cycle for each frame is variable, such as the identifier exhibition cycle; and display timing data indicating the timing at which the image display of each frame is performed, the timing is adjusted relatively to a desired reference time selected from at least one reference time, according to each frame.

5. The image signal data structure, according to claim 1, characterized in that the reproduction cycle identifier is a decoding cycle identifier indicating towards the decoding cycle of an encoded image signal corresponding to each frame is variable or not.

6. The image signal data structure, according to claim 5, characterized in that it includes: a fixed decoding cycle identifier indicating that the decoding cycle for each frame is fixed, as the decryption cycle identifier; decoding cycle data indicating the decoding cycle for each frame; and - 114 - frame position data corresponding to each frame and indicating the positional relationship of each frame with the previous and subsequent frames. The image signal data structure, according to claim 5, characterized in that it includes: a variable decoding cycle identifier which indicates that the decoding cycle for each frame is variable, as such decryption cycle identifier; and decoding timing data indicating the timing at which the decoding of each frame is performed, the timing is adjusted relative to the selected desired reference time of at least one reference time, according to each frame. 8. An image coding method for encoding an image signal corresponding to a specific image to generate a coded image signal, and transmitting the coded image signal together with a reproduction cycle identifier indicating whether the reproduction cycle of image for each of the frames constituting the margin is variable or not, characterized in that: when an image signal having a fixed cycle of image reproduction for each frame is entered as the image signal to be encoded , the reproduction cycle data and the frame position data are transmitted - 115 - together with the reproduction cycle identifier, the reproduction cycle data indicate the image reproduction cycle for each frame, the position data of frame that correspond to each frame and indicate the positional relationship of each frame with previous and subsequent frames; and when an image signal having a variable cycle of image reproduction for each frame is inputted as the image signal to be encoded, the reproduction timing data is transmitted together with the reproduction cycle identifier, the data of timing of reproduction indicate the timing at which the image reproduction of each frame is performed, the timing is adjusted in relation to a desired reference time that is selected from at least one reference time, according to each frame. The method of image coding according to claim 8, characterized in that: the reproduction cycle identifier is a display cycle identifier which indicates whether the cycle of the image display for each frame is variable or not; the reproduction cycle data is display cycle data indicating the image display cycle for each frame; and the reproduction timing data are display timing data indicating the timing a-116 - which the image display of each frame is made, the timing is adjusted in relation to the selected desired reference time of at least one Reference time, according to each frame. The image coding method according to claim 8, characterized in that: the reproduction cycle identifier is a decoding cycle identifier which indicates whether the decoding cycle of the encoded image data corresponding to each frame is variable or not; the reproduction cycle data is decoding cycle data indicating the decoding cycle for each frame; and the reproduction timing data are decoding timing data indicating the timing at which the decoding of each frame is performed, the timing is adjusted in relation to a desired reference time selected from at least one reference time, according to each frame. 11. An image decoding method for decoding an encoded image signal which includes encoded image data corresponding to frames constituting an image, and a reproduction cycle identifier that indicates whether the image reproduction cycle of each frame is variable or not, characterized in that: - 117 - when the reproduction cycle identifier indicates that the image reproduction cycle for each frame is fixed, it decodes image data obtained by decoding the encoded image data corresponding to each frame that image data having a reproduction timing which is decided according to the reproduction cycle data indicating the image reproduction cycle for each frame and the frame position data indicating the position relation of each frame are converted. frame with the previous and subsequent frames, data which are included in the encoded image signal; and when the reproduction cycle identifier indicates that the image reproduction cycle for each frame is variable, the decoded image data obtained by decoding the encoded image data corresponding to each frame are image data having a reproduction timing. decided according to reproduction timing data which are included in the coded picture signal and indicate the timing at which the picture reproduction of each frame is carried out, the timing is adjusted in relation to a desired reference time selected from at least one reference time, according to each frame. The method of image decoding according to claim 11, characterized in that: - 118 - the reproduction cycle identifier is a display cycle identifier that indicates whether the image display cycle for each frame is variable or not; the reproduction cycle data is display cycle data indicating the image display cycle for each frame; and the reproduction timing data is display timing data indicating the timing at which the display of each frame is performed. The method of image decoding according to claim 11, characterized in that the decoding timing at which the decoding of each frame is carried out is adjusted according to display timing data of a plurality of frames including an object frame that is going to be decoded. The method of image decoding according to claim 13, characterized in that, based on the display timing data of the object frame and the display timing data of the next frame transmitted subsequently to the object frame, the timing is set of decoding the object frame to a timing that is earlier, for a prescribed deviation time, compared to the previous display timing between the display timings of the object frame and the next frame. - The method of image decoding according to claim 14, characterized in that: when the display timing of the object frame is earlier than the display timing of the next frame, the deviation time is adjusted to a longer length that the time required to decode the object frame; and when the display timing of the next frame is prior to the display timing of the object frame, the deviation time is set to a length greater than the sum of the time required to decode the object frame and the time required to decode the next frame . 16. The image decoding method according to claim 11, characterized in that: the reproduction cycle identifier is a decoding cycle identifier which indicates whether the decoding cycle of the encoded image data corresponding to each frame are variable or not; the reproduction cycle data is decoding cycle data indicating the decoding cycle for each frame; and the reproduction timing data is decoding timing data indicating the - 120 - timing at which the decoding of each frame is performed. 1

7. The image signal data structure according to claim 1, characterized in that it includes: the subunit data of time indicating the length of a subunit of time which are obtained by dividing a prescribed time interval by N ( natural number), by the natural number N; and the reproduction cycle multiplier data indicating that the image reproduction cycle for each frame is the time subunit multiplied by M (natural number) by the multiplier M. 1

8. The data structure of the conformity image signal with claim 17, characterized in that: the identifier of the reproduction cycle is a display cycle identifier indicating towards the image display cycle for each frame is variable or not; and the reproduction cycle multiplier data is display cycle multiplier data which indicates that the image display cycle for each frame is the time subunit multiplied by M (natural number) by the multiplier M. 1

9. The image signal data structure according to claim 17, characterized in that: - 121 - the reproduction cycle identifier is a decoding cycle identifier that indicates whether the decoding cycle for each frame is variable or not; and the reproduction cycle multiplier data are multiplier data of the decoding cycle which indicate that the decoding cycle for each frame is the time subunit multiplied by M (natural number), by the multiplier M. 20. A method of image coding for encoding an image signal corresponding to a specific image to generate a coded image signal, and transmitting the coded image signal together with a reproduction cycle identifier indicating whether the image reproduction cycle for each of the frames constituting the image is variable or not, the method is characterized in that: when an image signal having a fixed cycle of image reproduction for each frame is entered as the image signal to be encoded, the data of time subunit and the reproduction cycle multiplier data are transmitted together with the rep cycle identifier tion, the time subunit data indicating the length of a subunit of time which is obtained by dividing a prescribed time interval between N (natural number) by the natural number N, and the multiplier data - 122 - of cycle of reproduction that indicate the image reproduction cycle for each frame is the subunit of time multiplied by M (natural number) by the multiplier M. 21. The method of image coding according to claim 20, characterized in that: the identifier of the reproduction cycle is an exhibition cycle identifier that indicates whether the image display cycle for each frame is variable or not; and the reproduction cycle multiplier data are display cycle multiplier data which indicate that the image display cycle for each frame is the time subunit multiplied by M (natural number), by the multiplier M. 22. The image coding method according to claim 20, characterized in that: the reproduction cycle identifier is a decoding cycle identifier which indicates whether the decoding cycle for each frame is variable or not; and the reproduction cycle multiplier data is decoding cycle multiplier data which indicates that the decoding cycle for each frame is the time subunit multiplied by M (natural number), by the multiplier M. 23. A method decoding picture for decoding an encoded picture signal including the following data: encoded picture data corresponding to frames constituting an image; a reproduction cycle identifier which indicates whether the image reproduction cycle for each frame is variable or not; subunit data of time indicating the length of a subunit of time which is obtained by dividing a prescribed time interval between N (natural number) by the natural number N; and reproduction cycle multiplier data indicating that the image reproduction cycle for each frame is the time subunit multiplied by M (natural number) by the multiplier M, the method is characterized by: when the reproduction cycle identifier indicates that the image production cycle for each frame is fixed,. the decoded image data obtained by decoding the encoded image data corresponding to each frame causes the image data to have a reproduction timing which is decided according to the subunit time data indicating the subunit length of time and the reproduction cycle multiplier data indicating the image reproduction cycle for each frame. 24. The image decoding method according to claim 23, characterized in that: - 124 - the reproduction cycle identifier is a display cycle identifier which indicates whether the image display cycle for each frame is variable or not; and the reproduction cycle multiplier data are display cycle multiplier data which indicate that the image display cycle for each frame is the time subunit multiplied by M (natural number), by the multiplier M. 25. The image decoding method according to claim 23, characterized in that: the reproduction cycle identifier is a decoding cycle identifier that indicates whether the decoding cycle for each frame is variable or not; and the reproduction cycle multiplier data are decoding cycle multiplier data which indicate that the decoding cycle for each frame is the time subunit multiplied by M (natural number), by the multiplier M. 26. An apparatus of image coding for encoding an image signal corresponding to a specific image, characterized in that it comprises: an encoder for encoding an input image signal and transmitting encoded image data; a cycle decision unit for deciding whether the image reproduction cycle for each of the frames constituting the image is variable or not, based on the same signal, and transmitting a reproduction cycle identifier that indicates the result of the decision; a first data generator for generating reproduction cycle data indicating the image reproduction cycle for each frame, according to the image signal; a second data generator for generating frame position data corresponding to each frame and indicating the positional relationship of each frame with previous and subsequent frames, according to the image signal; a third data generator for generating reproduction timing data indicating the timing at which the image reproduction is carried out for each frame, according to the image signal, an ON / OFF switch for switching the circuit between an ON state, wherein the reproduction cycle data is transmitted, and a STOP state, where the reproduction cycle data is interrupted, according to the reproduction cycle identifier; a selector switch for selecting one of the frame position data and the reproduction timing data, according to the reproduction cycle identifier; - 126 - a multiplexer for multiplexing the outputs of the encoder, the cycle decision unit and the switches in a prescribed order; and the image coding apparatus transmits a bit stream obtained by multiplication as an encoded image signal. 27. An image decoding apparatus for decoding and reproducing the encoded image signal transmitted from the image coding apparatus according to claim 26, characterized in that it comprises: a demultiplexer for receiving the encoded image signal and separating the signal from encoded image in the encoded image data, the reproduction cycle identifier, the reproduction cycle data, the frame position data and the reproduction timing data, and then transmitting this data; a decoder for decoding the encoded image data, frame by frame, for generating decoded image data, an ON / OFF switch for switching the circuit between an ON state, in which the reproduction cycle data is transmitted, and a state OFF, where the reproduction cycle data is interrupted, according to the reproduction cycle identifier; - 127 - a selector switch for selecting one of the frame position data and the reproduction timing data, according to the reproduction cycle identifier; and an exhibit unit for displaying the image of each frame according to the decoded image data; wherein at least the decoding by the decoder and the display of the image by the display unit is carried out at a reproduction timing determined by the reproduction cycle data and the frame position data or a reproduction timing decided by the reproduction timing data, according to the reproduction cycle identifier. 28. An image coding apparatus for encoding an image signal corresponding to a specific image, characterized in that it comprises: an encoder for encoding an input image signal, and transmitting encoded image data; a cycle decision unit for deciding whether the image reproduction cycle for each of the frames constituting the image is variable or not, based on the image signal, and transmitting a reproduction cycle identifier indicating the result of the decision; - 128 - a first data generator for generating time subunit data indicating the length of a subunit of time which is obtained by dividing a prescribed time interval between N (natural number) by the natural number N; a second data generator for generating reproduction cycle multiplier data indicating that the image reproduction cycle for each frame is the time subunit multiplied by M (natural number) by the multiplier M, according to the image signal; a third data generator for generating reproduction timing data indicating the timing at which the image reproduction of each frame is carried out, according to the image signal; a first ON switch for switching the circuit between an ON state, where the time subunit data is transmitted, and a OFF state, where the time subunit data is interrupted, according to the reproduction cycle identifier; a second ON / OFF switch to switch the circuit between the ON state, where the reproduction cycle multiplier data is transmitted, and the OFF state, where the reproduction cycle multiplier data is interrupted, in accordance with the reproduction cycle identifier; - 129 -. a multiplexer for multiplexing the outputs of the encoder, the cycle decision unit, the third data generator, and the first and second ON / OFF switches, in a prescribed order; an image coding apparatus that transmits a bit stream obtained by multiplication as a coded image signal. 29. An image decoding apparatus for decoding and reproducing the encoded image signal transmitted from the image coding apparatus according to claim 28, characterized in that it comprises: a demultiplexer for receiving the encoded image signal and separating the signal from encoded image in encoded image data, the reproduction cycle identifier, the time security data, the reproduction cycle multiplier data and the reproduction timing data, and then transmitting these. data; a decoder for decoding the encoded image data, frame by frame, to generate decoded image data; a first ON / OFF switch to switch the circuit between the ON state where the reproduction cycle multiplier data is transmitted, - 130 - and the OFF state, where this data is interrupted, according to the cycle identifier Of reproduction; a second ON / OFF switch for switching the circuit between the ON state in which the reproduction timing data is transmitted, and the OFF state, where this data is interrupted, according to the reproduction cycle identifier; a display unit for performing the image display for each frame according to the decoded image data; wherein at least one of the decoding by the decoder and the display of the image by the display unit is performed at a reproduction timing determined by the time subunit data and the reproduction cycle multiplier data or a timing of reproduction decided by the reproduction timing data, according to the reproduction cycle identifier. 30. A data storage medium containing an image signal for which an image reproduction is performed for each frame at a prescribed cycle, the image signal includes a reproduction cycle identifier which indicates whether the reproduction cycle of image for each frame is variable or not. - 131 - 31. A data storage medium containing an image signal for which an image reproduction is performed for each frame at a prescribed cycle, the image signal is characterized in that it includes: a reproduction cycle identifier which indicates whether the image reproduction for each frame is variable or not; subunit data of time indicating the length of a subunit of time which is obtained by dividing a prescribed time interval between N (natural number) by the natural number N; and reproduction cycle multiplier data indicating that the image production cycle for each frame is the time subunit multiplied by M (natural number) by the multiplier M. 32. A data storage medium containing a program of image processing, the image processing program is characterized in that it is a coding program which allows a computer to execute the coding of an image signal by the image coding method according to claim 8. 33. A medium data storage containing an image processing program, characterized in that the image processing program is a decoding program which allows a computer to execute the decoding of an image signal encoded by the decoding method of image according to claim 11. 34. A data storage medium that c Having an image processing program, the image processing program is characterized in that it is a coding program which allows a computer to execute the coding of an image signal by the image coding method according to claim 20. 35. A data storage medium containing an image processing program, the image processing program is characterized in that it is a decoding program which allows a computer to execute the decoding of an image signal encoded by the method of image decoding according to claim 23. - 133 - SUMMARY OF THE INVENTION A data structure of an image signal including a reproduction cycle identifier which indicates towards the image display cycle of each frame is variable or not is provided. When the display cycle identifier indicates that the display cycle is fixed, display cycle data is inserted into a coded image data header, and data is inserted in relation to the frame number in each frame. On the other hand, when the display cycle identifier indicates that the display cycle is variable, display time data is inserted for each frame. Therefore, when the encoded image data having a fixed display cycle is decoded and displayed, the decoded image data can be displayed by a simple circuit structure, i.e., based on the display cycle data and the frame number data having a relatively small amount of data (number of bits), without referring to the display time data having a relatively large amount of data for each frame. In addition, this data structure can be applied to an encoded image signal having a variable display cycle.