MXPA98000930A - Exhibition on display structure of list link - Google Patents

Abstract

An on-screen display system (OSD) includes a source (10) of a signal representative of the background image. An OSD memory (50), for storing a sequence of blocks, each block containing data representing an OSD image. Each block also includes a pointer for a next block in the sequence. An OSD generator (40) retrieves the blocks (52) from the OSD memory and generates a signal representative of the OSD image from the representative OSD data. A signal combiner (20) combines the representative signal of background image and the representative signal of image O

Description

EXHIBITION ON LINKED LIST STRUCTURE SCREEN FIELD OF THE INVENTION The present invention relates to an on-screen display architecture, for use in television receivers, which stores the representative display data in a linked list.

BACKGROUND OF THE INVENTION Television receivers frequently use on-screen displays (OSDs) to transfer information to the user. For example, in television sets, an OSD displays the current channel when a user changes the channel; or displays a bar graphically illustrating the current volume of the television set when the user adjusts the volume. In video tape recorders, an OSD is used to help the user record time information for unattended recording. It has been proposed to provide animated OSDs to further improve the user interface. The current OSD display systems use a bitmap architecture in which the OSD image is considered to be a layout of image elements (pixels) placed as rows N, each row containing M pixels placed in columns. Each pixel in the OSD arrangement can assume one of a predetermined number of colors The data representing the image in the OSD pixel array are stored in a memory, called OSD memory in the remainder of this application, which is placed in an array corresponding to rows N, each row containing M representative pixel words In a black and white display, the representative pixel words are 1 bit wide representing either black or white In monochrome displays, each pixel representative word contains a plurality of bits that represent the gray scale level of that pixel The color pixels are represented by three sets of color level bits, one set for each of the primary colors red, green and blue Alternatively, each word representative pixel represents one of a predetermined number of colors selected from a palette The most active OSDs When using the palette technique In the OSD display systems, the image data defining the contents of the OSDs that are displayed for the next field, and the new palette and other control data, are stored (in the format described above). ) in the OSD memory during the vertical extinction interval (VBI) As the television receiver begins to scan the visible portion of the frame, the line and pixel counters maintain the location in the pixel that is currently being scanned and, if an OSD is specified for that area, the OSD image data from the OSD memory is superimposed on the received video signal. For example, OSD data could replace the received video signal. Or they could be combined with the video signal in some way, as is well known. During read hours for OSD memory, OSD memory must produce data with a relatively high bandwidth. This requirement has been met through the use of a specially designed video read / write memory (VRAM) that can serially bypass a broad data output word in a single memory access time. This, in turn, requires that the data for the OSDs be located contiguously in the memory to minimize the time of addressing and access. The animation is produced by displaying a time sequence of the OSDs for an individual location on the screen in which the image of each OSD is slightly different from the preceding one. For example, an animation of a door opening can start with a door OSD in a closed position, followed by an OSD with the door open a quarter, then with the door open halfway, then opened to three quarters and finally open completely. If the OSD images in the animation are relatively simple, the data representing each can be updated during the vertical extinction interval. However, if the OSD is complex, there will be no time for such an update. An OSD architecture that facilitates animated OSD is desirable.

In European Patent Publication 0 028 443, published May 13, 1981, pointers are included in the teletext data transmitted from a central location for the teletext receivers. These pointers indicate the next or previous pages in the current magazine and are used to retrieve those pages in the backup so that they are immediately available if the observer wishes to follow the pages in order. In the patent publication UK 2 104 760, published on May 9, 1983, a game system of video includes representative image section data stored in possibly non-contiguous locations in a read-only memory (ROM) Pointers are located in contiguous locations in a RAM and point to later and previous image portions in the ROM that makes up the image of current video game A processor writes the pointers inside the contiguous portion of the memory to change the image of the ju video ego These pointers are traversed, in order, to retrieve the data representing the desired video game image and to generate a video signal representing that image. In United States Patent 4,203,107 issued May 13, 1980. , a terminal system stores representative character data blocks to be displayed on a display device within possibly non-contiguous portions of a display memory as received from a serial port or keyboard. The pointers for those blocks are written within contiguous locations in the display memory. These pointers are traversed, in order, to retrieve representative character data and, to generate a video signal representing the character images. Those prior art systems related to on-screen displays (UK 2 104 760 and US 4,203,107) store the pointers in a separate list in contiguous locations of memory. This arrangement means that when a display change is made, and in particular, when an image block is moved from one screen location to another, or a new portion of the image is added to the image, the complete list of pointers should be rewritten, which, as described above, can be a time-consuming task if many representative blocks of image make up the image.

BRIEF DESCRIPTION OF THE INVENTION In accordance with the principles of the present invention, an on-screen display system (OSD) includes a source of a preceding image signal, an OSD memory, for storing at arbitrary locations a plurality of blocks containing data representing an image. OSD, an OSD generator, for recovering the plurality of blocks from the OSD memory and generating a signal representative of the OSD image in response to the representative OSD image data in each recovered block and a signal combiner, for combining the image representative signal above and the representative signal of OSD image. Such a system is characterized in that the OSD stores the blocks as a sequential plurality of blocks, each block containing a pointer to a next block in the sequence and the OSD generator, after recovering a block and generating a signal representative of the OSD image. , in response to the pointer, retrieves the next block in the block sequence. An OSD according to the present invention does not require that the OSD information be written into the OSD memory in a simple contiguous block, however, since each block contains a pointer for the next block in the sequence, the blocks can be stored in locations arbitrary noncontiguous in OSD memory. This eliminates the requirement that the OSD data be completely written into the memory during the VBI. Instead of that, the OSD blocks can be written into the memory at any time and only the pointers updated during the VBI. This allows more complex changes in field OSDs in the field, facilitating animated OSDs.

BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a block diagram of a portion of a television signal receiver that includes an on-screen display system in accordance with the present invention; and Figure 2 is a diagram of the information memory distribution in the OSD memory of the on-screen display system illustrated in Figure 1.

DETAILED DESCRIPTION Figure 1 is a block diagram of a portion of a television receiver that includes an on-screen display system in accordance with the present invention. Figure 1 illustrates only those elements of such a television receiver that are necessary to understand the invention. One skilled in the art will understand that other elements are required and how to design, implement and interconnect such elements with the illustrated elements. In Figure 1, an image signal source 10 produces a representative image signal. A signal output terminal of the image signal source 10 is coupled to a first input terminal of an output terminal of the image signal source 10 which is coupled to a corresponding input terminal of the OSD generator 40. A control processor 60 includes a first bidirectional control terminal coupled to the image signal source 10, and a second bidirectional control terminal coupled to the OSD generator 40. In operation, the image signal source 10 may be a front end of television receiver of known design for the reception of an interruption, transmitted signal of cable or satellite, or it can be the reproduction mechanism of a video tape recorder or video disc, also of known design The control processor 60 controls the image signal source 10, for example, for tuning a channel or selecting a pre-recorded program on a video disc or tape recorder. video The image signal source 10 produces a signal representing the image that the observer wishes to see The representative picture signal may be a standard video signal (e.g., NTSC) or any other representative signal, such as signals RGB actuators for a kinescope in the television display device 30 This signal is passed to the display device 30 through the signal combiner 20 The display device 30 produces a visible image for the observer and can be a television receiver or monitor, including an image tube, of known design The display device 30 exhibits the image represented by that image representative signal for the observer in the full screen represented by the rounded rectangle in Fig. 1 The control processor 60 stores also in the OSD memory 50 a plurality 52 of blocks, which is described in more detail below, each of which defines an on-screen display image in the above-described bit / palette map format. The control processor 60 writes those blocks 52 to arbitrary locations in the OSD using the OSD generator 40 as a word control circuit, in a known manner. In an alternative embodiment, the control processor 60 can write the blocks within the OSD memory 50 directly, as indicated in translucent in FIG. 1. The control processor 60 also provides the generator 40 with location in OSD memory 50. of the first of one of those blocks 52 to be displayed. The OSD generator 40 reads block 52 at this location to determine the row and pixel where the OSD image represented by this block will be located on the image displayed by the display device 30. The image signal source 10 provides the OSD generator 40, by means of signals in its state output terminal, the line and the pixel that are currently being scanned. The OSD generator 40 checks the line and the pixel that are currently being scanned. When the scan reaches the location to be filled by the OSD represented by the first block, the OSD generator 40 retrieves the data from the block 52 representing that OSD and generates a representative image signal representing that OSD from the bit / palette mapping data, in a known manner. This representative OSD image data from the OSD generator 40 is then supplied to the signal combiner 20 to be combined with the image received or reproduced from the image signal source 10. The signal combiner 20 operates in a known manner to combine the signal representative of OSD image with the image signal received or reproduced to produce an image on the display device 30 including the image received or reproduced as the background image, with the OSDs 32 positioned within that background image. For example, the signal combiner 20 can replace the background image with the OSD image, that is, the signal combiner operates as a simple switch. Alternatively, the signal combiner 20 may mix the OSD image and the background image in a predetermined ratio. Or a color of the color palette that defines the OSD image may represent "transparent" and, when that color is produced by the OSD 40 generator, the background image is allowed to be displayed through the OSD image, otherwise the OSD image is superimposed on the background image. Furthermore, it is possible for the representative OSD information in block 52 in the OSD memory 50 to control the operation of the signal combiner 20. For example, the OSD generator 40 can condition the signal combiner 20 to vary the proportion of the signal representative of the signal. background image to the OSD image representative signal in response to the data stored in the block 52 in the OSD memory 50 that defines that OSD. For example, the ratio can be varied from 0% (ie the OSD image is superimposed opaquely to the background image), up to 20% (ie the background image is barely visible through the OSD image), up to 80% (ie the OSD image is barely visible through the background image), up to 100% (ie the OSD image is invisible). The OSD generator 40 may also condition the signal combiner 20 to selectively enable or disable the "transparent" color operation in response to the data stored in the block 52 in the OSD memory 50 for that OSD. In addition, it is possible to include the data with each entry in the palette in each block 52 which defines whether the color defined by this palette entry is to blend with, or to overcome, the background image signal. Fig. 2 is a diagram of memory distribution of the information in the OSD memory 50 of the on-screen display system illustrated in Fig. 1. In Fig. 2, the OSD memory 50 is illustrated as a rectangle and the distribution of the blocks 52 of the OSD data within the OSD memory 50 is illustrated by other rectangles within the OSD memory 50. The corresponding display 30, which exhibits a background image and three OSD 32 images, is also illustrated in Fig. 2. In addition, a pointer for the location of the first OSD block in the OSD memory 50 is contained in a data storage 42. The data storage 42 may also be in a location within the OSD 50 memory, or a register of electromechanical equipment. separated from the OSD memory 50 Specifically, there are five OSD blocks stored in the arbitrary locations in the OSD memory 50 Block 1, 51 (1), corresponds to OSD 1, block 2, 52 (2), corresponds to OSD 2, the block 3A, 52 (3A), corresponds to OSD 3, and block 4, 52 (4) corresponds to an OSD not illustrated on display 30 for simplicity purposes in the figure. Each block 52 includes a header, followed by data from bitmap / palette that describe the OSD image represented by this block In FIG. 2, only blocks 1 and 2, 52 (1) and 52 (2), respectively, are shown in detail, although all blocks 52 have a structure similar The header contains data, denoted LOC in Fig 2 representing the line and pixel of the location of the OSD image on the display 30 The header also contains a pointer denoted PTR in Fig 2, for the location in the OSD 50 memory of the block containing the data defining the next OSD to be displayed in the display 30 The header also contains other data represented by an OSD image, denoted IMAGE DATA in Fig. 2, is placed in a manner known in the remainder of the block 52 In the general operation, the control processor 60 (of FIG. 1) generates and stores the blocks 52 in the OSD memory 50 then, during the VBI, sets the start pointer 42 and all the pointers, PTR, in the blocks 52 to form a sequence of blocks 52, which represent a sequence of OSDs 32. During the active portion of the scan, the OSD generator 40 retrieves the data previously stored in the block sequence 52 from the OSD 50 memory and generates a representative signal of OSD image which is combined with the background image signal from the image signal source 10 in the image combiner 20 to form a signal representing the image on the display 30 with the OSDs 32. For example, in Fig. 2, blocks 1, 2, 3A and 4 have been previously written to the OSD memory 50 by the control processor 60 before the start of the current field. As can be seen from Fig. 2, the blocks 52 do not need to be contiguous. The header of each block contains the location on display 30 of OSD 32 generated by that block. This is indicated in Fig. 2 by vertical arrows from the display location pointer LOC in block 1, 52 (1), for location 30 in display 30 of OSD 1, from the pointer LOC in block 2 for the OSD 2, and from the pointer LOC in block 3A for OSD 3. During the VBI of the current field, the processor 60 stores the location of block 1 in the start pointer 42, the location of block 2 in the PTR pointer of block 1, the location of block 3A in the PTR pointer of block 2 and the location of block 4 in the PTR pointer of block 3A (all represented in Fig. 2 by curved arrows from the location in the OSD 50 memory containing the pointer for the location pointed to by that pointer), and an out-of-scale value (i.e. a row and / or pixel value that is not within the display area of the display 30) in the pointer of block 4 This process is relatively fast that only involves a How many memory accesses, including for an exhibit 30 containing a large number of complex OSDs 32 At the beginning of the active portion of the current field, the OSD generator 40 recovers block 1, 52 (1), pointed to by the pointer of start 42, and read the header From the header, the OSD generator 40 extracts the pointer LOC for the row location and the pixel of the OSD 1 on the display 30 and, the palette for OSD 1 stored in the image data portion of block 1 52 (1) Then the OSD controller begins to check the row and the pixel that are currently being scanned, as supplied by the image signal source 10 When the row and the pixel of OSD 1 is reached, the OSD generator 40 supplies the OSD 1 image data from block 1, 52 (1), for the signal combiner 20 where it is combined with the background image representative signal all in a known manner When the OSD 1 display is completed, the targeted r PTR from block 1, which points to block 2, 52 (2), is extracted from the header information Using this pointer to locate block 2, 52 (2), the image data from OSD 2 is retrieved from the OSD memory 50, and processed in the same manner as described above for block 1, 52 (1). When OSD 2 has been displayed, OSD 3, represented by block 3A, 52 (3A) and, OSD (not shown) represented by block 4, 52 (4), are then displayed, in that order. When OSD 4, represented by block 4, 52 (4), has been displayed, the pointer from the header of block 4, 52 (4), is extracted. Since it is at an out-of-scale value, this indicates that for the OSD generator 40 there are no more OSDs to be displayed in this field and, the OSD generator 40 stops the processing of the blocks 52. In Fig. 2, OSD 3 can be animated, which in the illustrated mode has two images that are quickly alternated to create the animation effect. It is also possible to have more than two images (ie 3A, 3B, 3C, 3D, etc.), which are displayed in order, in the animation. The control processor 60 can write the blocks 52 within the OSD memory 50 which define all the different images of the OSD 3 to be displayed in the animation in process. During the field described above, the first image (defined by block 3A, 52 (3A)) of OSD 3 the animation was displayed. During the VBI of the next field, the control processor 60 writes the location of block 1, 52 (1), inside the start pointer 42; the location of block 2, 52 (2), within the PTR pointer of block 1, 52 (1); the location of block 3B, 52 (3B), (instead of block 3A, 52 (3A)) within the PTR pointer of block 2, 52 (2) (as illustrated in transparency in Fig. 2); and the location of block 4, 52 (4), within the PTR pointer of block 3B, 52 (3B) (also shown in transparency in Fig. 2) During this field, the second image of OSD animation 3 is displayed. For the next field, the OSD image 3 represented by the block 3A, 52 (3A), is again displayed on the OSD 3 by changing the pointer PTR in block 2, 52 (2) to point to the location of the block 3A, 52 (3A) again during the VBI If more than two images were part of the animation, each one would be displayed in turn placing the location of this block 52 (3) inside the PTR pointer of block 2, 52 (2) Alternatively, the OSD 3 may be an OSD display information that changes relatively fast During the active portion of a field, a new value is determined by the control processor 60, which generates a new OSD image representing this new value and stores the representative image data in block 3B During the VBI, this image n Recently generated OSD 3 is linked within the block sequence defining the OSDs as illustrated in transparency in Fig. 2, by placing in the OSD 50 memory within the PTR pointer of block 2, 52 (2) Block 53 (3A) which contains the image displaying the previous value of the information can then be released and used for other purposes Since the blocks defining the OSD images do not need to be contiguous, as in the prior art, the control processor 60 can generating a complete series of representative blocks of image 52 in advance, such as for animation, or a new representative block of image representing a new information value at any time in the scan. During the VBI, the next image in the animation, or the newly generated OSD image is simply linked within the sequence of the OSDs by changing only the pointers in the OSD 52 image blocks. The time spent updating the start pointer 42 and the PTRs pointers in blocks 52 is minimal and, a relatively large number of OSDs of arbitrary size and which change relatively quickly, may be maintained in an OSD display in accordance with the present invention. The illustrated mode included a simple start pointer 42. But someone skilled in the art will understand that to obtain the maximum vertical resolution in an interlaced display system, respectively different OSD blocks 52 may be used for odd and even fields for the same OSD 32 In such an embodiment, two start pointer data stores (corresponding to data storage 42) can be maintained, one for odd fields and one for even fields, and each signaling the start of respectively different sequences of data blocks of data. OSD image 52 stored in the OSD memory 50 by the control processor 60. During odd fields, the sequence pointed by the odd-field start pointer is processed and, during the even fields, the sequence signaled by the pointer of the odd-numbered field is processed. beginning of field par. Alternatively, two different sequences (an odd field sequence and, an even field sequence) of the data blocks 52 can be maintained in the OSD memory 50 by the control processor 60, as before, and the data storage content. simple start pointer 42 changed by the control processor 60 so that the representative image signals represented by the odd field sequence are produced during the odd fields, and those represented by the even field sequence of the OSD blocks 52 occur during even fields.

Claims (14)

1. An on-screen display system (OSD) comprising: a source (10) of a signal representative of background image; an OSD memory (50), for storing at arbitrary locations a plurality of blocks (52) containing data representing an OSD image; an OSD generator (40), for recovering the plurality of blocks (52) from the OSD memory (50) and, generating a signal representative of the OSD image in response to the representative OSD image data in each recovered block (52); and a signal combiner (20), for combining the representative background image signal and the OSD image representative signal; characterized in that: the OSD memory (50) stores the blocks as a sequential plurality of blocks (52), each block containing a pointer (PTR) for a next block in the sequence; and the OSD generator (40), after recovering a block (52) and generating an image representative signal, in response to the pointer, retrieves the next block in the block sequence.

2. The system of claim 1, wherein: the background image signal source (10) further comprises the circuits to produce a signal representing the location in the background image that is currently being produced by the image signal source background; characterized in that: each of the sequential plurality of blocks (52) further contains data (LOC) representing a location in the background image in which the image represented by the OSD image representative data stored in one of the sequential plurality of blocks (52) that are displayed; and the OSD generator (40) comprises circuits, which respond to the image representative signal from the background image signal source, to verify the location in the background image that is currently being produced by the image signal source of the image. background, and generate the OSD image representative signal corresponding to the OSD image representative data in the recovered block when the location that is currently being produced by the background image signal source is the location in the background image in which the OSD image will be displayed.

The system of claim 1, further characterized by a control processor (60), coupled to the OSD memory, for generating and storing the sequential plurality of blocks (52) in the OSD memory (50).

The system of claim 3, wherein: the background image representative signal includes repetitive vertical extinction ranges; characterized in that: the processor (60) comprises circuits for storing the blocks (52) in the OSD memory (50) at any time and, storing the respective pointers (PTR) for the next block in each of the sequential plurality of blocks (52) during the vertical extinction interval.

The system of claim 1, characterized in that the OSD generator (40) comprises: a storage of start pointer data (42), for storing a location in the OSD memory (50) of a first block in the plurality sequential block (52); the circuits for recovering the first block of the sequential plurality of blocks (52) by accessing the OSD memory (50) at the location indicated by the storage of start pointer data (42); circuits for generating the representative OSD image signal for the representative OSD image data in the recovered block; and circuits for extracting the pointer for the next block in the block sequential plurality from the recovered block.

The system of claim 5, characterized in that the OSD generator (40) further comprises circuits for sequentially: recovering the next block of the sequential plurality of blocks (52) by accessing the OSD memory (50) in the location indicated by the pointer for the next block (PTR) in the sequential plurality of blocks (52); circuits for generating the representative OSD image signal that responds to the representative OSD image data in the recovered block; and circuits for extracting the pointer for the next block (PTR) in the sequential plurality of blocks (52) from the recovered block.

The system of claim 5, further characterized by a control processor (60), coupled to the OSD generator (40) and the OSD memory (50), for generating and storing the sequential plurality of blocks (52) in the memory OSD (50), and the location of the first of the sequential plurality of blocks in the start pointer data storage (42)

8. The system of claim 5, characterized in that the data storage of the start pointer (42). ) is a location in the OSD memory (50)

9 The system of claim 5, characterized in that the data storage of the start pointer (42) is a recorder

10 The system of claim 1, characterized in that the source of Representative background image signal (10) comprises television signal receiving circuits

11. The system of claim 1, characterized in that the signal source representative of background image (10) comprises television signal reproduction circuits.

12. In an on-screen display system (OSD), comprising a source (10) of a representative background image signal and an OSD memory (50), a method for displaying a plurality of on-screen display images (32). ), comprising the steps of: storing a plurality of data blocks (52) in the OSD memory (50) respectively corresponding to the plurality of screen display images (32); recover the data from each block and generate a signal representative of the OSD image corresponding to the recovered data; combining the representative OSD image signal with the representative background image signal; and repeat the recovery and combination stages for each block; characterized in that: the storage step forms a sequence of memory blocks (52) storing within each block a pointer (PTR) for the next block in the sequence (52); And the repetition step repeats the recovery and sequencing steps sequentially for each block in the sequence of memory blocks (52). The system of claim 12, characterized in that: the repetition step comprises the step of recovering the pointer (PTR) for the next block in the sequence (52); and the recovery step comprises the step of recovering the block (52) from the location in the OSD memory (50) signaled by the recovered pointer (PTR) for the next block in the sequence (52). The system of claim 12, wherein the background image representative signal includes repetitive vertical extinction ranges and, the step of forming a sequence of memory blocks (52) comprises, prior to the step of storing the pointer (PTR), the stage of waiting until the vertical extinction interval.