MXPA97008609A - Demodulator and a method of demodulation in a receiver - Google Patents

Abstract

A demodulator for a digital packet data receiver is provided in predetermined time slots within fixed length time frames. The demodulator comprises at least one data processor and is operative to receive the data packets that each include synchronization data. The demodulator includes a temporary memory for storing data from a received data packet, processing means for reading at least part of the synchronization data both in the order in which the synchronization data was received and in the reverse order and means of synchronization. formation to form the or each data processor dependent on the synchronization data

Description

DEMODULATOR AND A METHOD OF DEMODULATION IN A TDM RECEIVER DESCRIPTION OF THE INVENTION The present invention relates to a demodulator for a digital data receiver in packets sent in predetermined time segments within fixed length time frames. The data packets in TDM / TDMA communication networks include a sequence of predetermined symbols (sync), which is designed to be used by the receiver for control and carrier synchronization (phase, frequency). For TDM / TDMA networks subject to significant multipath interference, the synchronization sequence may also be used for what is known in the art as compensator formation, see for example, Cellular Radio Systems, DM Balston and RCV Macario Editors, Artech House Inc. 1993, pages 167-168. Training is the procedure for iteratively adapting parameters of a data processor dependent on a sequence of predetermined data such as initial parameter values that converge towards more accurate values. The parameters are used in data processing. In the specific case of a compensator formation, the purpose is to adjust adaptively the compensating filter coefficients, so that they converge to values, which generate a frequency or time domain response, which compensates for the effect of multiple path interference. However, the training can also be applied to other data processors such as those to carry phase recovery, control recovery of TDM / TDMA segments, and / or automatic gain control. In conventional receivers, the demodulation ts with data in the received synchronization sequence and then proceeds sequentially (symbol by symbol) through the message data portion of the packet. This ensures that the data processors, which form the demodulator can be formed before the retrieval of the message content, thus minimizing the likelihood of message symbol decision errors. The length of the synchronization sequence has a relation to the operation of the demodulator and the complexity of the compensating methods applied. Short sequences involve rapid formation, which usually means that highly complex adaptation methods (such as recursive least squares, RLS) have to be used, rather than simple adaptation methods such as Minimum Squares (LMS). A detailed cover of LMS, RLS and adaptive techniques is generally given in the book "Adaptive Filter Theory" by Simon Haykin, Prentice Hall Publishers, 1991, 2a. Edition. Long sequences provide more time for training, allowing more options for implementation of the compensator, but reduce the proportion of the packet that can be distributed to the message data. The present invention is defined in the claims to which reference must now be made. Preferred aspects are presented in the dependent claims. The present invention preferably provides a demodulator for use in a TDM / TDMA communication network, the demodulator comprises at least one data processor and is operative to receive data packets, each including synchronization data, the demodulator includes means of temporary memory for storing data of a received data packet, processing means for reading at least part of the synchronization data both in the order in which the synchronization data was received and in the reverse order, and training means for forming the or each data processor dependent on the synchronization data. The synchronization data, which is expected by the demodulator, is processed by the training means, so that the demodulator can accurately process the message data. The data processors can be for adaptive filtering, carrier phase recovery, TDM / TMDA time segment control recovery, or automatic gain control. The present invention allows a larger number of training iterations than is available from an individual step of the synchronization sequence that leads to more accurate values for parameters that will be used in message data processing and, therefore, improved demodulator operation. Consequently, simple adaptation methods, such as least squares (LMS), can be used without the need for a long training sequence. The synchronization data can be processed so that the last received part of the data is read first and in the received order, then substantially all the synchronization data is read in reverse order. Alternatively, the first received part can be read in reverse order followed by substantially all the synchronization data in the received order. In addition, the forward / backward processing of synchronization data can be taken to provide more training iterations and, thus, longer for convergence. This aspect is particularly advantageous when the received signal is affected by the additive noise, which is not correlated with the synchronization sequence. The present invention also relates to a method of data packet demodulation, including synchronization data for use in a TDM / TDMA communication network, the method includes storing data from a received data packet and processing at least part of the synchronization data both in the order in which the synchronization data was received and in the reverse order. The synchronization data preferably they are used to form at least one data processor. A preferred embodiment of the present invention will now be described by way of example and with reference to the accompanying drawings, in which: Figure 1 is a schematic diagram illustrating the system including a base station (Base Termination Equipment-BTE ) and a subscriber unit (Network Termination Team-NTE); Figure 2 is a diagram illustrating a frame and control structure for a double bond; Figure 3 is a schematic diagram showing different types of data packets transmitted from a base station to a subscriber unit (i.e., downlink); Figure 4 is a functional block diagram illustrating the demodulator symbol processor in the subscriber unit; Figure 5 illustrates the multi-step formation method used; Figure 6 illustrates a compensator output quantization according to a shift key modulation scheme of the Phase Differential Phase.

The Basic System As shown in Figure 1, the preferred system is part of a telephone system, in which the local exchange wire to the subscriber has been replaced by a complete double radio link between a fixed base station (BTE) and the fixed subscriber unit (NTE). The preferred system includes the double radio link (Air Interface), and transmitters and receivers to implement the necessary protocol. There are similarities between the preferred system and cellular mobile telephone systems, such as GMS, which are known in the art. This system uses a protocol based on a layered model, in particular the following layers: PHY (Physical), MAC (Medium Access Control), DLC (Data Link Control), NWK (Network). One difference compared to GSM is that, in the preferred system, the subscriber units are in fixed locations and there is no need for loose layouts or other aspects in relation to mobility. This means, for example, in the preferred system that directional antennas and network electricity can be used. Each base station in the preferred system provides six double radio links at 12 frequencies chosen from the total frequency distribution, in order to minimize interference between nearby base stations. The frame structure and time control for a double link is illustrated in Figure 2. Each double radio link comprises an uplink from a subscriber unit and, at a frequency offset, a downlink from the base station to the subscriber unit. The downlinks are TDM, and the links Ascending are TDMA. The modulation for all links is p / 4 - DQPSK, and the basic frame structure for all links is ten segments per frame of 2560 bits, that is, 256 bits per segment. The bit rate is 512 kbps. Downlinks are continuously transmitted and incorporate a broadcast channel for essential system information. When there is no user information to be transmitted, downlink transmissions continue to use the basic frame and segment structure and contain an adequate fill pattern. For both uplink and downlink transmissions, there are two types of segments: the normal segments, which are used after a call is established, and the pilot segments used during the establishment of a call.

Each normal downlink segment comprises 24 bits of synchronization information followed by 24 bits designated in the S field, which includes an 8-bit header followed by 160 bits designated as the D-field. This is followed by 24 bits of Front Correction of Errors and an 8-bit terminal, followed by 12 bits of the broadcast channel. The broadcast channel consists of segments in each of the segments of a frame, which together form the common downlink signaling channel, which is transmitted by the base station, and contains control messages containing link information such as segment lists, multiple frame and superframe information, offline messages, and other basic information to the operation of the system. During the establishment of a call, each downlink pilot segment contains frequency correction data and a training sequence for the initialization of the receiver, only with a short field S and information without the field D. The uplink segments contain two different types of data packages. The first type of packet, called a pilot packet, is used before establishing a connection, for example, for an ALOHA call request and to allow adaptive time alignment. The other type of data packet, called a normal packet, is used when a call has been established and is a larger data packet, due to the use of adaptive time alignment. Each normal uplink packet contains a 244-bit data packet, which is preceded and followed by a 4-bit duration ramp. The ramps and the remaining bits left from the 256-bit segment provide a security gap against the interference of nearby segments due to time control errors. Each subscriber unit adjusts the time control of its segment transmissions to compensate for the time it takes for the signals to reach the base station. Each normal uplink data packet comprises 24 bits of synchronization data followed by an S field and a D field of the same number of bits as in each normal downlink segment.

Each uplink pilot segment contains a pilot data packet, which has a length of 192 bits preceded and followed by 4-bit ramps defining a 60-bit extended security gap. This larger security gap is necessary since there is no available time control information and without it, propagation delays could cause interference from surrounding segments. The pilot packet comprises 64 bits of synchronization, followed by 104 bits of field S, which starts with an 8-bit header with a 16-bit Cyclic Redundancy Checker, 2 reserved bits, 14 bits of FEC, and 8 end bits . There is no field D. The S fields in the aforementioned data packets can be used for two types of signaling. The first type is MAC (MS) signaling and is used for signaling between the MAC layers of the base station and the MAC layer of a subscriber unit, so time control is important. The second type is called associated signaling, which can be slow or fast and is used for signaling between the base station and the subscriber units in the DLC or NWK layers. Field D is the largest data field, and in the case of normal telephony it contains samples of digitized language, but it also contains data samples without language. Subscriber unit authentication using a challenge response protocol is provided in the preferred system. General cryptography is provided by combining the language or data with an unpredictable sequence of encrypted bits produced by a key current generator, which is synchronized to the transmitted super frame number. In addition, the transmitted signal is encoded to remove components from.

Subscriber Unit Demodulator The subscriber unit demodulator is related to the physical reception of data transmitted in the base-to-subscriber downlink direction. Dispersion due to multipath propagation did not vary significantly from frame to frame. This allows the filter coefficients determined in the compensation of a packet to be applied to compensate the corresponding packet in the next TDMA frame, as discussed below. Figure 3 shows two of the three types of downlink packets. From the demodulation perspective, the third type of package (Synchronism Package) is equal to the Pilot Pack shown, except that the DOWN-P-DATA field is replaced by a fixed fill pattern. Pilot packets occupy segments that do not carry traffic and specifically intend to be used for synchronization of time control of the subscriber unit and formation of compensator as part of the downlink connection establishment. Voice and data traffic is carried by the Package Normal, which provides a higher effective bandwidth by distributing less of the packet to the synchronization data; based on the fact that the formation of segment compensator by segment is not required.

Symbol Processor The following functions were taken by a sub-section of the demodulator of the subscriber unit known as the symbol processor: Synchronization Correlation (recovery of segment time control, digital gain control and initial phase recovery); Channel compensation; Carrier phase tracking; Sectioning (symbol decisions). The recovery of symbol time control, channel filtering and analog gain control are handled by other components of the subscriber unit. In general terms, the symbol processor operates as a basic coherent receiver (without compensation); a linear compensator; or a decision feedback compensator (DFE). Any of these is the best for any particular subscriber unit and depends on the characteristics of the RF propagation path. The coherent receiver is probably to work better, where the effects of the multiple trajectory do not are important, the linear compensator will offer an operating benefit where the multipath propagation is present but not severe and DFE has the potential to operate through severely dispersed channels.

Symbol Processing The functions performed by the symbol processor are shown in Figure 4, which is a signal flow diagram where the double-edge arrows denote trajectories for complex data. The output of the radio frequency (RF) section (not shown) of the subscriber unit receiver is digitized and presented to the symbol processor as a sequence of complex samples. These samples are regulated to allow processing without real time. The demodulated bit sequence (the output of the symbol processor), which may be a normal or pilot packet or a broadcast data fragment depending on the mode of operation, is passed to a separate circuit block and to a protocol processing of bit level. With the exception of correlator 2, which operates at the speed of the output sample, all processing is performed iteratively symbol by symbol. The time control is arranged so that the segment synchronization sequence received from the captured packet falls within a predetermined region of the temporary input memory used by the correlator 2. The complex correlation with a stored representation of the expected synchronization sequence then produces estimates of instantaneous carrier phase and signal level, which are subsequently used to classify and align in phase (ie, rotate) the entire group of entry samples. The classification is performed by the operation of the Automatic Gain Control (AGC) 1 block and the rotation through the rotation block 3. This phase recovery technique establishes the average path of the carrier phase through the sequence of if synchronization and, consequently, symbol-by-symbol processing starts at this point. The phase samples and corrected for gain (starting with the closest to half of the synchronization) are applied to the main demodulation loop, which performs: Symbol sectioning (absolute phase decoding); Carrier tracking (phase locked loop PLL); Compensation. The compensator is implemented in four main sections: a feed filter 4 a feedback filter 6 a compensator 8 and a filter adaptation mechanism. The two filter sections, each consisting of a line of complex derivative delay (that is, a Finite Impulse response filter) with variable derivation loads (ie, coefficients). The feed feed filter 4, which has at least one element / delay coefficient per symbol period, takes the input data from the AGC 1 block, rolls the samples held in its derivative delay line with the group of real coefficient and presents its output to the rotator 10 of the closed phase loop (PLL) 2. Likewise, the feedback filter 4, which only has one element / delay coefficient per symbol period, winds the constellation decisions of the compensator 8 with a group of additional coefficient. The combined output of feed and feedback feed filters, 4.6, constitutes the output of the compensator and this particular configuration of the filter sections is generally referred to as a decision feedback compensator (DFE). During operation, the compensator generates an output sample (compensated) per symbol period, which is fed to the compensator 8. The function of the compensator 8 is then to compare the output with the group of "ideal" constellation points that characterize the modulation scheme to select the constellation point, which is closest to the Euclidean sense. This procedure is represented by the modulation scheme of p / 4-DQPSK in Figure 6, which shows an output sample of compensator X being selected as having a closest constellation point Y 'of the possible Y constellation points. The selected constellation point Y 'forms the decision of the compensator 8 for the real reception symbol and, as such, the next input sample for the feedback filter 4. Successive decisions of the compensator 8 are also fed to the decoding circuit, where they are processed to retrieve the bit streams transmitted. The difference between the output X of the compensator and the selected constellation point Y represents the decision error Z for the real symbol, and this error Z is used by the coefficient adaptation mechanism to bring the error Z towards zero over time. The compensator is said to have converged when the coefficients in the feed feed and feedback filters 4, 6 have reached values, which suitably mitigate the effects of intersymbol interference. The compensator coefficients are initialized with constants (zeros, except for the main 'derivation', which is fixed to the unit) before processing the pilot packet (the extended ETS training sequence is used to initially form the compensator). Then, the final coefficient values in a segment are used as the starting values in the corresponding segment of the following frame. The method of Coefficient formation between segments is described in more detail later. The outputs of the two compensator filters 4, 6, are combined on the quantizer side of the phase 10 rotator, which is activated by a locked loop of phase directed by decision (PLL) 2. The quantifier produces an error term of phase, from the vector difference between the output of the phase rotator and the nearest candidate constellation point (in the Euclidean sense), a symbol error vector Z is suitably produced for the update of the compensator coefficient. The phase error term is passed to the bearer tracking algorithm, which modifies the actual reference phase estimate (a variable state within the bearer tracking algorithm) in the preparation of the next symbol iteration. A sine query table 13 is used to convert the actual phase estimate to an equivalent (complex) Cartesian representation compatible with the phase 10 spinner. At the beginning of each packet, or more specifically for the first synchronization data sample ( the average sample in the synchronization sequence), the phase reference is set to zero (degrees), since the phase recovery is performed through correlator 2, as described above. Two representations of symbol error are required: the update of the error not processed for the feedback, and an error vector 'broken', which re-introduces the deviation of phase removed by the phase locked loop, to update the feed feed. The desrotation by the descrambler 14 is necessary to re-establish the correlation relationship between the decision error and the input samples in the feed feed filter. The coefficients are adjusted using the so-called Stochastic Gradient LMS algorithm, although any algorithm can be used directly. The adaptation properties of the carrier tracking phase locked loop 12 and the compensator are chosen to ensure that carrier phase variations, during the packet (including frequency deviation) are removed by the actions of the phase 12 latched loop. , leaving the compensator to compensate exclusively the multi-path channel variations. Upon completion of the segment demodulation, the compensator coefficients are stored for use in the corresponding TDMA segment of the same frame.

Training Normally, the compensator coefficients are initialized without prior knowledge of the channel impulse response. Typically, this involves setting the main derivation to the unit and all other coefficients to zero, in order to provide a full-pass response to the output signals. In the early stages of the packet demodulation, when the compensator is I Attempting to "learn" the "reverse channel", that is, the filter coefficients needed to remove the effects of multipath propagation, constellation decision errors are reduced, and severe cases, convergence are avoided. To ensure that this does not happen, the compensator is "formed" of the known packet sequences (segment synchronization, frame synchronization and ETS, depending on the type of packet) before activating data demodulation (unknown). During the training, the phase compensator 8 is derived and, after synchronization, the compensator coefficients and the adaptation of the phase locked loop (PLL) 12 are based on the Z error measured between the output samples of the corresponding compensator and the corresponding samples of the known "formation sequence". Symbol-by-symbol demodulation starts at the middle of the synchronization sequence. Multiple reverse-advance steps are made through the synchronization sequence, which has the effect of effectively extending the known symbol sequence, first, providing access to half of another unused way of synchronization, secondly , simply by allowing more iterations to occur. The effect is similar to increase the coefficient adaptation constants for the compensator and the locked phase loop, but without the associated increase in residual error after convergence. Observe that the final operation is governed by the length of the synchronization and not by the total number of training iterations performed. Figure 5 illustrates the multi-step technique as it applies to the formation of the compensator in Normal and Pilot packages. The same procedure is applicable in a diffusion mode, although the direction of movement through the data is reversed. In Figure 5, the arrows represent the power in the compensator filter coefficients, which are being adapted. No particular importance should be attached to the magnitudes shown, except that the largest arrow is the main derivation and as such the demodulator / time reference of the compensator. The arrow that is furthest to the left represents the relative position of the feedback derivation in DFE of 1 -derivation. As shown, demodulation starts in the middle of the synchronization sequence (in sample S7) and proceeds chronologically through the second (last) half until the main derivation is aligned with the last sample of the synchronization symbol ( S12). The demodulator then reverses the processing order so that the time reference of the compensator moves back through the input data (equal) until the derivation is aligned with the earliest synchronization sample (SO). Here, the order of processing is sometimes reversed and the compensator can be formed through the entire sequence of training in chronological order before running towards the data part (unknown) (DO) of the packet. The forward / backward processing of the received and synchronized samples is achieved through linear storage time memories (not shown) and sequential address generators (not shown). In the preferred embodiment, each address generator counts the access samples in an order that corresponds to the one in which they were received and counts backwards to affect the investment of time. A slight complication of the processing of the samples arises in reverse chronological order, since it implies the inversion of frequency of any deviation of prevalent carrier. Accordingly, each time the direction of movement is reversed (in the first and the last synchronization sample), the carrier tracking loop inverts the polarity of an internal state variable, which represents an instantaneous frequency deviation .

In the preferred demodulator, the training halts at the synchronization data, at which point, the quantizer is retrained and the demodulator advances in a decision-driven mode, in which the constellation decisions are completely based on the quantizer input, not making use of the predetermined data sequences. The first 12 bits that are demodulated in a packet are, therefore, the last 12 bits of the synchronization for normal and pilot packets and the first 12 bits of synchronization (in reverse time order) in the broadcast mode. A protocol processing circuit Downstream compares the demodulated synchronization segment with the stored reference in order to detect synchronization errors. This information is preferably used to protect the compensator coefficients from corrupted data packets or to control speech path silence functions. Later on, we explain how training is applied in practice to the various types of data packets received.

Formation to a Pilot Physical Package The demodulation is initiated when the control processor module (CPM) of the subscriber unit selects the demodulator Call Processing mode configured for the pilot packet reception. The compensation coefficients are initialized using data consistent with the selected demodulator architecture. The procedure it is as follows: 1) Scan and capture the required pilot packet to the segment buffer (in the preferred scrambler synchronization processing and the packet capture are overlapped to minimize the group delay). 2) Correlate for the Segment Synchronization (Frame Synchronization in segment 0) on the synchronization window. Use the output of the peak correlator to classify and rotate the synchronization region of the segment's temporary memory. Reset the reference of phase from PLL to 0o. 3) Form the compensator and PLL by advancing / retracting steps through the synchronization, starting and ending in the middle of the sequence. PLL controls the effects of unwanted carrier modulation, such as noise and frequency deviation. Compensator and PLL updates are made with relatively large adaptation constants to obtain fast acquisition. 4) Demodulate the last half of the Synchronization. 5) Correlate the data of the Extended Training Sequence (ETS) on a Delayed Synchronization window. Use the output of the peak correlator to determine and spin the ETS and the DOWN-P-DATA regions of the segment buffer. Reset the PLL phase reference to 0o. 6) Form the compensator and PLL 12 by making advance / rewind passes through the ETS starting at the middle of the sequence and ending just before DOWN-P-DATA. 7) Demodulate the DOWN-P-DATA field, updating the compensator and PLL 12 of the constellation decisions. For these updates, the small adaptation constants minimize residual errors and, therefore, the Symbol Error Regime (SER). Note that the data between the synchronization and the DOWN-P-DATA field are not demodulated. 8) Store the compensator coefficients for the next Pilot or Normal Package in the corresponding TDMA segment of the following frame.

Formation to a Normal Package An interruption to the demodulation of the Normal Package could normally occur once the compensator has been successfully formed from the pilot packages. The switch can be activated when the integrated square vector error (outside the phase compensator) falls below a threshold or, alternatively, when error-free decoded packets are received through the protocol processing module (PPM) of the subscriber unit. In any case, packet processing involves the following: 1) Scan and capture the required normal packet to the segment buffer (in the preferred scrambler synchronization processing and the packet capture are overlapped to minimize the delay of group). 2) Correlate for segment synchronization (Frame synchronization in segment 0) over the synchronization window. Use the output of the peak correlator to determine and rotate the contents of the segment's temporary memory. Reset the PLL phase reference to 0o. 3) Form the compensator and PLL by advancing / retracting steps through the start and end of the synchronization in the middle of the sequence. 4) Demodulate the last half of the synchronization through the data field. 5) Store the compensator coefficients ready for the next packet in the corresponding TDMA segment of the next frame.

Formation to a Diffusion Package The general strategy applied to Diffusion package processing is identical to that used for Normal Bundles, except that Diffusion compensator coefficients are initialized by CPM before attempting to receive and reverse the order of time in which the received symbols were accessed. The procedure is as follows: 1) Capture the Diffusion fragment of segment N-1 and immediately adjacent synchronization of segment N. 2) Correlate the Segment Synchronization (Frame Synchronization is segment 0) on the synchronization window. Use the peak correlator output to determine and rotate the captured Diffusion and Synchronization samples. Reset the PLL phase reference to 0o. 3) Form the compensator and PLL by performing backward / forward steps through the initiation and completion of the Synchronization in the middle of the sequence. 4) Demodulate (in reverse time order) the first half of the N Synchronization followed by the Diffusion data field of the N-1 segment. 5) Store the compensator coefficients ready for the next fragment.

Claims (10)

1 .- A demodulator for a digital data receiver in packets sent in predetermined time segments within fixed length time frames, the demodulator comprises at least one data processor and is operative to receive data packets, each including synchronization data, the demodulator including temporary memory means for storing data from a received data packet, processing means for reading synchronization data from a received data packet stored in the temporary memory means, the processing means read at less part of the synchronization data in both the order in which the synchronization data was received and in the reverse order, and training means to form the or each data processor dependent on the synchronization data read, wherein the means processing operations to read the synchronization data, so that part of the synchronization data they are read in a first order and then at least substantially all the synchronization data is read in a second order and then at least part of the synchronization data is read again in the first order, the first order being one of order in which the data were received and the reverse order, and the second order being the other in the order in which the data was received and the reverse order.

2. A demodulator according to claim 1, in where each of at least one data processor is for adaptive filtering, carrier phase recovery, time-slice control recovery, or automatic gain control.

3. - A demodulator according to claim 2, wherein a data processor is an adaptive digital filter.

4. A demodulator according to any of the preceding claims, wherein a larger number of training iterations are taken by said processor means operating to read at least part of the synchronization data both in the order in which that the data was received as in the reverse order, that the one available from the individual reading through the synchronization data, in order to provide more accurate values for the parameters that will be used by said at least one data processor in the processing of more data.

5. A demodulator according to claim 4, wherein a simple iterative adaptation method is used to provide said more accurate values for said parameters.

6. A demodulator according to claim 5, wherein the simple iterative adaptation method is a minimum square method (LMS).

7 .- A demodulator according to any of the preceding claims, wherein the processing means operate to read the synchronization data, so that the last received part of the data is read first in the received order, then least substantially all the data from synchronization are read in reverse order.

8. A demodulator according to any of claims 1 to 7, wherein the processing means operate to read the synchronization data, so that the first received part of the synchronization data is read in reverse order followed by the least substantially all synchronization data in the received order.

9. A demodulator according to claim 7 or claim 8, wherein the processing means perform the forward and / or reverse reading of the synchronization data to provide more training iterations.

10. A demodulator according to any of the preceding claims, further comprising correlation means operating to perform a complex correlation between the received and expected synchronization data to determine the carrier phase in a predetermined symbol in each data packet for be used in subsequent processing. 1 1 - A receiver of digital data sent in predetermined time segments within fixed length time frames comprising a demodulator according to any of the preceding claims. 12. A receiver according to claim 1, which is a subscriber unit that operates to receive time division multiplexer (TDM) data signals. 13. A receiver according to claim 1 or the Claim 12, which is a subscriber unit that has a fixed site. 14. A receiver according to claim 11, 12 or 13, which comprises a transmitter that operates to transmit time division multiple access (TDMA) data signals to a base station. 15. A receiver according to any of claims 1 to 14, which operates to receive digital data sent by radio. 16. Means of communication comprising subscriber units, each operable to receive digital data messages comprising data packets in predetermined time segments within fixed length time frames of a base station, and the base station operates to receive digital data messages comprising data packets in predetermined time segments within fixed length time frames of the subscriber units, the subscriber units each comprising a receiver including a demodulator, the demodulators each comprising at least one data processor and operating to receive data packets, each including synchronization data, each demodulator includes temporary memory means for storing data from a received data packet, processing means for reading the synchronization data stored in the temporary memory means, the processing means operate to er at least part of the synchronization data both in the order in which the synchronization data was received and in the reverse order, and training means for the or each data processor dependent on the synchronization data read, wherein the processing means operate to read the synchronization data so that at least part of the synchronization data is read in a first order and then at least substantially all the synchronization data is read in a second order and then at least part of the synchronization data they are read again in the first order, the first order being one of the order in which the data was received and the reverse order, and the second order being the other order in which the data was received and the reverse order. 17.- A method of demodulation of data packets sent in predetermined time segments within fixed length time frames including synchronization data, the method includes storing data from a received data packet and reading at least part of the data synchronization in the order in which the data was received with in the reverse order, the synchronization data is used to form at least one data processor, wherein at least part of the synchronization data is read in a first order and then at least substantially all the synchronization data is read in a second order and then at least part of the synchronization data is read again in the first order, the first order being one of the order in which the data were received and the reverse order, and the second order being the other order in which the data was received and the reverse order.