MXPA00004838A - System and method for electronically identifying connections of a cross-connect system - Google Patents

System and method for electronically identifying connections of a cross-connect system

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Publication number
MXPA00004838A
MXPA00004838A MXPA/A/2000/004838A MXPA00004838A MXPA00004838A MX PA00004838 A MXPA00004838 A MX PA00004838A MX PA00004838 A MXPA00004838 A MX PA00004838A MX PA00004838 A MXPA00004838 A MX PA00004838A
Authority
MX
Mexico
Prior art keywords
circuits
cross
circuit
connection
connect
Prior art date
Application number
MXPA/A/2000/004838A
Other languages
Spanish (es)
Inventor
Robert J Koziy
Gregory C Pfeiffer
Leah E Danzinger
John C Keller
Eric Karwing Sit
Original Assignee
Adc Telecommunications Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Adc Telecommunications Inc filed Critical Adc Telecommunications Inc
Publication of MXPA00004838A publication Critical patent/MXPA00004838A/en

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Abstract

A system and method for electronically identifying connections established through a cross-connect system provides for the identification of all hard-wired and temporary patch connections, and any modifications made to existing cross-connect circuit connections. Connection identification and status information is acquired in near real-time and stored in a database which is accessible by a user through a graphical user interface (GUI). The TRACE or lamp wires which connect respective pairs of cross-connect circuits are utilized in an unconventional manner so as to form a scanning bus. The information signal paths established through the cross-connect circuits remain undisturbed. A scanning signal is communicated between each pair of cross-connected circuits over the TRACE conductor. In the event a patch cord is used to temporarily redirect a signal connection, the scanning signal is transmitted over the shield or sleeve conductor of the patch cord. The scanning signal provides identification and other information concerning the transmitting circuit. A circuit receiving the scanning signal communicates its identification information and that of the transmitting circuit derived from the scanning signal to a central computer. The identification information acquired by the central computer from all receiving cross-connect circuits provides identification and status information for all circuits within the cross-connect system. In one embodiment, all circuits of a cross-connect system are scanned and identification information acquired in the time required to transmit a single cross-connect circuit ID bit string, irrespective of the total number of cross-connect circuits included within the cross-connect system.

Description

SYSTEM AND METHOD FOR ELECTRONICALLY IDENTIFYING CONNECTIONS OF A CROSS CONNECTION SYSTEM BACKGROUND OF THE INVENTION The present invention relates generally to communication systems, and more particularly, to a system and method for electronically identifying all connections established through a cross-connect system. Cross-connection systems are widely used in the telecommunications industry to make signal line connections between different types of communications equipment managed by different information service providers. Within a central office or exchange environment, for example, tens of thousands of lines of information signals must be connected from a first installation of communications equipment, with respective signal lines from a second installation of communications equipment, from a way that provides a high degree of connection reliability. For this purpose, industry-standard cross-connect systems normally use highly reliable passive connection devices, often referred to as cross-connect circuits, to effect the connections of the required signal lines. In a typical application, a pair of cross-connect circuits are used to connect a single signal line of a first equipment installation, with a single signal line of a second equipment installation. Up to now, the identification of the specific location and determination of the state of all cross-connected circuits within a central office, has required different degrees of manual intervention, such as manually tracking a hard cable connection or temporary patch in a effort to identify the location of cross-connection circuits that end at the opposite ends of each connection. It can easily be seen that manually acquiring connection information and updating this information on a regular basis represents a measurable and costly challenge. It would seem that the introduction of active electronic components within the information signal paths would provide the opportunity to implement an effective and cost-effective means to acquire the connection information for a cross-connect system. A number of proposed solutions of the prior art require the introduction of active electronics in the information signal paths, in order to carry out the transmissions between the cross-connected circuits. Different timeslots and frequency multiplexing schemes have been proposed that require the sharing of information signal paths, in terms of transmission time or frequency bandwidth, which necessarily require the implementation of a detection and resolution scheme. collisions, in order to reduce the possibility of altering the transmission of information signals on the connections. The introduction of active components in the circuits of information signal circuits, however, has proven to systematically reduce the overall reliability of certain cross-connection systems to unacceptable levels. The possibility of alteration of the information signal, and the possible malfunction or failure of the active electronics within the path of conductivity of the information signal, has made most, if not all, of the system manufacturers of cross connections, use only passive cross-connect components within the information signal path. Although passive connection devices provide a required level of reliability, these passive devices significantly complicate the effort to develop a fully automatic electronic implementation to identify the location and status of all cross-connected circuits and the connections established through a central office. The present invention provides this implementation. COMPENDIUM OF THE INVENTION The present invention relates to a system and method for electronically identifying the established connections through a system of cross connections. The present invention provides identification of all hard cable and temporary patch connections, and any modifications made to the connections of existing cross-connection circuits. The connection identification and the status information are acquired in an almost real time, and are stored in a database that is accessible by a user through a graphical user interface (GUI). The RASTREO or lamp wires, which are connected between the respective pairs of the cross-connect circuits according to a standard industrial practice, are used in an unconventional manner, to form a scanning busbar. The information signal paths established through the cross-connect circuits remain unaltered. A scan signal is communicated between each pair of circuits connected crosswise on the TRACKING conductor. In the event that a patch cable is used to temporarily redirect a signal connection, the scan signal is transmitted over the protector or jacket cable of the patch cable, thereby incorporating the patch cable shield as part of the patch cable. of the global scan busbar. The scan signal provides identification and other information with respect to the transmitter circuit.
A circuit that receives the scanning signal communicates its identification information and that of the transmitting circuit, derived from the scanning signal, to a central computer. The identification information acquired by the central computer from all the cross-connection receiver circuits, provides identification and status information for all circuits within the cross-connection system. In one embodiment, all circuits in a cross-connect system are scanned, and identification information is acquired in the time required to transmit a single string of identification bits of cross-connect circuits, regardless of the total number of circuits Cross connection included within the cross connection system. Different types of information are maintained with respect to each connection established within a system of cross connections in a database, and are updated in an almost real time, to reflect the current state of all circuit connections. A graphical user interface cooperates with the database, to provide a user with the ability to access the connection records of interest, to visually display simulated illustrations of the selected connections, and to generate a variety of reports derived from the Connection information maintained in the database. The graphical user interface can also be used to guide a technician to specific circuit locations, to perform repairs, establish a new connection, or redirect an existing connection, through the use of a patch cable. You can create a "pending patch" file that indicates different connections or disconnections that will be made by a technician to accomplish a particular objective. An outstanding patch file usually contains information that identifies the specific sequence in which the installation or removal of the patch cable is to be performed. When running, the pending patch file can control multi-color TRACKING LEDs of the specified circuits, as a means to visually direct the work of a technician when cross connections are established and broken. You can also create a pending patch file to provide information regarding the contingent or backup connections that can be established in the event of a network exhaustion. This pending patch file can identify important circuits that require immediate restoration during temporary or prolonged exhaustion. After the submission of a real exhaustion of the system, an appropriate pending patch file can be selected and executed to implement an efficient and coordinated patching procedure to restore the key circuits.
The above compendium of the present invention is not intended to describe each embodiment or each implementation of the present invention. The advantages and advantages, together with a more complete understanding of the invention, will become clearer and will be appreciated with reference to the following detailed description and the claims taken in conjunction with the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is an illustration of a cross-connection device that is normally employed by an information service provider, to terminate, cross-connect, and access a number of communication lines. Figure 2 is an illustration of a cross-connection device that is normally used when cross-referencing a variety of digital communications equipment. Figure 3 is an illustration of an intelligent cross-connection system operating in accordance with the principles of the present invention. Figure 4 is a perspective view of a shelf of cross connections within the which are installed a number of cross-connection circuits and a shelf controller. Figure 5 illustrates a mode of a scan bus topology and a system architecture that is used to communicate the scan signal information according to a scanning methodology of the present invention. Figure 6 is an illustration of a pair of cross-connect circuits that communicate the information signal information between them over a standard multi-conductor connection, and that also communicate the information of the scanning signal on a tracking connection. Figure 7 is a front view illustration of the circuit shown in Figure 6, which includes a number of plugs, LEDs, and wrapped wire spikes. Figure 8 is a schematic illustration of a circuit mode shown in Figure 6. Figure 9 is an illustration of a standard bantam plug on which the information of the scan signal is communicated, by using the protective jacket conductor of the plug bantam. Figure 10 is an illustration of a cross-connection shelf that includes a shelf controller that communicates with a pair of connected cross-connect circuits, to perform a scanning procedure using the tracking connection in accordance with the principles of the present invention. Figure 11 is an illustration of the system level of a scanning apparatus, wherein a rack controller acquires the identification information of the cross-connect circuit, and communicates with a host computer to be stored in a cross-connect database . Figure 12 illustrates a mode of a shelf controller that communicates a scan signal through the protective jacket of a patch cable that connects a pair of connected cross-connect circuits, for the purpose of determining the identity of the connected circuits . Figure 13 is a block diagram of the system, illustrating the different components that constitute a mode of a shelf controller. Figures 14 and 15 illustrate, in flowchart form, different process steps associated with the control of Individual or multiple TRACK LEDs in accordance with one embodiment of a scanning methodology of the present invention. Figure 16A illustrates a mode of a rack controller circuit that includes a number of reception and transmission registers associated with each of a number of cross-connect circuits with which the rack controller communicates. Figure 16B illustrates in more detail different reception and transmission registers, and the corresponding receiving and transmitting devices, in addition to other components, which are incorporated into, and communicate with, the mode of the shelf controlling circuit shown in Figure 16A . Figure 16C illustrates a portion of the shelf controller generally shown in Figures 16A-16B incorporated into one or more ASICs. Figures 17 to 19 illustrate, in flowchart form, different process steps associated with a scanning methodology in accordance with a first embodiment of the invention. Figure 20 is an illustration of the transmit and receive registers, and a collision detection circuit associated with a pair of cross-connected circuits, which are used to facilitate the implementation of the scanning methodology illustrated in Figures 17 to 19. FIGS. 21A-21B illustrate state tables associated with the respective circuits A and B illustrated in FIG.
Figure 20, the tables illustrating the status of the transmit and receive registers, and the effectiveness of the collision detection during the implementation of the scanning methodology illustrated in Figures 17 to 19. Figure 22 is a schematic illustration of a modality of the collision detection circuit shown in Figure 20. Figures 23A-23C illustrate time diagrams associated with the operation of the collision detection circuit shown in Figure 22. Figures 24 and 25 illustrate, in the form of a flow chart , different steps of the process associated with a scanning methodology in accordance with a second embodiment of the present invention. Figure 26 illustrates different process steps associated with a scanning methodology in accordance with a third embodiment of the invention. Figures 27 and 28 respectively illustrate a lost connection and new connection monitoring procedure, in accordance with one embodiment of the present invention. Figures 29 to 26 illustrate different information screens that can be displayed to a user of the intelligent cross-connect system, through the use of a graphical user interface operating cooperatively with a cross-connect database. Although the invention is susceptible to different modifications and alternative forms, its specific ones have been shown by way of example in the drawings, and will be described in detail. However, it should be understood that the intention is not to limit the invention to the particular embodiments described. On the contrary, the intention is to cover all modifications, equivalents, and alternatives that fall within the spirit and scope of the invention, as defined in the appended claims DETAILED DESCRIPTION OF THE DIFFERENT MODALITIES In the following description of the illustrated modalities, reference is made to the accompanying drawings, which form a part of the present, and which show, by way of illustration, different modalities in which one can practice the invention. It should be understood that the embodiments may be used, and structural changes may be made, without departing from the scope of the present invention. Referring to the drawings, and in particular to Figure 1, a generalized illustration of a cross-connection device providing a site for terminating, cross-connecting, and accessing a number of transmission lines capable of communicating signals of different types is provided. . A number of cross-connection devices of the type shown in Figure 1, they are normally installed in equipment structures or bays, and are interconnected as part of a telephony network. The cross-connection bays serve as a hub for interconnecting different types of equipment, which can communicate information at data rates. By way of example, a digital trunk 36 includes a number of signal lines 38 associated with a first communication equipment installation, each of the signal lines 38 being terminated, or otherwise coupled, in a respective cross-connect circuit. 44 installed in a patch panel or shelf 40. A second digital trunk 46, operated by a second installation of communications equipment, includes a number of signal lines 48, which are terminated in the respective cross-connection circuits 54 mounted on a second patch board or shelf 50. The individual circuits 44 of the shelf 40 are normally "cross-connected" with the respective circuits 54 of the shelf 50, through the use of hard cable connections, or temporary patch connections, established between the same. As such, a digital signal transmitted through the signal line 38a of the digital trunk 36, for example, is cross-connected with the signal line 38a of the digital trunk 46 on the cross-connected circuits 44a and 54a, respectively mounted on the patch shelves 40 and 50. It is noted that the circuits 44a, 54a of the patch shelves 40, 50, are connected by means of a hard cable connection 56 in the illustration provided in Figure 1, but in an alternative manner. , can be established through the use of a temporary patch connection, such as the patch connection 58 that connects the circuits 44b and 54b. At a typical central office site, tens or hundreds of thousands of signal lines must be interconnected, identified, and managed appropriately, in order to provide an acceptable level of system integrity and reliability. The identification of the specific location of all the interconnected circuits within a central office is a problem of a long time that until now has only been solved in a partial way. A cross-connection tracking system and methodology in accordance with the principles of the present invention completely solves the complex problem of identifying all interconnected cross-connection circuits established through a central office, and further identifies whether these interconnections are established on a hard cable or temporary patch connection. Any modifications made to the existing circuit connections are detected in an almost real time, whether these modifications are established on hard cable or patch connections. In one modality, different types of information are maintained with respect to each connection established within the central office in a database that is updated in an almost real time, to reflect the current state of all connections. A graphical user interface cooperates with the database, usually under the control of the user, and provides a user with the ability to access the connection records of interest, to visually display simulated illustrations of the selected connections, and to generate a variety of reports derived from the connection information maintained in the database. The graphical user interface can also be used to guide a technician through a mass of connections, to specific locations on the circuit, which may require repair or redirection through the use of a patch cable. Figure 2 illustrates an exemplary configuration of a digital cross-connect system (DSX) of a type suitable for use in an intelligent cross-connection system of the present invention. The cross-connect system shown in Figure 2 is typically used as an interconnection point between the plant's external facilities and telecommunications equipment to accommodate high-speed digital connections that have data rates in the order of 1 Mbps to 50 Mbps It is important to note that a typical digital cross-connect system contains only passive connections that are extremely reliable, in such a way that there are no active electronics that interfere with the information signals that pass through the system of cross connections. Those skilled in the art will appreciate that the stringent reliability requirements established by the information service providers severely limit and normally preclude the use of active electronics within the path of the information signal circuit, which significantly increases the difficulty to determine in an effective and efficient way the identity of all established connections within a system of cross connections. The cross-connect system shown in Figure 2 provides a termination point for permanently connected equipment, and also accommodates a series of connection plugs, called bantam plugs in industry, by which patch cables can be used to redirect temporarily the connections. By having all the equipment and installations end up in a cross-connect system, a service provider can manually patch around trouble spots, or reconfigure the equipment and installations without interrupting the service. The particular mode shown in Figure 2 illustrates a DSXl system designed to terminate DSl (1,544 Mbps) circuits, and also accommodate other data rates, such as El (2,048 Mbps) or DS3 (44,736 Mbps) signals associated with DSX3 systems . In Figure 3, one embodiment of a cross-connect system operating in accordance with the principles of the present invention is illustrated. According to this embodiment, a central office 60 is normally organized in a hierarchical form, and includes a number of bays or frames 66, each of which houses several shelves 72 of cross-connect circuits 74. A number is removably installed specified of individual cross connection circuits 74 in each of the shelves 72. A shelf controller 76, also removably housed in each of the shelves 72, communicates with each of the cross connection circuits 74 installed inside the shelf 72 Figure 4 illustrates a mode of a shelf 72, within which a number of individual cross-connect circuits 74 are removably installed, and a shelf controller 76 is removably installed. A number of individual cross-connect circuits 74 may also be grouped. to form 73 packets of circuits 74, such as four circuits 74 grouped together to form a modular "quad" card 73. The shelf 72 includes a printed circuit board (PCB) in the backplane, which provides the communication of information and power signals between the circuits 74 and the controller 76, and provides connectivity to other circuits 74, shelf controllers 76, and system components of cross connections 60. Each of the rack controllers 76 communicates with a bay controller 64, which in turn communicates with a main computer 62, such as a computer at the central office. In one embodiment, the bay controller 64 cooperates with the main computer 62 to coordinate the activities of the shelf controllers 76 installed in one or more of the bays 66. For example, a bay 64 controller can service 32 bays 66 of the cross-connection equipment. In an alternative configuration, each rack controller 76 can communicate directly with the main computer 62. The main computer 62 can be used as a central information and control resource for a number of bay controllers 64 maintained in a central office 60. understands that the bays 66 of the cross-connection equipment that constitutes a central office may be located in a single location, such as a building, or may be distributed in a number of geographically separate locations. The connection information is acquired from the individual rack controllers 76, and communicates to the main computer 62, where it is stored in a cross-connect database 65. A user employs a graphical user interface (GUI) 63, to access the database 65. It is understood that the main computer 62 may constitute a single computer platform, or a distributed platform connected through a network or other communications infrastructure. The database 65 may constitute a single non-volatile memory device, or a distributed memory device. A cross-connection system operating in accordance with the principles of the present invention conveniently exploits the RASTREO wire connections as a communications conduit to implement different detection, identification, and connection monitoring functions. In the industry it is understood that a TRACK wire or lamp wire is used in a conventional DSX system, to connect the TRACK LEDs of each of the cross connected circuits, for the purposes of manually tracking a connection. The cross-connection system of the present invention utilizes SCREW wire and patch cable connections to effectively form scanning bus bars on which the scan signals are transmitted in accordance with a single scanning methodology. As will be discussed in more detail, this non-conventional use of the TRACK wire and patch wire connections within a cross-connect system, in combination with the scanning protocol described hereinafter, provides for the continuous acquisition and Almost real-time status of the connection status information, which is maintained and updated in a centralized cross-connection database. It is noted that the term "scanning busbar", as used within the context of the embodiments disclosed herein, refers to either or both of the RASTREO wire connections and the patch cable. In a general context, a scanning bus is intended to refer to any connection, whether electrical, optical, or otherwise, within a cross-connect system, other than a intended connection to be used exclusively to communicate information signals. In the embodiment shown in Figure 5, a scanning bus or network is illustrated, which is used to communicate the connection and other information between the cross-connection circuits, the rack controllers, and a host computer of the connection system smart crusades. In this configuration, the scanner bus includes a network connection 86, over which the shelf controllers 76 of a particular bay 66 or bays 66 communicate with one another. The network connection 86 may constitute an EIA-485 serial communication connection, which is understood to be a full duplex, four-conductor, multi-drop balanced signal array bus connection. For purposes of illustration, and not limitation, it is assumed that a central office of a telecommunications service provider includes 100 bays 66 of the cross-connection equipment. Each bay 66 includes thirteen racks 72, each rack accommodating 72 eighty four individual cross connection circuits 74. The rack controllers 76 installed on the respective racks 72 of each bay 66, communicate with a bay controller 64 and with an input main 62 on a private ethernet connection 92. As such, each bay controller 64 can be viewed as constituting a node of the central office scanning network. The central office or main computer 62 accumulates the connection information acquired by each of the rack controllers 76, to develop cross-connection records for the entire central office. Each of the bay controllers 64 cooperates with their respective shelf controllers 76, to determine all hard-wire and patch connections established in the central office, to detect changes to the different connections, and to update a cross-connect database 65 accessed by the main computer 62 on a near-time basis real, in such a way that any connection changes are automatically reflected in the continuously updated database. Through the use of a graphical user interface 63, a service provider can request and display cross-connection records 65 for any circuit within the system. A hard cable connection can be established between a pair of circuits housed within the same bay, such as circuits 3 and 2 of shelves 12 and 2, respectively, of bay 1, or between the circuits housed therein. bay and shelf. A hard cable connection can also be established between the circuits housed in different bays, such as between the circuit 3 of the shelf 1, bay 1, and the circuit 84 of the shelf 13, bay 99. In addition, cable connections can be established. Patch between pairs of circuits of a common bay or of different bays, such as between circuits 84 of shelf 1 for bays 1 and 2, respectively. It is noted that a bridge repeater can be employed within the configuration of the scan bus to perform scanning operations between the cross-connect circuits of the distantly located bays. In one embodiment, a bay controller 64 is incorporated as a single computer or PC motherboard by executing an appropriate communications protocol, to effect communication between the private ethernet 92 and the rack controllers 76. The ethernet protocol may be a protocol of simple network administration that complies with ASN.l (SNMP), which runs on top of TCP / IP. Data rates of between approximately 10 can be obtained Mbps and 100 Mbps in this configuration. A bay controller 64 communicates with a number of rack controllers 76, using an EIA busbar protocol 485, wherein the bay controller 64 operates as a single master that groups the rack controllers 76. The rack controllers 76 transmit information only when are grouped by the bay controller 64. In the additional discussion of this mode, each rack 72 is assigned a unique 48-bit identification number. During an initial system configuration phase, the bay controller 64 retrieves the 48 bit identification of all the shelves 72 connected thereto. The bay controller 64 then allocates to each shelf an 11-bit identification number, which will be used in the following communications. Arbitration over the EIA-485 connection is facilitated by operation in a full four-wire duplex mode; two to transmit, and two to receive. If there is more than one new device in a particular EIA-485 bus, as may occur in the initial energization, an arbitration scheme is used using the 48-bit shelf identification to resolve the collisions. It is noted that, in a mode of a shelf controller using a universal asynchronous receiver / transmitter (UART), the UART is oriented bytes, and in general it must perform the current byte transmission before reacting to a collision. When a collision occurs in an EIA-485 connection, each node initially uses the least significant bit of the shelf identification to resolve the collision. When a new device grouping event occurs, and bus bar inactivity has been verified, each node tries to respond to the new device group. If a collision occurs, the nodes stop transmitting. If the rack identification bit of a node involved in the collision is zero, this node responds again immediately. Then it points to the next most significant bit of the shelf identification for this node, to arbitrate subsequent collisions. Otherwise, the node waits for the next event of a new device group. Most, if not all, of the SNMP commands and the responses between the main computer 62, through which the cross-connection database 65 is accessed, and the bay 64 controllers, are questions and answers generic that conform to the format of the Management Information Base (MIB). The MIB is an industry standard data format that provides network management of a device. Within its specific structure of the device. The MIB data contains all the information about the bay controller 64, and all the associated shelf controllers 76 and the alarm collection shelves, as well as any future devices that are connected to it. A request to the bay controller 64 typically indicates the element of interest data of the MIB, and the response is generally the same message with appropriate values added. When an event occurs, bay 64 controller initiates an SNMP trap. Then the host computer 62 responds in an appropriate manner, such that the bay 64 controller is informed that the message was received. Referring now to Figures 6 and 7, a pair of connected cross connection circuits 102, 104 is illustrated in accordance with one embodiment of the present invention. In this configuration, each cross connection circuit 102, 104 is connected to a shelf or chassis 100. The connections of the permanent equipment are terminated at the rear of the shelf 100. The permanent connections established at the rear of the shelf 100 are effectively passed. through the cross connection circuits 102, 104 to the front of the circuits 102, 104. Each piece of equipment can be cross-connected with other equipment components, typically by installing a five-conductor bridge cable, with terminals extending from the front of the circuits 102, 104. The five conductor cable is a standard cable in the industry that is used by a variety of cross-connection equipment suppliers. The five conductors support a transmission and reception pair, plus an additional TRACKING conductor. In a DSX1 configuration, this five conductor cable constitutes a twisted pair cable that is "wire wrapped" in the appropriate terminal posts provided in the circuits 102, 104. In the case of a DSX3 system, the cross connections are established using two coaxial bridges to transmit and receive, together with a third bridge that connects the contacts of the RASTREO line. In a fiber-optic cross-connect system, a separate electrical conductor is typically used as the RASTREO driver. In an alternative way, the connection information in the form of optical signals can be communicated along a separate fiber optic TRACK connection. When used in a conventional manner, the RASTREO or "TL" connection provides a means for manually tracking the connection between cross-connected circuits, such as the circuits 102, 104 shown in Figure 6. By activating the TRACK in a circuit, such as circuit 102, through the use of a switch or plug operation, the TRACK line is grounded, which causes the TRACK LEDs 106 of the respective circuits 102, 104 to illuminate. The illumination of the RASTREO LEDs 106 of a pair of cross-connected circuits allows to manually track the circuits and identify the locations of the cross-connected circuits within the central office. Figure 7 is a front view illustration of the circuits 102, 104 shown in Figure 6, and illustrates a mode in which a single TRACK LED 106 is employed. The cross connect circuit incorporated in the schematic illustration of Figure 8 it includes two RASTREO LEDs 106, that is, a red LED and a green LED 106. The front panel of a cross-connect circuit may additionally include a seven-segment visual display, two digits, with incremental momentary pressure buttons for both digits, and a momentary pressure button to clean, all of which are controlled by the firmware. Different types of status information and instructions for a technician can be displayed through the use of the visual display of the circuit. It is noted that the firmware residing in a memory provided in a cross-connection circuit, in a shelf controller, or in a bay controller, can be installed and updated by implementing an appropriate firmware download procedure. It is well appreciated by those skilled in the art that the task of precisely identifying the location and status of all cross-connected circuits within a central office, and of updating connection logs on a regular basis, represents a significant challenge for the service provider. A telecommunications service provider, for example, can manage more than 100 bays of cross-connection equipment maintained in a single location, many of these facilities being established in different cities. As a further example, a single central office location that hosts 100 bays containing 13 shelves within which 48 cross-connect circuits are installed provides a total of 109,200 connections established at this single location. Maintaining accurate connection records for hundreds of thousands of connections has proven impractical, if not impossible, using the conventional manual tracking approaches. The cross-connection monitoring system of the present invention provides accurate and continuous electronic monitoring and an update of the connection registers for any number of connections. Figure 8 is a schematic representation of the bantam plugs of MONITOR, OUTPUT, and INPUT 108, 110, 112, and the auxiliary circuits shown in Figure 7. In Figure 9 a partial sample of a typical bantam plug 120 is illustrated, which connects to each of the opposite ends of a patch cable. The normal function of a patch cable, when used within a cross-connect system, is to temporarily redirect a circuit connection to a termination point different from that established by the circuit's hard wire connection. As can be seen in Figure 8, when a bantam pin 120 of a patch cable is inserted into the OUTPUT jack 110 or into the INPUT jack 112 of a cross-connect circuit 102, the circuit connection with the Hard cable connection, in such a way that a new conductivity path is established on the patch cable. The plug bantam 120 connected at the opposite end of the patch cable can then be inserted into an appropriate OUTPUT or INPUT jack 110, 112 of another cross-connect circuit 104, thereby establishing a new generally temporary cross-over connection through of the patch cable. A conventional bantam plug 120 used in the industry to establish patch connections typically includes three conductors that are identified in terms of telephony as TIP, RING, and SHIRT (ie, PROTECTOR). PUNTA and RING drivers are used to transmit information signals, while SHIRT or PROTECTOR is used as an interference protection mechanism (for example, ground protector). As can be seen in Figure 8, when a bantam 120 plug is inserted into the OUTPUT or INPUT 110, 112 jack, the respective INPUT OUTPUT signal will be redirected over the patch cable, and the connection to the TN / RN wire cross connection 122. It is noted that the signal contacts TL, TR, and RN 122 represent the hard wire connections (ie, wire wrapped), and the INPUT / OUTPUT R, T connections 124 represent the permanent rear connections. Referring now to Figures 10 to 12, an embodiment of different circuit elements that are used in an intelligent digital cross-connection system is illustrated, in order to identify in an electronic and automatic way and monitor all the connections established through the circuits. of the system of crossed connections on a continuous basis. In accordance with this embodiment, and as briefly discussed in the foregoing, the RASTREO wire conductor 133 is used in an unconventional manner, in which a scanning signal is communicated through the RASTREO 133 wire conductor in accordance with a unique cross-connection scanning methodology. In broad and general terms, a rack controller 136 generates a scan signal, which includes the location identification information associated with a cross-connect transmitter circuit 132, and transmits the scan signal through the wire conductor of RASTREO 133 of the transmitting circuit 132. The scanning signal communicated by the transmitting cross-connection circuit 132 is received by a cross-connection circuit receiver 134. Having received that scanning signal in the circuit 134, the rack controller 136 associated with the circuit receiver 134 reports the location identification information of the transmitting and receiving circuit to a host computer, such as the bay controller 64 or the main computer 62 shown in Figure 3. It is understood that the receiving circuit 134 can be located therein. shelf 130 that the transmitter circuit 132, on a different shelf 130 within the same bay, or on a shelf of a distantly located bay of that housing of the transmitting circuit 132. The shelf controller 136 dedicates an individual connection for each TRACK connection of the individual cross-connect circuits installed on a particular shelf 130. Each rack controller 136 transmits the location identification information of the circuit, usually by using a digital scan signal, through each of its TRACK wire connections, either in a particular sequence, or in parallel, depending on the particular scanning algorithm employed. By transmitting a location identification signal on a port, and receiving a location information signal on another port, the rack controllers 136 of a cross-connect system collectively identify the location of all circuits established through of the system of cross connections. Unused circuits are also identified. All rack controllers 136 in all the bays of the equipment proceed through this operation of general scanning, in order to identify all their respective connections. Each rack controller 136 will then report its connection information to a main computer 64 by means of a data connection.
With respect to the configuration of the circuit shown in Figure 12, and as briefly discussed in the foregoing, a patch cable 143 may be employed to temporarily redirect the information signals between the cross-connect circuits other than those connected through the use of a hard cable connection. When the bantam pin of a patch cable is detected in the INPUT or OUTPUT jack 112, 110, a scan signal produced by the ledge controller 136 is transmitted over the SHEAR or PROTECTOR wire of patch cable 143, to a newly selected receiver cross-selection circuit 134. The information identifying the location of the transmitting circuit 132 is encoded in the scanning signal, and is used in conjunction with the information identifying the selected receiving circuit 134, to identify the patch connection just established This information is communicated similarly to a central computer. By using the SHEAR or PROTECTOR conductor of the patch cable 143, a conduit is conveniently provided to communicate the information of the scan signal without requiring additional patch cable leads. It is understood that modifying the configuration of an industry-standard patch cable to include an additional conductor would result in higher costs and the potential to render obsolete hundreds of thousands of cross-connection patch cables that are currently used. . Because the transmission speed of the scan data is relatively low, there are no appreciable problems of interference with the use of the patch cable protector 143. A general block system block diagram is illustrated in FIG. a shelf controller 150. According to this embodiment, the shelf controller 150 includes a microcontroller 152 communicating with a memory 154 and different digital devices 158, 160, 162 on a data bus 164. The general function of the digital interface circuits 158, 160, 162 is to receive or transmit data from a large number of input / output sources, and when prompted, present this data to the data bus of the microcontroller 164. Then the microcontroller 152 stores all the connection and status information in the memory 154, and when requested, transmits this information on the serial data bus 168 to the main computer. The microcontroller 152 communicates with an auxiliary processor, such as a bay controller 64, through the serial data transceiver 156 circuits. A digital interface circuit 158, which is coupled with a number of detection lines of plug, receives the signals indicating the presence or absence of a plug bantam in any of the plug of the MONITOR 108, the plug of OUTPUT 110, or the plug of INPUT 112. A device of digital interface 162 communicates with a LED of 106, and controls the lighting, flash, color selection, and other operations of the TRACKING LED 106. Using the plug detection lines to detect the presence of a bantam plug in the MONITOR 108 socket, the controller shelf 150 can activate the RASTREO 106 LEDs for a pair of connected circuits, in order to simulate a "crawl", as would otherwise occur within a conventional cross-connect system . In general, the scan signal transmitted through a TRACK connection or a patch connection provides location identification and status information with respect to the transmitter cross connection circuit. In the following table 1, different types of information that can be encoded in a scanning signal according to an embodiment of the present invention are provided.
TABLE 1 In one embodiment, the identification of the shelf number and the cross connection circuit number are coded using 11 and 7 bits, respectively, regardless of whether the scan signal is transmitted over a TRACK wire connection or a patch connection. The Path Number field indicates the transmission path, either as the TRACE, Patch INPUT, or Patch OUT connection. It should be understood that the scan signal fields provided in Table 1 represent a non-exhaustive list of information variables that can be encoded in a scan signal. Other information may also be encoded other than, or in addition to, that included in Table 1, in the scan signal. Each of the shelf controllers maintains a local database of identification and status information with respect to the cross-connection circuits with which it communicates. The following Table 2 provides an example of different types of information that can be maintained and updated in the local database of a shelf controller. TABLE 2 The four bits of the LED provide the four LED states, including OFF for both red and green LEDs. The combination of these states provides the opportunity to use yellow or orange, depending on the selected current-limiting resistors. The LEDs can change the status every eighth of 1 second, allowing a variety of LED presentations to be implemented. As discussed above, the scanning signals that are received by a receiver cross-connect circuit are communicated to a host computer, and are preferably stored in a database containing the cross-connection information. An example set of database fields for this database is provided later in Table 3. In general, the cross-connect database provides the storage and access of a comprehensive set of information with respect to each One and all cross connections established through a central office. According to one modality, the database includes fields that correspond in general to those associated with the information provided in Tables 1 and 2 above, as well as other information of interest, such as the location of the central office, the name, the floor, and the location of a particular bay, the history of the connection, and the comments of the user or administrator, for example. TABLE 3 One of the different functions performed by the shelf controller 150 involves detecting a change in the condition of a patch cable, such as if patch cords have been installed on, or removed from, a particular plug of a connecting circuit. particular crusade. As best seen in Figure 8, the additional electrical contacts within each of the MONITOR, OUTPUT, and INPUT jacks 108, 110, 112, provide an indication to the shelf controller 150 with respect to the status of these plugs ( that is, peg bantam present or absent). All of the plug detection lines are connected via the backplane of a shelf chassis to the shelf controller 150. The microcontroller 152 periodically groups the state of each of the bantam plugs, stores the status information in the memory 154, and reports this information to the main computer when requested. In general, when the host computer issues a command instructing a selected shelf controller to activate the TRACK LED of a particular circuit, the shelf controller causes the appropriate circuit LED to light according to a previously established flash pattern. . It is noted that a flash pattern refers to an LED flash program that indicates different LED lighting parameters, such as continuous and / or flash durations, flash speed, the use of individual or multiple colors, and other operating parameters of the LED. The trace LED will normally remain lit until the shelf controller receives an instruction from the main computer to turn off the TRACK LED, or until a flash pattern timer expires. The host computer can also initiate a command by instructing a selected shelf controller to flash the TRACK LED on a particular circuit. The shelf controller can store the FLASH-ON and FLASH-OFF time information, and will normally cause a TRACK LED to continue flashing at a specified speed, until it is prompted to terminate the flash operation. A particular function that is implemented through the execution of the RASTREO and plug-in LED control detection procedures, as mentioned above, is the simulation of a standard "trace" operation in the industry. This operation usually involves placing a bantam plug on the MONITOR plug of a particular circuit to initiate tracking. In a standard digital cross-connection system, this would result in grounding the TRACK wire, thus making the TRACK LEDs on both ends of the circuit connection light. However, in accordance with the present invention, the insertion of the bantam plug into the MONITOR socket is detected by the shelf controller 150, which, in response, transmits a LED flash command over the scanning busbar . The LED flash command is decoded by the shelf controller associated with the associated receiver circuit, which causes the LED of the associated circuit to illuminate according to a selected flash pattern. Figures 14 and 15 show a more detailed description of different process steps associated with the control of the RASTREO LEDs during a tracking operation. The shelf controller initiates 200 a TRASTREO simulation procedure by selecting 202 from a first circuit installed inside the shelf. If 204 an LED flash command issued by the host computer has previously been transmitted, with respect to the selected circuit, the shelf controller detects this activity, and selects another cross-connection circuit on the shelf. If a LED flash command has not been issued, the monitor controller detects 212 the MONITOR plug of the selected circuit. If a plug is detected in the plug of the MONITOR, and if the flash pattern for the selected circuit is not currently active 206, the flash pattern function for the selected cross-connect circuit is started, and the flash pattern timer is activated. If the MONITOR plug is busy 212, and the flash pattern is already active 216, the TRACK LED 106 is set to 222 for the selected circuit in a continuous ON state if the flash pattern timer 220 has expired. After the flash pattern timer 220 has expired, the shelf controller selects 206 another cross-connection circuit of the shelf. If a flash command for the selected circuit is not active 204, and the MONITOR plug of the selected circuit is not busy 212, the flash pattern operation is stopped, and the shelf controller selects 206 another cross-connect circuit of the shelf . The RASTREO simulation procedure continues until all the cross-connection circuits of the rack 208, 210 have been monitored. Additional control steps of the RASTREO LED are illustrated in Figure 15. The shelf controller detects 230 the status of the MONITOR socket of all the circuits with which it communicates. This monitoring process continues until the moment when the FLASH command is received from the main computer. If the received command 238 from the host computer is not a CLEAN LED instruction, then the initial ledge controller 242 an LED flash procedure for the indicated cross-connect circuits, with the indicated lighting pattern. If active, the flash pattern is canceled 244 under this condition. If the flash command received 232 from the host computer is a CLEAR LED 238 instruction, and if the flash pattern function is in a continuous flash or understanding state 236, the LED flash is cleared, and the function is reset of the flash pattern for the indicated cross-connect circuit. If the location function is not in a flash or continuous ignition state 236, then the LED 234 goes off. It can be seen that the cooperative operation between the shelf controller and the host computer provides the opportunity to effect a whole range of control over the RASTREO LEDs for a variety of purposes. It is noted that one or more LEDs of a cross connection circuit can be controlled by the shelf controller, and that the LEDs can be monochromatic or of a multi-chromatic type. By way of example, the cooperation between the shelf controller and the host computer provides the ability to effectively guide a technician through different patch connection or disconnection operations. In one modality, a "pending patch" file is created, which indicates different connections or disconnections that are going to be made by a technician, to realize a particular objective. The pending patch file, when executed by the host computer, can control multiple color SCAN LEDs of specified circuits as a means to visually direct the work of a technician, when cross connections are established and broken. For example, a blinking green LED indication can identify circuits where a patch cable is to be inserted, while an indication of a blinking red LED can identify circuits where an existing patch cable is to be removed. A pending patch file usually contains information that identifies the specific sequence by which a technician will perform the installation or removal of a patch cable. Then the main computer passes to a technician through each change, a couple of circuits at a time. Because the main computer knows exactly when and where to insert or remove a patch cable, the involved LEDs may continue to blink until the technician makes an appropriate connection or disconnection for a particular circuit. As an additional example, a pending patch file can be created, which provides information regarding the contingent or backup connections that can be established in the event of a network exhaustion. In a large communications network with critical circuits, for example, a pending patch file can identify important circuits that require immediate restoration during temporary or prolonged exhaustion.
When a system exhaustion occurs within a typical head office, technicians typically use a trigger gun approach when trying to identify all connected circuits cross-affected by exhaustion, and the location of the temporary patches that must be made, in order to restore the important circuit connections. The creation of a pending patch file well in advance of a depletion situation provides an opportunity for the service provider to develop a well-considered strategy to deal with any number of potential depletion scenarios. Upon actual exhaustion of the system, an appropriate pending patch file can be selected, and executed to implement a coordinated and efficient patching procedure to restore key circuits. Then on-site technicians can proceed quickly through the system of cross-connections, guided by the process of sequencing LED patches in their effort to patch and disconnect specified connections from the circuit. It can be seen that the use of the pending patch files in this way saves precious time in restoring important circuits and other circuits impacted by an exhaustion, which would otherwise be wasted looking for the records and selecting the connection information necessary under stress conditions associated with greater exhaustion. Referring now to Figures 16A-27, different modalities of a scanning methodology and apparatus are illustrated, by which all established connections can be identified through a cross-connection system or a central office, and status information acquired and updated for all connections on a continuous basis. To facilitate an understanding of the different scanning approaches, reference is made to circuit 600 illustrated in Figure 16A. Circuit 600 is normally incorporated as part of the shelf controller, and can be incorporated into a microcontroller, an Application Specific Integrated Circuit (ASIC), or a Programmable Field Gateway (FPGA) Arrangement, for example. Circuit 600 includes a number of reception registers 602 and transmission registers 604 associated with each cross-connect circuit coupled to the shelf controller. In a rack configuration, where 84 cross-connect circuits are housed, for example, circuit 600 will include 84 sets of reception registers 608, and 84 sets of transmission registers 618, with one set of reception and transmission registers 608, 618 respectively associated with each of the 84 cross-connection circuits.
The particular configuration of the circuit 600 may be varied to accommodate a variety of processing, speed, synchronization, and ASIC / FPGA floor planning considerations (i.e., circuit deployment). By way of example, each set of reception and transmission registers 608, 618, respectively includes a TRACKER register 610, 620, a patch INPUT register 612, 622, and a patch OUTPUT register 614, 624. In the modality illustrated in Figure 16A, each of the TRACK, INPUT, and OUTPUT registers constitutes a first-in-first-out (FIFO) logger or stack, it being understood that other implementations of memory or buffer memory. In one embodiment, the TRACE FIFOs, Patch INPUT, and Patch OUTPUT 610, 612, 614 associated with the reception register 602, may each be coupled to a respective receiver circuit (not shown), and the TRASTREO FIFOs , Patch INPUT, and Patch OUTPUT 620, 622, 624 associated with the transmit register 604, may each be coupled with a respective transmitter circuit (not shown). In this configurationEach cross connection circuit is therefore provided with three transmitters and three receivers. As such, data can be transmitted from, and can be received by, the three FIFO sets of reception and transmission dedicated in a simultaneous or parallel manner. Figure 16B is generally illustrative of this particular embodiment. In an alternative embodiment, a single receiver can be multiplexed through the TRACK FIFOs, Patch INPUT, and Patch OUTPUT 610, 612, 614 associated with each cross-connect circuit, and a single transmitter can be multiplexed through the TRACK FIFOs, Patch INPUT, and Patch OUT 620, 622, 624. Another alternative configuration, by way of a further example, includes a single multiplexed transmitter, and three dedicated receivers. It is appreciated that the use of a multiplexed transmitter requires some form of sequential or selective circuit paths that switch between the associated transmission FIFOs. In accordance with a particular circuit mode 600, as illustrated in FIG. 16C, a single ASIC provides all the logic required to support 16 cross-connect circuits. The number of cross-connection circuits supported in a particular shelf configuration can be expanded simply by installing additional ASICs. Each subcircuit of an ASIC, such as Circuit # 1 or Circuit "N" shown in Figure 16A, includes three physical peaks respectively dedicated to the three circuit paths (i.e., TRACKING, Patch INPUT, Patch OUTPUT) ), Internally, the reception and transmission logic for each peak is linked to OR (ó) functionally.
For the purposes of increasing design flexibility and processing speed, the ASIC includes three transmitters and three receivers for each sub-circuit, in order to provide simultaneous data transmission and reception. The peaks of the ASIC coupled to each cross-connection circuit include the following: TRACKING Collector bar; Patch INPUT Bus Bar, Patch OUT Bus Collector; Busy MONITOR plug; BUSY INPUT jack; BUS OUTPUT Busy; Red LED, Green LED; and current circuit package peaks. It is noted that a Present Circuit Packet signal received at the Present Circuit Packet Peak indicates the presence of a particular cluster or packet of cross-connect circuits inside the rack. The ASIC also includes a number of standard peaks, such as the data bus, the address bus, CLK, and other peaks of control signals. A central processing unit (CPU) or a microcontroller of the shelf controller cooperates with the circuit 600 to coordinate the operation of the reception and transmission register 602, 604. The reception and transmission FIFOs, 602, 604 of a connection circuit Particular cross-links are used to store data pertaining to the connection established between the particular circuit and the circuit connected thereto, and to perform the different scanning procedures implemented in accordance with the principles of the present invention. According to a general scanning methodology, each cross-connection circuit transmits its unique identification information (ID) or its code to an associated circuit connected thereto. The associated circuit that receives the identification code of the transmitting circuit, stores this data, and when requested by the bay controller or by the main computer, transmits the identification code of the transmitting circuit and its own identification code to the main computer . Other connection status information can also be communicated between transmitter and receiver circuits, and can be transmitted to the host computer. It can be seen that only the receiver circuits need to transmit their respective connection information to the main computer, in order to obtain the identification of all the pairs of circuits connected cross-wise inside the system. It is important to note that the transmitting side generally does not know the state of the receiving side. Accordingly, a transmitting circuit will continue to transmit at regular intervals, thereby providing a live maintenance signal to the receiver associated circuit. Moreover, after acquiring an initial set of connection information from all the receiver circuits, only those receiver circuits containing new connection or disconnection information need to pass the information to the bay controller or the main computer. In one embodiment, as will be discussed in detail hereinafter, all circuit connections will be scanned and identified within the time needed to transmit a single string of identification bits of the cross-connect circuit, regardless of size of the system of cross connections. (That is, number of cross connection circuits). For example, assuming that a given scanning methodology employs a n-bit length identification code, the start / stop and material bits constitute m bits, and that the clock speed is given as CLK Hertz, then the total scan time required to identify all circuit connections is given by: (n + m) • (1 / CLK) In striking contrast to conventional schemes where the time required to identify all connections established within a cross-connect system is increased as a function of increasing the population of circuits, the time required to identify all cross-connected circuits using the scanning approach illustrated in Figures 17 to 23C is relatively short and constant (for example, 100 to 500 milliseconds), regardless of whether the system contains ten thousand, one hundred thousand , or even a million circuits connected crosswise. In the following discussion, reference will be made to a Transmission Table in relation to different procedures of a scanning operation. The circuit 600 illustrated in Figure 16A represents a conceptual embodiment of a Transmission Table, it being understood that another implementation in hardware and software can be used to facilitate the scanning medotology. Initially, the transmission Table is established, where the circuit identification and the patch status information is loaded for each of the circuits coupled to a respective shelf controller of the cross-connection system. The charging function, such as that illustrated in Figures 17 and 18, takes into account all hard wire connections between pairs of circuits, and in an important manner, all established patch connections using patch cords connected to the plugs of ENTRY / EXIT of the circuits. As such, all physical cross connections are identified, whether hard wire or patch connections. A typical load operation of Transmission Table is initiated upon receipt of 300 a transmission command issued from the main computer. After receiving the transmission command, each of the transmission TRACE FIFOs 620 of each cross-connection circuit within a shelf is loaded with a TRACK identification code (TRACK ID). The IDENTIFICATION OF TRACKING represents a code that uniquely identifies the RASTREO plug of a particular cross-connection circuit. In a similar manner, the patch INPUT and patch OUTPUT IDENTIFICATIONS represent codes that uniquely identify the patch INPUT and patch OUT jacks of a particular cross-connect circuit. The loading procedure illustrated in Figures 17 and 18 is implemented by each shelf controller for all bays of the cross-connection equipment in a contemporary parallel manner. In addition to loading the ID information In the respective transmission FIFOs, the rack controller 304 scans each circuit reception logger 602, to determine 306 if a circuit ID currently resides in the receive TRACK FIFO of the 610 circuit. If there is a circuit IDENTIFICATION valid stored in the receiving TRACK FIFO 610 for a particular circuit, IDENTIFICATION of the associated circuit has been previously received. As such, the identity of the cross-connected circuits is already known, and the scanning operation for this circuit connection need not be repeated 308. Although not required, it may be desirable to perform a re-scan operation for the particular circuit connection. If a circuit ID is currently not stored in the TRACKING FIFO of receiver 610 for a selected circuit, the shelf controller determines whether a patch cable has been inserted into the patch INPUT or patch OUT jacks. In particular, if a circuit ID in the Receive Patch INPUT FIFO 310 does not currently reside for the selected circuit, the shelf controller determines 312 if the Patch INPUT jack is busy, and if so, adds 314 Identification of Patch INPUT to the INPUT FIFO of transmission patch 622 of the Transmission Table for the selected circuit. If a valid circuit ID is currently residing in the receiving patch FIFO OF OUTPUT 614 for the selected circuit, the ID of the associated circuit has previously been received, and the scanning operation for this circuit connection need not be repeated, although it may It is desirable to re-scan the circuit connection. If not, the PATCH OUT socket is detected, and if it is occupied, the rack controller 320 the OUTPUT IDENTIFICATION of Patch to the FIFO of Transmission Patch OUTPUT 624 of the Transmission Table for the selected circuit.
All circuits coupled to the shelf controller are processed in a similar manner 322. After processing all the respective circuits associated with the shelf controller, 324 the scanning procedure generally illustrated in Figure 19 is initiated. The shelf controller reports 326 completion of scan procedure 324 to the main computer upon completion. It should be understood that the general principles of the scanning approach described herein may be implemented in a manner that does not require interaction with a Transmission Table of the type previously described, but that the description of that Transmission Table is provided to illustrate one of the different approaches to implement the present invention. Having completed the loading procedure of the Transmission Table illustrated in Figures 17 and 18, the scanning procedure illustrated in Figure 19 is initiated by all the shelf controllers in a contemporary parallel manner. In accordance with this procedure, all circuits within the cross-connect system transmit their respective complete circuit ID codes in accordance with the procedure illustrated in Figure 19. In particular, all shelf controllers transmit the ID and other information for circuits that have circuit ID codes currently loaded in the Transmission Table. These transmissions can take place on several circuit paths simultaneously, such as on the TRACKING conductor, or the INPUT and OUTPUT drivers of the Patch. The collisions are solved using the approach illustrated in Figures 20 to 23C. To reiterate a significant advantage that is realized through the use of the present scanning technique, all circuit connections are scanned and identified within the time needed to transmit a single string of ID bits of the circuit cross connection, regardless of the number of circuits used within the cross-connect system. A "listen before transmitting" approach is used during the scanning operation, in an attempt to minimize collisions and transmissions through the scanning bus. If a transmission is detected in a connection coupled to a particular circuit identified in the Transmission Table, the transmitting circuit is prevented from making further transmissions, and its IDENTIFICATION is removed from the appropriate transmission FIFO 618 of the Transmission Table. In this situation, the input transmission normally, if not exclusively, is a circuit ID that is communicated from an associated circuit (i.e., cross connected).
Because the IDENTIFICATIONS of circuits for the pair of cross-connected circuits is known by reference to the appropriate receiving FIFO 608 of the receiver circuit, no further duplicative scanning for this transmitter circuit needs to occur. However, this duplicative scanning will conveniently result in repetitive transmission of a signal to keep the receiver alive, as mentioned above. For circuits where transmission activity is detected, the rack controller instructs all these circuits to begin transmitting their respective IDENTIFICATIONS according to the procedure illustrated in Figure 19. When a collision is detected on a particular circuit connection , a collision arbitration procedure is initiated, where one of the two transmitter circuits (identified as a "transmitter") is allowed to continue transmitting its complete ID, and the other circuit is instructed to cease its transmission. This circuit ID is removed from the Transmission Table, and the circuit is identified as a "receiver" for the following transmissions, although it may be desirable to reset all circuits as "transmitters", and repeat the collision arbitration procedure for each Subsequent transmission. It will be appreciated that no further collisions will occur over the established connection between these two circuits, assuming no change in hard wire or patch connectivity occurs, because only one of the two circuits is allowed (i.e. the transmitting circuit) transmit its circuit ID and other information during the following scanning operations. The receiving circuit, which has been instructed by the shelf controller not to transmit its identification on the current connection during the following scans, receives and stores the identification of the transmitting circuit, and when instructed, communicates this identification information and its own Identification information to the main computer. Any change in hard-wire or patch connectivity to a particular circuit, regardless of whether the circuit is identified as a transmitter or receiver, is detected by the shelf controller. In this case, the new connection will be scanned in the same way as those associated with the circuits previously loaded in the Transmission Table. In this case, the circuits involved lose their respective identifications as "transmitter" or "receiver". As such, any modification to an existing connection or addition of a new connection will be detected and identified within a single subsequent scan period (ie, the time it takes to transmit a single identification bit of the cross-connect circuit ). Referring to Figure 19, the arbitration steps of circuit ID and collision transmission in accordance with the first modality of a scanning methodology will now be described in greater detail. Figures 20 to 21B will also be referred to in this discussion. Figure 20 is an illustration of two cross-connected circuits, each including respective transmission (XMIT) and reception (RCM) FIFOs 381, 389 and 383, 391 coupled with the respective collision detection circuits 385, 387. The pair of circuits A and B are connected by means of an information signal connection (not shown) and a RASTREO 393 busbar connection. Figures 21A, 21B illustrate, in table form, the status of the XMIT and RCV FIFOs 381, 383, 389, 391 of the circuits A and B, when they are simultaneously transmitting the IDENTIFICATION information of the circuit on the connection of the RASTREO bus 393. FIGS. 21A, 21B also indicate the presentation and resolution of a collision of according to an embodiment of a collision arbitration scheme using the circuit 395 illustrated in Figure 22. It is understood that the receiver / transmitter circuit 395 shown in Figure 22 can be used in a Dedicated odo, or in a multiplexed operation mode. In a dedicated mode, a receiver / transmitter circuit 395 is connected to each of the TRACK, Patch IN, and Patch OUT connections (i.e., three individual circuits 395). In a multiplexed mode, a single receiver / transmitter circuit 395 is selectively connected to any of the connections of TRACKING, Patch INPUT, and Patch OUTPUT. A time diagram characterizing the operation of the receiver / transmitter circuit 395 is provided in FIGS. 23A-23C. The circuit shown in FIG. 22 constitutes a three-state, open-collector digital transmitter-receiver, wherein the active state is represented by a logical 0 (for example, earth), and an open / inactive state is represented by a logical 1 (for example, V). If the cross-connect circuits at both ends of a TRACK bus connection connect the same signal (ie, a 1 or a 0), then no difference between the signals transmitted and received is detected by the signal detection circuit. collision 395, and it is considered that a collision has not occurred. However, if both circuits transmit opposite signals, it will be considered that a collision has occurred on one of the circuits. The cross-connection circuit that transmits the logical "0" will have priority, and will be allowed to continue transmitting its ID code, while the associated circuit will detect a bad signal coupling or a collision condition, and will be prevented from transmitting more its identification code. The transmission of a logical "0" cancels the status of the busbar, and leads the busbar to "low". It is noted that the receiver 397 of the collision detection circuit 395 is active during the times when the transmitter 399 is idle (ie, the times t-j_, t2,, t ^, ... tn). During the time that the receiver 397 is active, such as the time duration t-i, for example, the receiver 397 monitors the busbar connection of RASTREO 393, in order to detect the presence of a transmitter on the same Receiver 397 normally samples the TRACE bus 393 bus connection in a repetitive manner during each period of transmitter idle time. In this way, a listening approach is carried out before transmitting, in order to carry out the communications between the connected circuits. As discussed above, all circuits that have IDs loaded in the Transmission Table (ie, a circuit transmission FIFO 620, 622, or 624) for all the shelves within the cross-connect system, start transmitting 370 their Respective IDENTIFICATIONS in parallel. In particular, each circuit transmits 371 its identification information, one bit at a time, from its associated transmitter FIFO 618. For example, and with reference to Figures 21A, 21B, if both circuits A and B transmit 371 a logic 1 as the first bit of their respective IDENTIFICATIONS from their respective transmission FIFOs 381, 389, and both circuits A and B receive 372 a logic 1 in their respective receiving FIFOs 383, 393, no difference between the transmitted signals is detected and received 373 by collision detection circuits 385, 387. As such, a collision is not considered to have occurred. The same result occurs when both circuits A and B transmit 371 a logical 0 as the second bit of their respective IDENTIFICATIONS. The following ID bits transmitted by circuits A and B are tested in a similar manner 374, 375. Because each circuit ID with a cross-connect system is unique, a collision will eventually occur on the coupling circuits A and B of connection 393 of the TRACE bus bar during the scanning operation. For example, if circuit A transmits 371 a logical 0 as the third bit of its IDENTIFICATION, and the circuit B transmits 371 a logic 1 as the third bit of its ID, the collision detection circuit 387 detects a bad coupling between the transmitted and received identification signals. According to the collision arbitration scheme of this mode, the circuit that transmits a logical 0 is given priority (that is, it cancels the status of the busbar) on the circuit that transmits a logical 1. As such, circuit A is allowed to continue transmitting its ID without alterations. On the other hand, circuit B is instructed to stop all subsequent ID transmissions during the existence of the present connection (i.e., there is no change in hard wire or patch connection status), and subsequently it is identified as a "receiver" circuit. It is noted that circuit A continues to operate as a "transmitter" circuit during current and subsequent scanning operations, although a formal procedure to identify it is not required. It is important that the IDENTIFICATION bit information of the circuit stored in the "receiver" circuit, which in this illustrative example is circuit B, corresponds precisely to the IDENTIFICATION bit information of the circuit transmitted by the "transmitter" circuit, in this case. In the case of circuit A. Because only the receiver circuit reports the IDENTIFICATION information of the circuit for both transmitter and receiver circuits to the main computer, it is significant that the collision arbitration scheme of the present scanning methodology is non-destructive, and ensures that the IDENTIFICATION of the transmitter circuit and related information is received with 100 percent integrity. As mentioned above, there will be no further collisions on the connection of the TRACKING busbar established between circuits A and B, assuming no changes in hard-wire or patch connectivity, because only the cable is allowed to connect. Transmitter circuit transmit its circuit ID and other information during subsequent scanning operations. Using this scheme, all circuit connections will be known within the time needed to transmit a single string of IDENTIFICATION bits of the circuit, regardless of the size of the cross-connect system. Under nominal operating conditions, there is generally no need for a receiver circuit to transmit its ID information, as long as the current connection is maintained. In the special case where a pair of patch cables have been patched incorrectly to different circuits, there is a possibility that two simultaneous circuit identifications are received in the two patch paths connected to the common circuit. In a configuration in which a single rack controller receiver is multiplexed across the three circuit paths, that is, the TRACK, INPUT, and Patch OUT paths, this bad connection condition can be Detect and remedy automatically using the shelf controller. In such a case, the shelf controller detects that there is a communication error on both the patch INPUT and patch OUT paths. In response, the shelf controller switches the receiver's multiplexer to connect to one of the two patch paths, and waits for the next circuit ID to arrive. During the next dead time, the shelf controller then transmits the circuit ID of the selected patch path, to cause the associated circuit at the opposite end of the patch cable to stop transmitting its identification information in the previously described manner. Turning now to Figures 24 and 25, an alternate modality of a methodology by which the connection information is acquired for all connections established through a cross-connect system is illustrated in the form of a flowchart. Upon receiving a transmission command received from a main computer 380, the Transmission Table (for example, the transmission TRACE FIFOs 620) is loaded 382 with the TRACK ID information for a first set of circuits for each shelf. By way of example, if N represents the total number of circuits comprising each shelf, then the first half or N / 2 circuits have their associated TRACKING IDENTIFICATIONS loaded in the Transmission Table. It is noted that other groupings of circuits other than N / 2 may be used, such as N / 4 or N / 10, for example. The operations of steps 386 to 406 are then executed for each circuit of the first circuit set. These steps are substantially the same as steps 304-323 discussed above with respect to Figures 17 and 18, and, for purposes of brevity, will not be described further. When the first half or N / 2 of circuits within the respective shelves have been processed 410, the Transmission Table is loaded with the TRACK IDENTIFICATIONS of the second half or N / 2 of circuits 384. After processing the second half of circuitry in a manner similar to that described hereinabove, the scanning operation illustrated in FIG. 25 is executed 408, the termination of which is subsequently reported to the main computer. Figure 25 illustrates a number of process steps involved in transmitting the IDENTIFICATION information of the circuit in accordance with the second scanning approach. The second scanning methodology involves a learning phase, during which the system determines if and when each circuit is authorized to transmit or receive ID information within the total scanning period. A period of scanning within the context of this illustrative mode is formed from 2 to N transmission cycles, where N is equal to the number of bits in the ID of the circuit. During the learning phase, for example, circuit 1 of shelf 1 for all the equipment bays transmits its ID information to its partner. This process is repeated for circuits 2 to N / 2 circuits for all N circuits on all shelves within the equipment bay. Within the transmission period of 2 to N / 2 cycles, all 1 to N potential circuits within a shelf will have transmitted their current ID information for the entire system. During the learning phase, data collisions may occur when two circuits transmit their respective circuit IDs at the same moment in time. As an example, this would normally happen when circuit 1 of shelf 1, bay 1, is connected to circuit 1, shelf 1, of bay 2. The learning methodology in accordance with this modality is designed to minimize the number of collisions. These data collisions are resolved through a priority scheme of shelf number, such that a circuit with a lower shelf number becomes a "receiver", and the circuit with the highest shelf number arrives to be the "transmitter", or vice versa. Assuming that at least one collision has occurred, and based on the length of the shelf identification, the learning phase may require a minimum of two transmission cycles to be performed, plus additional time for collision resolution. It is estimated that the total elapsed learning time may be less than 50 milliseconds, based on a transmission speed of 19,200 bps. After completion of the learning phase, the shelf controller will have determined the particular transmission cycle within which each circuit is allowed to transmit or receive data without causing a collision. All connection status information is reported back to the main computer on a data bus during this learning phase. Then the system enters an operative or monitoring phase, where the transmission of the circuit identification information in the 2 to N transmission cycles will continue to be presented, to continuously verify the connection status of the circuits. A key distinction between monitoring and learning phases within the context of this mode is that collisions can only occur during the monitoring phase if there is a change in the connection status, and only changes are reported in this state to the main computer . After initiating 420 the scanning procedure illustrated in Figure 25, each connection is monitored to detect the presence of a transmission on the connection. If a transmission 422 is detected on a connection associated with a particular circuit identified in the Transmission Table, the transmitting circuit is prevented from making additional transmissions, and 424 its IDENTIFICATION is removed from the appropriate transmission FIFO 618 of the Transmission Table. For circuits that do not detect transmission activity, the rack controller instructs all of these circuits to begin transmitting 426 the least significant bit of the shelf ID, before IDENTIFYING the circuit, in an attempt to minimize the presentation of a circuit. early collision in the scanning process. As with other scanning procedures, the shelf ID and circuit ID information may be transmitted on several circuit paths in a simultaneous manner, such as the TRACKING conductor, or the INPUT and OUTPUT patch protection conductors. If 430 a collision is detected at any circuit connection, the circuits involved are instructed to stop 432 their respective transmissions, and a collision arbitration operation is initiated in the following manner. If the rack / circuit ID bit transmitted by a particular circuit is equal to 0, as tested in step 434, this circuit is allowed to transmit 438, 440 a subsequent rack identification bit / circuit, while it is delayed 436 its associated circuit of transmitting its shelf identification bit / circuit for the 1 bit period. It is noted that the 1-bit period within this context is defined as a length of time required to transmit one of a total of N bits of shelf / circuit ID, where N represents the number of bits that constitute the shelf ID. /circuit. The process of steps 430-440 continues for the following bit periods, until a difference is detected between the shelf / circuit identifications of the pair of transmitter circuits. The bit period during which no collision is detected is stored, and the transmission of the shelf / circuit IDs continues through the circuits, until all 442 IDENTIFICATION bit streams have been transmitted for both circuits. To summarize, collisions are solved using the shelf and circuit IDs, in order to decide which circuit of the connection has the highest priority. Once the initial learning phase has been completed, the scanning algorithm will continue to transmit data in 2 to N transmission cycles. This provides continuous verification of all connections. If collisions occur, they will be resolved in the manner described above. Because scanning of all shelves proceeds in parallel, the total scan time is not affected by the total size of the cross-connect system. Figure 24 illustrates that the loading operation of a Transmission Table with the IDENTIFICATION information of the circuit takes into account if there are several bantam plugs occupied, such as the INPUT / OUTPUT patch plugs, in which case, IDENTIFICATIONS of Additional circuits in the Transmission Table for these circuit paths. A Transmission Table can be loaded with between 1 and N information circuits for each shelf. According to an example scenario, the Transmission Table can be loaded with information concerning all circuits, as described above with respect to Figures 17 and 18, or alternatively, it can be loaded with information concerning circuits 1 through N / 2, as described above with respect to Figure 24. Another scenario may involve loading the Transmission Table with a single circuit ID for each shelf (eg, circuit 1 for shelf 1, circuit 2 for shelf 2, etc.). After the Transmission Table is loaded in this manner, the scanning operation illustrated in Figure 25 can be started. When the scanning operation for the first set of circuit IDs is determined, the loading function of the Transmission will resume loading the next set of circuit IDs, and a subsequent scan operation will be performed using this next set of circuit IDs. This process is repeated until all circuit IDs have been transmitted. Referring now to Figure 26, a third embodiment is illustrated by which connection information is determined for all circuits within a cross-connect system, in accordance with this mode, the rack controllers scan in sequence through all the circuits for each shelf, in such a way that the presentation of a collision is precluded. However, the advantages of avoiding collisions occur at the expense of an increase in scan time, compared to the relatively short scan times associated with the first and second scanning approaches described above. The third scanning approach illustrated in Figure 26 includes a learning phase and a monitoring phase. During the learning phase, which is initiated upon receipt of a transmit command from the main computer, the system determines the particular transmission cycles of a scan period during which each circuit is authorized to transmit its circuit identification information. . Within the context of this mode, a scanning period is defined by a number of scanning cycles, which normally corresponds to the number of individual circuits comprising each shelf (for example, a maximum of 84 circuits per shelf corresponds to 84 scanning cycles per scan period). During the learning phase, circuit 1 of shelf 1 for all the equipment bays transmits its ID to its associated circuit. The circuit 2 of shelf 2 for all the equipment bays does the same. This is repeated for circuits 3 through N, for all the Mallets within each bay of the equipment. Assuming a scan period of 84 cycles, for example, all 1 to 84 potential circuits within a shelf will have transmitted their circuit IDs for the entire system during the scanning period. While in the learning phase, data collisions could occur when two circuits transmit their respective circuit IDs at the same moment in time. This would happen when circuit 1 of shelf 1, bay 1, is connected to circuit 1, shelf 1, bay 2. These data collisions are solved through a priority scheme of serial numbers, so that the circuit with the lowest serial number priority moves to a different scan cycle within the scan period of 84 cycles. The learning phase, in this way, will take two complete periods containing 84 cycles of data scanning each. Once the learning phase is completed, each circuit will know which cycle it is allowed to transmit without causing a collision. All connection status information is reported back to the main computer over the data bus during the learning phase. After receiving 450 a transmission command from the main computer, each of the shelf controllers selects a respective first circuit 452 housed inside the shelf. The receiver is disabled for the selected circuit, the shelf ID information and circuit ID is transmitted 456 to the RASTREO driver. If the patch INPUT socket is occupied 458, the rack ID number information, circuit number, and busy patch INPUT 460 is transmitted over the patch cable protector conductor. If the Patch OUT plug is busy 462, 464 the shelf ID number, circuit number, and Patch OUT information is transmitted over the patch cable protector conductor. The receiver of the selected circuit is then enabled 456, and the shelf controller selects another circuit for processing 468, 470. The scanning steps 454-470 are repeated until all circuits have been processed, after which the controller from bay reports the completion of operation 471 to the main computer. Referring to Figures 27 and 28, a monitoring procedure is described that can be implemented by each shelf controller as a means to locally detect and report changes in the connection status for all connections established through the shelf controller . A connection change can be the establishment of a new connection or the removal of an existing connection, regardless of whether the connection is a patch or hard cable connection. The monitoring of all connections to detect any of these changes proceeds in a simultaneous manner with respect to the scanning operations described above. Table 2 provided above provides an example of different types of information that can be maintained and updated in the local database of a shelf controller. After all the initial connections have been reported, the rack controllers continuously monitor their respective connections to detect and report only the changes in the connection status, thus reducing the amount of data communicated to the main computer and store in the database. Referring to Figure 27, each shelf controller interacts with its local database, supported on a shelf controller memory, which contains the connection information only for those circuits connected inside the shelf. In determining whether any circuit connections have been lost, each of the shelf controllers selects a first entry of the local database 500, and determines 502 if the selected connection has been refreshed, so that the continuity without changes in the connection status. If so, the shelf controller selects 508 the next circuit entry in the local database. If 502 a particular connection has not been refreshed, the local database entry for the affected circuit 504 is cleaned, and the loss of connection information 506 to the host computer is reported. The connection loss verification procedure illustrated in Figure 27, usually operates on a continuous basis, but can be executed in a selective manner by the shelf controller or the host computer. The process steps illustrated in Figure 28 describe a general methodology by which new connections are detected with respect to a particular shelf. If 520 a message or associated circuit identification is received for a particular circuit within a shelf, the shelf controller determines whether the connection information for the circuit currently exists in the local database 522. If so, the monitoring continues . If the connection information does not exist in the local database for the circuit, a local database entry for this circuit is created 524, and the new connection information is reported to the main computer 526, when the rack controller is immediately grouped. The new connection monitoring function normally operates on a continuous basis, but can be executed in a selective manner by means of the shelf controller or the main computer. An important aspect of the present invention relates to a graphical user interface that allows a user to interact with the system of cross connections at many levels. The cooperation between the cross-connect database and the GUI provides features and functionality that were not available until now in conventional cross-connection systems. By way of example, and not limitation, the graphical user interface provides a user with the opportunity to participate in the management of all circuit registers, and provides the ability to visually track circuits from one system to another. A user is also given the opportunity to graphically display the topology of the network, as it relates to the cross-connection system or the scanning bus, and allows a user to pre-define and control the patch sequences to reset the circuits critical and other circuits in response to network depletions. The graphical user interface, in combination with the cross-connect database, allows continuous monitoring of all cross-connection circuits within a central office or telecommunication network, and provides near-time connection status information real with respect to the changes made to any of the cross connections. Also, a user can generate a number of database reports related to circuit changes, customer names, circuit types, and the like. Other information may also be obtained, including the definition of the connections of the central office equipment, the physical connection routes, the intermediate termination and splice locations, and the related transmission speed information, and may be presented to the user by middle of the graphical user interface. Further, in Table 4, descriptions of different information screens that can be obtained using a graphical user interface in combination with a cross-connect database in accordance with the present invention are provided.
TABLE 4 Visual Deployment Whenever a connection is changed from Warning, whether it is disconnected or added, a jump warning window is activated at the highest level, along with a sound alert (user selectable). Several levels of warning screens are defined - and all are required to be selectively activated / deactivated by the user.
A directory tree, such as the one shown in Figure 29, for example, can be activated by a user to display cities, the central office, the floor, the bay, and other related inforon that is currently defined within the connection system. crossed A bay configuration and visual display capability is also provided, such as the one illustrated in Figure 30, where an establishment screen can be used to add and configure new and existing bays and shelves. You can also see a graphic representation of the installed bay, which shows a bitmap view of the model type, with shelves provisioned for each bay, through the use of the graphical user interface. A graphic representation of a cross-connection shelf, as illustrated in Figure 31, provides a bitmap view of the shelf configuration and the type of model. You can also view the connection status inforon, such as through a screen similar to the one provided in Figure 32, where you can view and edit the relevant circuit identification and connection inforon. The circuit-to-circuit connection inforon can be viewed from a screen, such as that shown in Figures 33 and 34, whereby all intermediate connections and connection equipment can be presented to a user. Multiple window displays and overlapping configurations can be selected, where each screen can be activated and deactivated for bay, shelf, and port / circuit visual displays. The windows can overlap each other, and all the windows that are being displayed are updated on an almost real time basis, even when they are displayed in the background. In addition, a multi-layered screen may be provided that allows the user to identify new equipment bays, shelves, or circuits, which have been physically installed. In addition, even when cross-connection inforon is autocally detected, the user can be given the ability to define naming conventions to use, and can enter certain circuit-specific inforon into the database.
Multiple levels of security are also provided, which can be implemented in a manner analogous to different known multi-level network security schemes. Figure 35 illustrates the connection inforon for a cross connection selected by the user. It can be seen that a comprehensive set of data is maintained with respect to each and every connection in a cross-connection system, in the cross-connection database. Figure 36 illustrates a screen of the connection data shown in Figure 35, which has been autocally modified to reflect the current state of the connection. In particular, the connection data shown in Figure 36 includes the currently active patch connection inforon on the front, and hard cable connection inforon currently inactive in the background. Import / export screens and functionality can be provided, which allows a user to import and export inforon from the cross-connect database, to or from other sources, such as spreadsheets and other application programs. Also, the connection change inforon can be presented to the user, indicating new or disconnected connections, through jump warning windows, together with the audio alarms selectable by the user. You can define several levels of warning screens, which can be activated or deactivated selectively by a user. The graphical user interface can be used to develop any number of pending patch files that, as discussed above, define circuit patches required to maintain the key connection integrity during network depletions. Different exhaustion scenarios can be simulated using the GUI, and a remedy pending patch file developed to solve each particular exhaustion scenario. The efficiency of a selected pending patch operation can be simulated by executing it in response to a particular simulated exhaustion. Of course, the GUI can be used to run an appropriate pending patch file in the case of actual network exhaustion. A hand-held or otherwise portable computer can be used to interface with the intelligent cross-connect system, for the purposes of improving diagnostics, patching, and connection verification, for example. The portable unit includes an interface to physically connect to the scan bus, such as in the EIA-485 busbar, and communicates with the bay controllers and the shelf controllers of interest. A particular operation suitable for the hand unit involves controlling the TRACKING LEDs of the selected cross-connection circuits, as an aid to performing a patch sequencing procedure. The manual unit can be used to perform a number of other useful operations through cooperation with the main computer during the execution of a pending patch file. The above description of the different embodiments of the invention has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. For example, the scanning systems and methods described herein can be implemented in digital cross-connect, hybrid digital / analog, and fiber optic or hybrid fiber systems. Many modifications and variations are possible in light of the previous teaching. It is intended that the scope of the invention be limited, not by this detailed description, but rather by the claims appended hereto.

Claims (28)

  1. CLAIMS 1. A method for electronically identifying the connections established through pairs of cross-connection circuits provided in a cross-connection system, which comprises: transmitting, through first and second circuits of each pair of cross-connection circuits operating in a transmission mode, a scanning signal on a scanning connection, the scanning connection being separate from a connection on which an information signal is communicated between the first and second circuits; detecting a difference between the scan signals respectively transmitted by the respective first and second circuits; changing, in response to detecting the difference between the respective scanning signals, one of the first or second circuits, to operate in a reception mode; and receiving, by the first or second circuit operating in the reception mode, the scan signal transmitted by the first or second circuit operating in the transmission mode. The method of claim 1, wherein detecting the difference between the scan signals is performed by each of the first and second circuits. 3. The method of claim 1, wherein: each of the scanning signals comprises a circuit identification bit string that uniquely identifies the first and second respective circuits of each pair of circuits; and detecting the difference between the scanning signals, which further comprises comparing each bit of a circuit identification bit of data transmitted by each of the first and second circuits, each bit of a bit of circuit identification bits being received for each of the first and second circuits. The method of claim 1, wherein the change of one of the first and second circuits to operate in the reception mode, further comprises changing one of the first or second circuits, to operate in the reception mode, in response to a difference between a bit of a circuit identification bit of data transmitted by each of the first and second circuits, with a corresponding bit of a circuit identification bit of data received by each of the first and second circuits. The method of claim 1, wherein: each of the scanning signals comprises a circuit identification bit string, which uniquely identifies the first and second respective circuits of each pair of circuits; and the operations of transmitting, detecting, changing, and receiving are performed during a scanning time, ts, characterized by: ts = (n +) • (1 / CLK) wherein, n represents a number of bits of the respective bitstreams, m represents a number of synchronization bits, and CLK represents a given clock speed in Hertz. The method of claim 1, wherein the operations of transmission, detection, change, and reception, are performed for all pairs of cross-connect circuits during a scanning time of less than about 1 second. The method of claim 1, which further comprises storing the identification information derived from the scan signal received in a data processing system. The method of claim 1, wherein the transmission of the scanning signals further comprises transmitting the scanning signals over a hard cable connection or a patch connection of the scanning connection. The method of claim 1, wherein the transmission of the scanning signals further comprises transmitting the scanning signals onto a protective sleeve of a patch connection of the scanning connection. The method of claim 1, wherein the transmission of the scanning signals comprises transmitting the scanning signals by the first and second circuits of each pair of cross-connect circuits., in a substantially simultaneous manner. 11. A cross-connect system, which comprises: a plurality of pairs of circuits, each comprising a first cross-connect circuit and a second cross-connect circuit, a scanning bus that comprises hard cable or patch connections coupling together the first and second respective circuits of each pair of circuits, the scanning busbar being separated from a connection on which an information signal is communicated between the first and second respectively coupled circuits; and a processor coupled with the first and second circuits of each pair of circuits by means of the scanning bus, the processor initiating the transmission of a scanning signal by one or both of the first and second circuits of each pair of circuits on the scanning bus, and acquiring the connection information that identifies the first and second circuits of each pair of circuits. The system of claim 11, wherein the processor acquires connection information during a scan time, ts, characterized by: ts = (n + m) • (1 / CLK) where n represents a number of bits of the scan signals, m represents a number of synchronization bits, and CLK represents a given clock speed in Hertz. The method of claim 11, wherein the processor acquires the connection information during a scanning time of less than about 1 second. The system of claim 11, wherein each of the first and second circuits comprises a collision detection circuit, each of the collision detection circuits comprising one or more receiver / transmitter circuits. The system of claim 14, wherein the receivers of the receiver / transmitter circuits are active during the times in which the transmitters of the receiver / transmitter circuits are inactive. The system of claim 11, wherein each of the first and second circuits comprises a collision detection circuit, each of the collision detection circuits comparing the bits of a scan signal transmitted by the first and second respective circuits, with the bits of a scanning signal received by the respective first and second circuits. The system of claim 11, wherein the scanning signals are transmitted on a protective jacket of the patch connections of the scanning bus. The system of claim 11, wherein the processor initiates the transmission of the scanning signals by one or both of the first and second circuits of each pair of cross-connect circuits, in a substantially simultaneous manner. The system of claim 11, wherein each of the first and second circuits comprises one or more controllable annunciators, and the system further comprises a user interface cooperating with the processor to display the selected connection information, and for control the selected controllable annunciators The system of claim 19, wherein the user interface is geographically remote from, or geographically close to, the processor. The system of claim 19, wherein the user interface is provided in a handheld device. 22. The system of claim 19, wherein the user interface cooperates with the processor to display a graphic illustration of selected portions of the cross-connect system. The system of claim 19, wherein the user interface cooperates with the processor to display a graphic illustration of one or both of the first and second circuits of one or more circuit pairs. The system of claim 19, wherein each of the first and second circuits comprises one or more light-emitting annunciators, and the user interface cooperates with the processor to control the light-emitting annunciators of the cross-connect circuits. selected. The system of claim 19, wherein each of the first and second circuits comprises one or more multi-color light-emitting annunciators, and the user interface cooperates with the processor to control multi-color light-emitting annunciators. of the selected cross connection circuits. 26. The system of claim 19, wherein the user interface cooperates with the processor to control the annunciators of the selected cross-connect circuits, to guide a technician when configuring the cross-connect system. 27. The system of claim 19, wherein the user interface cooperates with the processor to control the annunciators of the selected cross-connection circuits, in response to the execution of a pre-programmed sequence of patch operations or cross-connect, to be performed by a technician. The system of claim 19, wherein the user interface cooperates with the processor to generate a pending patch file, the pending patch file representing a sequence of patch or cross-connect operations, to be performed by a technician. . SUMMARY A system and method for electronically identifying connections established through a cross-connect system provides identification of all hard-wire and temporary patch connections, and any modifications made to existing cross-connection circuit connections. The connection identification and status information is acquired in an almost real time, and it is stored in a database that is accessible by a user through a graphical user interface (GUI). The TRACK or lamp wires connecting the respective pairs of cross-connect circuits are used in an unconventional manner to form a scanning bus. The information signal paths established through the cross-connect circuits remain unaltered, a scanning signal is communicated between each pair of cross-connect circuits on the TRACKING conductor. In the event that a patch cable is used to temporarily redirect a signal connection, the scanning signal is transmitted over the protector or jacket cable of the patch cable. The scan signal provides identification and other information with respect to the transmission circuit. A circuit that receives the scanning signal communicates its identification information and that of the transmission circuit derived from the scanning signal, to a central computer. The identification information acquired by the central computer from all reception cross-connection circuits provides identification and status information for all circuits within the cross-connect system. In one embodiment, all circuits of a cross-connect system are scanned, and identification information is acquired in the time required to transmit a single string of identification bits of the cross-connect circuit, regardless of the total number of circuits Cross connection included within the cross connection system. k k k k
MXPA/A/2000/004838A 1997-11-17 2000-05-17 System and method for electronically identifying connections of a cross-connect system MXPA00004838A (en)

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