MX348232B - Metodos y aparatos para reducir las fallas de modo comun en los sistemas de control de software relacionados con la seguridad nuclear. - Google Patents

Metodos y aparatos para reducir las fallas de modo comun en los sistemas de control de software relacionados con la seguridad nuclear.

Info

Publication number
MX348232B
MX348232B MX2015001900A MX2015001900A MX348232B MX 348232 B MX348232 B MX 348232B MX 2015001900 A MX2015001900 A MX 2015001900A MX 2015001900 A MX2015001900 A MX 2015001900A MX 348232 B MX348232 B MX 348232B
Authority
MX
Mexico
Prior art keywords
division
common mode
task
apparatuses
methods
Prior art date
Application number
MX2015001900A
Other languages
English (en)
Other versions
MX2015001900A (es
Inventor
Bishara E Kakunda
Gregory S Droba
Oscar L Meek
Original Assignee
Ge Hitachi Nuclear Energy Americas Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ge Hitachi Nuclear Energy Americas Llc filed Critical Ge Hitachi Nuclear Energy Americas Llc
Publication of MX2015001900A publication Critical patent/MX2015001900A/es
Publication of MX348232B publication Critical patent/MX348232B/es

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/06—Clock generators producing several clock signals
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1695—Error detection or correction of the data by redundancy in hardware which are operating with time diversity
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/181—Eliminating the failing redundant component
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/183—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components
    • G06F11/184—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components where the redundant components implement processing functionality
    • G—PHYSICS
    • G21—NUCLEAR PHYSICS; NUCLEAR ENGINEERING
    • G21D—NUCLEAR POWER PLANT
    • G21D3/00—Control of nuclear power plant
    • G21D3/001—Computer implemented control
    • G—PHYSICS
    • G21—NUCLEAR PHYSICS; NUCLEAR ENGINEERING
    • G21D—NUCLEAR POWER PLANT
    • G21D3/00—Control of nuclear power plant
    • G21D3/04—Safety arrangements
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E30/00—Energy generation of nuclear origin
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E30/00—Energy generation of nuclear origin
    • Y02E30/30—Nuclear fission reactors

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Plasma & Fusion (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Business, Economics & Management (AREA)
  • Emergency Management (AREA)
  • Power Sources (AREA)
  • Hardware Redundancy (AREA)

Abstract

Un sistema informático incluye por lo menos una primera división y una segunda división; la primera división tiene una primera frecuencia de reloj y la segunda división tiene una segunda frecuencia de reloj; el sistema informático incluye un primer procesador configurado para ejecutar una tarea en la primera división y un segundo procesador configurado para ejecutar la tarea en la segunda división; la tarea ejecutada en la primera división opera de acuerdo con la primera frecuencia de reloj, y la tarea ejecutada en la segunda división opera de acuerdo con la segunda frecuencia de reloj; un método para ejecutar una tarea a fin de reducir fallas de modo común en un sistema informático incluye variar una velocidad de programa de cada una de la pluralidad de divisiones de manera que la tarea, cuando haya sido ejecutada en una correspondiente de la pluralidad de divisiones, opera a una frecuencia de reloj de acuerdo con la correspondiente de la pluralidad de divisiones.
MX2015001900A 2014-02-12 2015-02-11 Metodos y aparatos para reducir las fallas de modo comun en los sistemas de control de software relacionados con la seguridad nuclear. MX348232B (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US14/178,820 US9547328B2 (en) 2014-02-12 2014-02-12 Methods and apparatuses for reducing common mode failures of nuclear safety-related software control systems

Publications (2)

Publication Number Publication Date
MX2015001900A MX2015001900A (es) 2015-08-11
MX348232B true MX348232B (es) 2017-05-30

Family

ID=52464250

Family Applications (1)

Application Number Title Priority Date Filing Date
MX2015001900A MX348232B (es) 2014-02-12 2015-02-11 Metodos y aparatos para reducir las fallas de modo comun en los sistemas de control de software relacionados con la seguridad nuclear.

Country Status (4)

Country Link
US (1) US9547328B2 (es)
EP (1) EP2911058B1 (es)
ES (1) ES2615119T3 (es)
MX (1) MX348232B (es)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9823959B2 (en) * 2013-05-13 2017-11-21 Nxp Usa, Inc. Microcontroller unit and method of operating a microcontroller unit
PL3251121T3 (pl) * 2015-01-30 2023-08-28 Fortum Oyj System kluczowy dla bezpieczeństwa
EP3543718B1 (en) * 2018-03-19 2020-08-19 Melexis Technologies NV Method for detecting a failure in an electronic system
US11289893B2 (en) * 2019-12-18 2022-03-29 Semiconductor Components Industries, Llc Devices, systems and methods for avoiding fault propagation in safety systems
EP4324001A2 (en) * 2021-04-13 2024-02-21 GE-Hitachi Nuclear Energy Americas LLC Distributed modular nuclear power plant layout architecture

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4644538A (en) * 1982-06-16 1987-02-17 The Boeing Company Autopilot flight director system
US4752869A (en) * 1985-05-09 1988-06-21 Westinghouse Electric Corp. Auxiliary reactor protection system
US5086499A (en) * 1989-05-23 1992-02-04 Aeg Westinghouse Transportation Systems, Inc. Computer network for real time control with automatic fault identification and by-pass
ATE127598T1 (de) * 1990-06-01 1995-09-15 Bell Telephone Mfg Verfahren zum modifizieren eines fehlertoleranten datenverarbeitungssystems.
US5613127A (en) * 1992-08-17 1997-03-18 Honeywell Inc. Separately clocked processor synchronization improvement
US5621776A (en) * 1995-07-14 1997-04-15 General Electric Company Fault-tolerant reactor protection system
US6061412A (en) * 1995-10-05 2000-05-09 Westinghouse Electric Company Llc Nuclear reaction protection system
GB2317032A (en) 1996-09-07 1998-03-11 Motorola Gmbh Microprocessor fail-safe system
US5984504A (en) 1997-06-11 1999-11-16 Westinghouse Electric Company Llc Safety or protection system employing reflective memory and/or diverse processors and communications
KR100408493B1 (ko) * 2001-05-07 2003-12-06 한국전력기술 주식회사 소프트웨어 공통유형고장을 자체 배제한 디지털원자로 보호시스템 및 그 제어방법
EP1812860B1 (de) * 2004-10-25 2009-01-14 Robert Bosch Gmbh Verfahren und vorrichtung zur modusumschaltung und zum signalvergleich bei einem rechnersystem mit wenigstens zwei verarbeitungseinheiten
US20110072313A1 (en) * 2007-08-17 2011-03-24 Nxp B.V. System for providing fault tolerance for at least one micro controller unit
US8479026B2 (en) 2009-12-09 2013-07-02 Texas Instruments Incorporated Processor power management
US9052887B2 (en) 2010-02-16 2015-06-09 Freescale Semiconductor, Inc. Fault tolerance of data processing steps operating in either a parallel operation mode or a non-synchronous redundant operation mode
US8745467B2 (en) * 2011-02-16 2014-06-03 Invensys Systems, Inc. System and method for fault tolerant computing using generic hardware
JP5699057B2 (ja) * 2011-08-24 2015-04-08 株式会社日立製作所 プログラマブルデバイス、プログラマブルデバイスのリコンフィグ方法および電子デバイス

Also Published As

Publication number Publication date
EP2911058B1 (en) 2017-01-04
EP2911058A1 (en) 2015-08-26
US20150227161A1 (en) 2015-08-13
ES2615119T3 (es) 2017-06-05
MX2015001900A (es) 2015-08-11
US9547328B2 (en) 2017-01-17

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