MX2020002104A - Seguridad de pilas para operaciones definidas independientemente. - Google Patents

Seguridad de pilas para operaciones definidas independientemente.

Info

Publication number
MX2020002104A
MX2020002104A MX2020002104A MX2020002104A MX2020002104A MX 2020002104 A MX2020002104 A MX 2020002104A MX 2020002104 A MX2020002104 A MX 2020002104A MX 2020002104 A MX2020002104 A MX 2020002104A MX 2020002104 A MX2020002104 A MX 2020002104A
Authority
MX
Mexico
Prior art keywords
independently defined
defined operations
stack safety
stack
safety
Prior art date
Application number
MX2020002104A
Other languages
English (en)
Inventor
Nathan B Elsishans
Francois Carouge
Original Assignee
Lutron Tech Co Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lutron Tech Co Llc filed Critical Lutron Tech Co Llc
Publication of MX2020002104A publication Critical patent/MX2020002104A/es

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/461—Saving or restoring of program or task context
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/547—Remote procedure calls [RPC]; Web services
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G06F9/544—Buffers; Shared memory; Pipes

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Stored Programmes (AREA)
  • Executing Machine-Instructions (AREA)
  • Storage Device Security (AREA)

Abstract

Se describen sistemas y métodos para intercambiar o cambiar entre pilas asociadas a aplicaciones respectivas cuando una aplicación llama a la otra.
MX2020002104A 2017-08-24 2018-08-24 Seguridad de pilas para operaciones definidas independientemente. MX2020002104A (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201762549637P 2017-08-24 2017-08-24
PCT/US2018/047981 WO2019040892A1 (en) 2017-08-24 2018-08-24 BATTERY SAFETY FOR INDEPENDENTLY DEFINED OPERATIONS

Publications (1)

Publication Number Publication Date
MX2020002104A true MX2020002104A (es) 2020-09-18

Family

ID=63490783

Family Applications (1)

Application Number Title Priority Date Filing Date
MX2020002104A MX2020002104A (es) 2017-08-24 2018-08-24 Seguridad de pilas para operaciones definidas independientemente.

Country Status (6)

Country Link
US (2) US11036569B2 (es)
EP (1) EP3673368A1 (es)
CN (1) CN111133419B (es)
CA (1) CA3073525C (es)
MX (1) MX2020002104A (es)
WO (1) WO2019040892A1 (es)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA3017375C (en) * 2018-09-10 2024-02-13 Avigilon Coporation Secured multi-process architecture
EP3872606B1 (en) * 2020-02-25 2023-08-02 NXP USA, Inc. Processor system
CN113377466B (zh) * 2021-06-29 2022-11-25 展讯通信(天津)有限公司 算法执行方法、装置和电子设备

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6141697A (en) * 1997-06-25 2000-10-31 Unisys Corp. System and method for performing external procedure calls in heterogeneous computer systems utilizing program stacks
US6128641A (en) * 1997-09-12 2000-10-03 Siemens Aktiengesellschaft Data processing unit with hardware assisted context switching capability
US6009517A (en) * 1997-10-06 1999-12-28 Sun Microsystems, Inc. Mixed execution stack and exception handling
CA2386200A1 (en) * 1999-10-12 2001-04-19 Autodesk, Inc. Geographic maps on a personal digital assistant (pda) and server
US6772292B2 (en) * 2002-06-04 2004-08-03 Isaak Garber Two area stack
US7617496B2 (en) * 2004-04-23 2009-11-10 Apple Inc. Macroscalar processor architecture
EP1622009A1 (en) * 2004-07-27 2006-02-01 Texas Instruments Incorporated JSM architecture and systems
KR100577366B1 (ko) * 2004-09-25 2006-05-10 삼성전자주식회사 이종의 자바 메소드를 실행하는 방법 및 장치
CN101091166B (zh) * 2004-12-30 2010-05-05 英特尔公司 保存多个执行上下文的方法和装置
US7685601B2 (en) * 2005-02-28 2010-03-23 Sony Computer Entertainment Inc. Methods and apparatus for segmented stack management in a processor system
TWI261197B (en) * 2005-05-20 2006-09-01 Benq Corp Method for finding function call stack in run time for a computer system
US9135054B1 (en) * 2008-07-16 2015-09-15 Apple Inc. Method and apparatus to migrate stacks for thread execution
JP5392203B2 (ja) * 2010-08-19 2014-01-22 株式会社リコー 情報処理装置、情報処理システム、インストール支援方法、及びインストール支援プログラム
IN2013CH04831A (es) * 2013-10-28 2015-08-07 Empire Technology Dev Llc
US9483272B2 (en) * 2014-09-30 2016-11-01 Freescale Semiconductor, Inc. Systems and methods for managing return stacks in a multi-threaded data processing system
US9916141B2 (en) * 2015-10-15 2018-03-13 International Business Machines Corporation Modifying execution flow in save-to-return code scenarios
CN106681692A (zh) * 2015-11-09 2017-05-17 联发科技（新加坡）私人有限公司 控制装置、集成电路及任务栈的管理方法
US10318450B2 (en) * 2016-07-01 2019-06-11 Intel Corporation Efficient context based input/output (I/O) classification
US11782762B2 (en) * 2019-02-27 2023-10-10 Qualcomm Incorporated Stack management

Also Published As

Publication number Publication date
US11036569B2 (en) 2021-06-15
CN111133419A (zh) 2020-05-08
CA3073525A1 (en) 2019-02-28
CN111133419B (zh) 2023-11-07
US20220043700A1 (en) 2022-02-10
US20190065293A1 (en) 2019-02-28
EP3673368A1 (en) 2020-07-01
US11907774B2 (en) 2024-02-20
WO2019040892A1 (en) 2019-02-28
CA3073525C (en) 2022-07-05

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