MX2017006736A - Dispositivo de calculo electronico para efectuar aritmetica ofuscada. - Google Patents
Dispositivo de calculo electronico para efectuar aritmetica ofuscada.Info
- Publication number
- MX2017006736A MX2017006736A MX2017006736A MX2017006736A MX2017006736A MX 2017006736 A MX2017006736 A MX 2017006736A MX 2017006736 A MX2017006736 A MX 2017006736A MX 2017006736 A MX2017006736 A MX 2017006736A MX 2017006736 A MX2017006736 A MX 2017006736A
- Authority
- MX
- Mexico
- Prior art keywords
- ring element
- ring
- input
- addition
- increment
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/002—Countermeasures against attacks on cryptographic mechanisms
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/008—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols involving homomorphic encryption
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/16—Obfuscation or hiding, e.g. involving white box
Landscapes
- Engineering & Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Error Detection And Correction (AREA)
- Compression Or Coding Systems Of Tv Signals (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
- Complex Calculations (AREA)
Abstract
Se presenta un dispositivo de cálculo electrónico (100) para efectuar aritmética ofuscada en un anillo conmutativo (Zn; Zn [x] /f (x)). El dispositivo de cálculo comprende un almacenamiento (110) dispuesto para almacenar una tabla de incremento (T) definida para un elemento de anillo de incremento (I; ut), la tabla de incremento mapea un elemento de anillo de entrada (k = uk1 - uk2) a una lista de números enteros de salida (T(K1, k2)) = (l1, l2)) que codifica un elemento de anillo de salida (I = u11 - u12), de tal manera que el elemento de anillo de salida es igual al anillo del elemento de anillo de incremento añadido al elemento de anillo de entrada (I = k + 1). Usando la tabla de incremento, una unidad de adición de anillo (130) añade una primera lista de números enteros de entrada de adición ((a1, a2)) que codifica un primer elemento de anillo de entrada de adición y una segunda lista de números enteros de entrada de adición (b1, b2)) que codifica un segundo elemento de anillo de entrada de adición. El dispositivo puede comprender una unidad de multiplicación de anillo (140) que también usa la tabla de incremento.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP14195053 | 2014-11-27 | ||
PCT/EP2015/077577 WO2016083424A1 (en) | 2014-11-27 | 2015-11-25 | Electronic calculating device for performing obfuscated arithmetic |
Publications (1)
Publication Number | Publication Date |
---|---|
MX2017006736A true MX2017006736A (es) | 2017-10-04 |
Family
ID=52002730
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
MX2017006736A MX2017006736A (es) | 2014-11-27 | 2015-11-25 | Dispositivo de calculo electronico para efectuar aritmetica ofuscada. |
Country Status (9)
Country | Link |
---|---|
US (1) | US10200191B2 (es) |
EP (1) | EP3224982B1 (es) |
JP (1) | JP2018503113A (es) |
CN (1) | CN107005399A (es) |
BR (1) | BR112017010906A2 (es) |
MX (1) | MX2017006736A (es) |
RU (1) | RU2698764C2 (es) |
WO (1) | WO2016083424A1 (es) |
ZA (1) | ZA201704321B (es) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106716345A (zh) | 2014-09-30 | 2017-05-24 | 皇家飞利浦有限公司 | 用于执行混淆算术的电子计算设备 |
JP6368051B2 (ja) | 2014-12-12 | 2018-08-01 | コーニンクレッカ フィリップス エヌ ヴェKoninklijke Philips N.V. | 電子生成装置 |
EP3238366B1 (en) * | 2014-12-22 | 2019-03-13 | Koninklijke Philips N.V. | Electronic calculating device |
EP3671492A1 (en) * | 2018-12-21 | 2020-06-24 | Dassault Systèmes | Adaptive compression of simulation data for visualization |
US11411749B2 (en) * | 2020-01-31 | 2022-08-09 | Nxp B.V. | System and method for performing netlist obfuscation for a semiconductor device |
EP3907633B1 (en) | 2020-05-05 | 2022-12-14 | Nxp B.V. | System and method for obfuscating opcode commands in a semiconductor device |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5270956A (en) * | 1991-03-18 | 1993-12-14 | University Of Maryland | System and method for performing fast algebraic operations on a permutation network |
CA2263588C (en) * | 1996-08-19 | 2005-01-18 | Ntru Cryptosystems, Inc. | Public key cryptosystem method and apparatus |
US6760742B1 (en) * | 2000-02-18 | 2004-07-06 | Texas Instruments Incorporated | Multi-dimensional galois field multiplier |
EP1636932A2 (en) * | 2003-06-13 | 2006-03-22 | Koninklijke Philips Electronics N.V. | Multiplication in a finite field |
JP4876075B2 (ja) * | 2005-11-08 | 2012-02-15 | パナソニック株式会社 | 認証システム、署名生成装置、署名検証装置 |
CN101491000B (zh) * | 2006-07-12 | 2011-12-28 | 耶德托公司 | 用于混淆密码函数的方法和系统 |
US8090097B2 (en) * | 2006-10-11 | 2012-01-03 | Frank Rubin | Device, system and method for cryptographic key exchange |
GB0621951D0 (en) * | 2006-11-03 | 2006-12-13 | Univ Oxford Brookes | Polynonomial synthesis |
US8670559B2 (en) * | 2008-03-05 | 2014-03-11 | Irdeto Corporate B.V. | White-box implementation |
US9654280B2 (en) * | 2009-03-10 | 2017-05-16 | Irdeto B.V. | White-box cryptographic system with input dependent encodings |
RU2439693C1 (ru) * | 2010-06-04 | 2012-01-10 | Федеральное государственное учреждение "Государственный научно-исследовательский испытательный институт проблем технической защиты информации Федеральной службы по техническому и экспортному контролю" | Способ защиты текстовой информации от несанкционированного доступа |
FR2968104B1 (fr) * | 2010-11-30 | 2013-07-12 | Logiways France | Procede et systeme de protection d'un dispositif de cryptographie |
CN103888937B (zh) * | 2014-03-31 | 2017-06-20 | 北京科技大学 | 一种适用于无线传感器网络aes加密的低开销快速轮加密装置及方法 |
CN106716345A (zh) | 2014-09-30 | 2017-05-24 | 皇家飞利浦有限公司 | 用于执行混淆算术的电子计算设备 |
-
2015
- 2015-11-25 CN CN201580064796.XA patent/CN107005399A/zh active Pending
- 2015-11-25 MX MX2017006736A patent/MX2017006736A/es unknown
- 2015-11-25 US US15/527,730 patent/US10200191B2/en not_active Expired - Fee Related
- 2015-11-25 JP JP2017527783A patent/JP2018503113A/ja active Pending
- 2015-11-25 EP EP15800820.1A patent/EP3224982B1/en not_active Not-in-force
- 2015-11-25 RU RU2017122260A patent/RU2698764C2/ru not_active IP Right Cessation
- 2015-11-25 BR BR112017010906A patent/BR112017010906A2/pt not_active Application Discontinuation
- 2015-11-25 WO PCT/EP2015/077577 patent/WO2016083424A1/en active Application Filing
-
2017
- 2017-06-26 ZA ZA2017/04321A patent/ZA201704321B/en unknown
Also Published As
Publication number | Publication date |
---|---|
EP3224982B1 (en) | 2018-07-11 |
RU2698764C2 (ru) | 2019-08-29 |
WO2016083424A1 (en) | 2016-06-02 |
US10200191B2 (en) | 2019-02-05 |
RU2017122260A (ru) | 2018-12-27 |
BR112017010906A2 (pt) | 2018-02-06 |
ZA201704321B (en) | 2019-01-30 |
RU2017122260A3 (es) | 2019-02-14 |
US20170324544A1 (en) | 2017-11-09 |
JP2018503113A (ja) | 2018-02-01 |
CN107005399A (zh) | 2017-08-01 |
EP3224982A1 (en) | 2017-10-04 |
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