LU72443A1 - - Google Patents

Info

Publication number
LU72443A1
LU72443A1 LU72443A LU72443A LU72443A1 LU 72443 A1 LU72443 A1 LU 72443A1 LU 72443 A LU72443 A LU 72443A LU 72443 A LU72443 A LU 72443A LU 72443 A1 LU72443 A1 LU 72443A1
Authority
LU
Luxembourg
Application number
LU72443A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of LU72443A1 publication Critical patent/LU72443A1/xx

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66Digital/analogue converters
    • H03M1/74Simultaneous conversion
    • H03M1/78Simultaneous conversion using ladder network
    • H03M1/785Simultaneous conversion using ladder network using resistors, i.e. R-2R ladders

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
LU72443A 1974-05-13 1975-05-12 LU72443A1 (enrdf_load_stackoverflow)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2423130A DE2423130A1 (de) 1974-05-13 1974-05-13 Schaltungsanordnung zur umsetzung von digitalen siganlen, insbesondere pcm- signalen, in entsprechende analoge spannungen

Publications (1)

Publication Number Publication Date
LU72443A1 true LU72443A1 (enrdf_load_stackoverflow) 1975-08-28

Family

ID=5915401

Family Applications (1)

Application Number Title Priority Date Filing Date
LU72443A LU72443A1 (enrdf_load_stackoverflow) 1974-05-13 1975-05-12

Country Status (9)

Country Link
JP (1) JPS50156865A (enrdf_load_stackoverflow)
BE (1) BE828999A (enrdf_load_stackoverflow)
DE (1) DE2423130A1 (enrdf_load_stackoverflow)
DK (1) DK155575A (enrdf_load_stackoverflow)
FR (1) FR2271710A1 (enrdf_load_stackoverflow)
IT (1) IT1038005B (enrdf_load_stackoverflow)
LU (1) LU72443A1 (enrdf_load_stackoverflow)
NL (1) NL7505548A (enrdf_load_stackoverflow)
SE (1) SE7505444L (enrdf_load_stackoverflow)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2838310C2 (de) 1978-09-01 1983-12-01 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung zur Umsetzung von Digital-Signalen, insbesondere PCM- Signalen, in diesen entsprechende Analog- Signale, mit einem R-2R-Kettennetzwerk
JPS5546637A (en) * 1978-09-28 1980-04-01 Seiko Epson Corp Reference voltage circuit
DE2939455C2 (de) 1979-09-28 1983-11-17 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung zur Umsetzung von Digital-Signalen, insbesondere PCM-Signalen, in diesen entsprechende Analog-Signale, mit einem R-2R-Kettennetzwerk
DE3070532D1 (en) * 1980-11-27 1985-05-23 Itt Ind Gmbh Deutsche Monolithic integratable r-2r network

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4917900A (enrdf_load_stackoverflow) * 1972-06-08 1974-02-16

Also Published As

Publication number Publication date
DK155575A (da) 1975-11-14
BE828999A (fr) 1975-11-13
FR2271710B1 (enrdf_load_stackoverflow) 1978-03-17
NL7505548A (nl) 1975-11-17
FR2271710A1 (en) 1975-12-12
DE2423130A1 (de) 1975-11-20
SE7505444L (sv) 1976-01-09
IT1038005B (it) 1979-11-20
JPS50156865A (enrdf_load_stackoverflow) 1975-12-18

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