LU65452A1 - - Google Patents
Info
- Publication number
- LU65452A1 LU65452A1 LU65452DA LU65452A1 LU 65452 A1 LU65452 A1 LU 65452A1 LU 65452D A LU65452D A LU 65452DA LU 65452 A1 LU65452 A1 LU 65452A1
- Authority
- LU
- Luxembourg
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
- H03K5/135—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19712127944 DE2127944A1 (en) | 1971-06-04 | 1971-06-04 | Integrable circuit arrangement for converting asynchronous input signals into signals synchronized with a system's own clock |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| LU65452A1 true LU65452A1 (en) | 1973-01-22 |
Family
ID=5809913
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| LU65452D LU65452A1 (en) | 1971-06-04 | 1972-06-02 |
Country Status (7)
| Country | Link |
|---|---|
| BE (1) | BE784339A (en) |
| DE (1) | DE2127944A1 (en) |
| FR (1) | FR2141744B1 (en) |
| GB (1) | GB1345464A (en) |
| IT (1) | IT956030B (en) |
| LU (1) | LU65452A1 (en) |
| NL (1) | NL7207439A (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2402880C2 (en) * | 1974-01-18 | 1982-01-21 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Fail-safe electronic circuit for converting electrical signals of different duration into signals of a certain duration |
| US5087835A (en) * | 1991-03-07 | 1992-02-11 | Advanced Micro Devices, Inc. | Positive edge triggered synchronized pulse generator |
| DE19844936C2 (en) | 1998-09-30 | 2001-02-01 | Siemens Ag | Circuit for generating an output signal depending on two input signals |
| DE102004031669B3 (en) * | 2004-06-30 | 2006-02-09 | Infineon Technologies Ag | Clock control cell |
-
1971
- 1971-06-04 DE DE19712127944 patent/DE2127944A1/en active Pending
-
1972
- 1972-05-31 IT IT2509672A patent/IT956030B/en active
- 1972-05-31 GB GB2538872A patent/GB1345464A/en not_active Expired
- 1972-06-01 NL NL7207439A patent/NL7207439A/xx unknown
- 1972-06-02 BE BE784339A patent/BE784339A/en unknown
- 1972-06-02 LU LU65452D patent/LU65452A1/xx unknown
- 1972-06-02 FR FR7219898A patent/FR2141744B1/fr not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| DE2127944A1 (en) | 1972-12-14 |
| IT956030B (en) | 1973-10-10 |
| FR2141744A1 (en) | 1973-01-26 |
| FR2141744B1 (en) | 1973-07-13 |
| BE784339A (en) | 1972-12-04 |
| NL7207439A (en) | 1972-12-06 |
| GB1345464A (en) | 1974-01-30 |