Classifications

• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K3/00—Apparatus or processes for manufacturing printed circuits
  • H05K3/46—Manufacturing multilayer circuits
  • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
  • H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
  • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
  • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
  • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W90/00—Package configurations
  • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
  • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
  • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

• Engineering & Computer Science (AREA)
• Manufacturing & Machinery (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Structure Of Printed Boards (AREA)
• Production Of Multi-Layered Print Wiring Board (AREA)
• Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Applications Claiming Priority (1)

Publications (1)

Family

ID=5807084

Family Applications (1)

Country Status (7)

Families Citing this family (2)

• 1971
  • 1971-05-06 DE DE2122475A patent/DE2122475B2/de active Granted
• 1972
  • 1972-05-03 FR FR7215695A patent/FR2135256A1/fr not_active Withdrawn
  • 1972-05-04 GB GB2072672A patent/GB1365824A/en not_active Expired
  • 1972-05-04 LU LU65294A patent/LU65294A1/xx unknown
  • 1972-05-04 NL NL7206027A patent/NL7206027A/xx unknown
  • 1972-05-05 BE BE783109A patent/BE783109A/xx unknown
  • 1972-05-05 IT IT23936/72A patent/IT959699B/it active

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