LU61556A1 - - Google Patents
Info
- Publication number
- LU61556A1 LU61556A1 LU61556DA LU61556A1 LU 61556 A1 LU61556 A1 LU 61556A1 LU 61556D A LU61556D A LU 61556DA LU 61556 A1 LU61556 A1 LU 61556A1
- Authority
- LU
- Luxembourg
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
- H03K19/086—Emitter coupled logic
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
- H03K19/086—Emitter coupled logic
- H03K19/0863—Emitter function logic [EFL]; Base coupled logic [BCL]
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19691943205 DE1943205A1 (de) | 1969-08-25 | 1969-08-25 | Logischer Gatterschaltkreis in ECL-Schaltkreistechnik |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| LU61556A1 true LU61556A1 (de) | 1971-07-15 |
Family
ID=5743740
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| LU61556D LU61556A1 (de) | 1969-08-25 | 1970-08-21 |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US3655998A (de) |
| AT (1) | AT308431B (de) |
| BE (1) | BE755245A (de) |
| DE (1) | DE1943205A1 (de) |
| FR (1) | FR2058903A5 (de) |
| GB (1) | GB1304779A (de) |
| LU (1) | LU61556A1 (de) |
| NL (1) | NL7012059A (de) |
| SE (1) | SE359710B (de) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2524044C3 (de) * | 1975-05-30 | 1981-11-12 | Siemens AG, 1000 Berlin und 8000 München | Universelles Verknüpfungsglied für den Subnanosekundenbereich |
| JPS53114651A (en) * | 1977-03-17 | 1978-10-06 | Fujitsu Ltd | Electronic circuit |
| JPS5494269A (en) * | 1978-01-09 | 1979-07-25 | Hitachi Ltd | Logic circuit |
| JPS58197920A (ja) * | 1982-05-13 | 1983-11-17 | Toshiba Corp | 論理回路 |
| EP0630113B1 (de) | 1993-06-16 | 2001-02-21 | Koninklijke Philips Electronics N.V. | Integrierte Logikschaltung mit Logikgattern mit einem einzigen Eingang |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3321639A (en) * | 1962-12-03 | 1967-05-23 | Gen Electric | Direct coupled, current mode logic |
| US3351782A (en) * | 1965-04-01 | 1967-11-07 | Motorola Inc | Multiple emitter transistorized logic circuitry |
-
0
- BE BE755245D patent/BE755245A/xx unknown
-
1969
- 1969-08-25 DE DE19691943205 patent/DE1943205A1/de active Pending
-
1970
- 1970-08-14 NL NL7012059A patent/NL7012059A/xx unknown
- 1970-08-18 FR FR7030256A patent/FR2058903A5/fr not_active Expired
- 1970-08-21 LU LU61556D patent/LU61556A1/xx unknown
- 1970-08-21 US US65777A patent/US3655998A/en not_active Expired - Lifetime
- 1970-08-24 AT AT765270A patent/AT308431B/de not_active IP Right Cessation
- 1970-08-24 GB GB4061570A patent/GB1304779A/en not_active Expired
- 1970-08-24 SE SE11471/70A patent/SE359710B/xx unknown
Also Published As
| Publication number | Publication date |
|---|---|
| FR2058903A5 (de) | 1971-05-28 |
| DE1943205A1 (de) | 1971-03-11 |
| GB1304779A (de) | 1973-01-31 |
| NL7012059A (de) | 1971-03-01 |
| BE755245A (fr) | 1971-02-25 |
| AT308431B (de) | 1973-07-10 |
| US3655998A (en) | 1972-04-11 |
| SE359710B (de) | 1973-09-03 |