LU600039B1 - Firmware real-time update method, system without resetting control chip and storage medium - Google Patents
Firmware real-time update method, system without resetting control chip and storage mediumInfo
- Publication number
- LU600039B1 LU600039B1 LU600039A LU600039A LU600039B1 LU 600039 B1 LU600039 B1 LU 600039B1 LU 600039 A LU600039 A LU 600039A LU 600039 A LU600039 A LU 600039A LU 600039 B1 LU600039 B1 LU 600039B1
- Authority
- LU
- Luxembourg
- Prior art keywords
- partition
- flash
- control chip
- read
- flash memory
- Prior art date
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/65—Updates
- G06F8/656—Updates while running
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/65—Updates
- G06F8/654—Updates using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Stored Programmes (AREA)
Abstract
The invention discloses a firmware real-time updating method and system free of resetting control chip, and a storage medium. The method comprises the following steps, storing application program codes and partition exchange codes before and after updating in two independent flash memory partitions of the control chip, providing power for the control chip, starting a first flash memory partition, and executing a Bank exchange instruction; the control chip executing partition exchange codes of a second read-only flash memory partition of the first flash memory partition and starting a memory remapping control function, the state of a central processing unit (CPU) being kept unchanged, and the control chip obtaining and executing a next instruction from the second flash memory partition and introducing the next instruction to a first read-only flash memory partition ROM1 of the second flash memory partition, and executing the updated application program code. When the control chip executes an old firmware application program function, new firmware programming is carried out on the flash memory partition, the new firmware is seamlessly exchanged and executed through a memory remapping function, and real-time firmware updating without resetting the control chip is completed.
Description
FIRMWARE REAL-TIME UPDATE METHOD, SYSTEM WITHOUT
RESETTING CONTROL CHIP AND STORAGE MEDIUM
[0001] The present invention relates to the technical field of embedded industrial equipment, and in particular to a firmware real-time updating method and system without resetting a control chip, and a computer-readable storage medium.
[0002] Firmware is a program written into EPROM (Erasable Programmable Read-Only
Memory), EEPROM (Electrically Erasable Programmable Read-Only Memory) or FLASH chip. Firmware is a device "driver" stored inside the device, and is responsible for the most basic and lowest-level work of a digital product. Through the firmware, the operating system can implement operation of a specific machine according to standard device drivers. It can usually be upgraded by user through a specific refresh program. In hardware devices, firmware is soul of the hardware device. Because some hardware devices have no other software components besides firmware, the firmware determines function and performance of the hardware device.
[0003] Many applications require that product support software upgrades after release, which forces the application to include a bootloader to manage the flash memory contents and a communication medium to share information with an external host device. Due to an influence of architecture of microcontroller, instruction execution is stopped during flash erase/write operations. Since these operations can take several milliseconds, the application is usually taken offline to perform firmware updates. The downtime can be as long as several seconds, which may be too costly for some end applications. In a non-redundant situation, execution of a software update will cause the control chip to reset and restart, thereby resulting in a change in the device's working state. Even in a redundant environment, it is sometimes necessary to manually redesign the device upgrade process, which also brings out additional costs.
Summary of the invention 7999099
[0004] Therefore, a firmware real-time update method without resetting a control chip, a system and a computer-readable storage medium is provided, which can prevent the device from pausing to respond when terminal applies a non-redundant device configuration to perform a firmware upgrade without resetting the control chip.
[0005] A method for real-time firmware update without resetting control chip, the control chip having a dual storage partition flash memory, the method comprising the following steps:
[0006] Step 1: a first flash memory partition Flash Bankl of the control chip stores the application code and the partition exchange code before the update, and a second flash memory partition Flash Bank2 of the control chip stores the application code and the partition exchange code after the update;
[0007] Step 2: the control chip is powered on and starts from the first flash partition Flash
Bankl by default, the control chip startup code is executed, copying the read and write segments in the flash partition to a static random access storage partition, initializing external devices, and entering a main loop program.
[0008] Step 3, executing Bank exchange instruction; the control chip executing the partition exchange code of a second read-only flash partition ROM2 area of the first flash partition
Flash Bank1, and starting memory remapping control function;
[0009] Step 4, state of the CPU remains unchanged, the control chip obtains and executes a next instruction from the second flash partition Flash Bank2, introduces to the first read-only flash partition ROMI1 of the second flash partition Flash Bank2, and executes the updated application code.
[0010] Preferably, the control chip has a memory remapping control function, and its stack, register and PC pointer remain unchanged.
[0011] Preferably, the control chip comprises two independent flash memory partitions, which are respectively a first flash memory partition Flash Bank1l and a second flash memory partition Flash Bank2. Each of the flash memory partitions comprises a first read-only flash memory partition ROMI and a second read-only flash memory partition ROM2, the two first read-only flash memory partition ROMI1 store application code with changeable content; and the two second read-only flash memory partition ROM2 store the same partition exchange 00089 code.
[0012] Preferably, the control chip further comprises a static random access storage partition, which comprises a first read-write partition SRAMI and a second read-write partition SRAM2, wherein the first read-write partition SRAMI stores re-initializable data segment content; and the second read-write partition SRAM2 stores non-re-initializable data segment content.
[0013] Preferably, the step of storing the application code and the partition exchange code before the update in the first flash partition Flash Bank1 of the control chip, and storing the updated application code and the partition exchange code in the second flash partition Flash
Bank2 of the control chip in step 1 specifically includes:
[0014] Step 1.1, the first read-only flash partition ROMI1 of the first flash partition Flash
Bank1 stores the application code before the update, and the second read-only flash partition
ROM2 of the first flash partition Flash Bank] stores the partition exchange code;
[0015] Step 1.2: the first read-only flash partition ROM1 of the second flash partition Flash
Bank2 stores the updated application code, and the second read-only flash partition ROM2 of the second flash partition Flash Bank2 stores the partition exchange code.
[0016] Preferably, the step of copying the read-write segment in the flash memory partition to the static random access storage partition in step 2 specifically includes:
[0017] Step 2.1, copying the content of the reinitializable data segment to the first read-write partition SRAMI;
[0018] Step 2.2, copying the non-re-initializable data segment content to the second read-write partition SRAM2.
[0019] Preferably, starting memory remapping control function in step 3 include the following specific steps:
[0020] Step 3.1: exchanging address spaces of the first flash memory partition Flash Bank1 and the second flash memory partition Flash Bank2.
[0021] Preferably, after the control chip obtains and executes the next instruction from the second flash memory partition Flash Bank2 in step 4, the following steps are further performed:
[0022] Step 4.1, the first read-only flash partition ROM1 of the second flash partition Flash 00?
Bank2 reinitializes the first read-write partition SRAMI1, and the content of the second read-write partition SRAM2 remains unchanged.
[0023] Further, a real-time firmware update system without resetting the control chip, configured to implement the real-time firmware update method without resetting the control chip as described above, the system comprising:
[0024] a flash partition unit, comprising a first flash partition Flash Bankl and a second flash partition Flash Bank2, for storing application code and partition exchange code before and after updating;
[0025] a static random access memory partition unit, comprising a first read-write partition
SRAMI and a second read-write partition SRAM2, for storing re-initializable data segments and non-re-initializable data segments;
[0026] a command execution unit comprising a control chip and being configured to execute the application code in the flash memory partition unit.
[0027] In addition, a computer-readable storage medium is provided, which stores a computer program, wherein the computer program is executed by a processor and is configured to implement the firmware real-time update method without resetting the control chip as described above.
[0028] In the above-mentioned real-time firmware update method, the system without resetting the control chip, and computer-readable storage medium, the control chip of the device uses a single-chip microcomputer with dual flash memory partitions and has a memory remapping control function. As such, the control chip can program the flash memory partition with new firmware while executing the old firmware application function, and thus seamlessly exchange and execute the new firmware through the memory remapping function, thereby completing real-time update of the firmware without resetting the control chip. From the perspective of the end user, the present invention ensures that normal use of the user is not affected when the product is upgraded, thereby improving the stability, security and ease of use of the terminal. In consideration of product life, the two version areas on the flash memory are used alternately. After a successful upgrade, the next startup will run from the other area.
Compared with products that update and run versions in the identical area, this alternating use of flash memory partitions extends service life and improves product stability. The method of 00089 the invention is simplified, easy to implement, low in cost and convenient to promote.
[0029] FIG. 1 is a flowchart of firmware exchange of device in a method for real-time 5 firmware update without resetting a control chip according to an embodiment of the present invention.
[0030] FIG. 2 is a schematic diagram of address mapping of dual flash memory partitions in different modes in a method for real-time firmware update without resetting a control chip according to an embodiment of the present invention.
[0031] FIG.3 is a schematic diagram of address mapping of programs and variables under dual flash memory storage partitions in a method for real-time firmware update without resetting a control chip according to an embodiment of the present invention.
[0032] This embodiment takes a firmware real-time update method without resetting the control chip, a system and a computer-readable storage medium as examples, and the present invention will be described in detail below in conjunction with specific embodiments and accompanying drawings.
[0033] Refer to FIGS. 1, 2 and 3, which show a real-time firmware update method without resetting the control chip in accordance with an embodiment of the present invention. The control chip used in this embodiment preferably has a memory remapping control function, and its stack, register and PC pointer remain unchanged. The memory remapping operation of the control chip will not affect current state of the CPU. The method comprises the following steps:
[0034] Step S100, the first flash partition Flash Bank1 of the control chip stores application code and the partition exchange code before the update, and the second flash partition Flash
Bank2 of the control chip stores the updated application code and the updated partition exchange code after the update.
[0035] Specifically, step S110, the first read-only flash partition ROMI1 of the first flash partition Flash Bank 1 stores the application code before updating, and the second read-only flash partition ROM2 of the first flash partition Flash Bank 1 stores the partition exchange 00089 code.
[0036] Step S120, the first read-only flash partition ROM1 of the second flash partition
Flash Bank 2 stores the updated application code, and the second read-only flash partition
ROM2 of the second flash partition Flash Bank 2 stores the partition exchange code.
[0037] Specifically, the control chip is able to program the updated application code in the first read-only flash partition ROMI1 of the second flash partition Flash Bank2 while executing the application code before update in the first read-only flash partition ROMI1 of the first flash partition Flash Bank1.
[0038] Step S200, the control chip is powered on, and by default it starts from the first flash partition Flash Bankl, executes the control chip startup code, copies the read and write segments in the flash partition to a static random access storage partition, initializes external devices, and enters the main loop program.
[0039] Specifically, step S210, the content of the reinitializable data segment is copied to the first read-write partition SRAMI.
[0040] Step S220, the content of the data segment which cannot be reinitialized is copied to the second read-write partition SRAM2.
[0041] Step S300, the Bank exchange instruction is executed. In particular, the control chip executes the partition exchange code of the second read-only flash partition ROM2 area of the first flash partition Flash Bank1, and starts the memory remapping control function.
[0042] Specifically, step S310, address space of the first flash memory partition Flash Bank1 and that of the second flash memory partition Flash Bank2 are exchanged.
[0043] In particular, as shown in FIG. 2, in normal mode, the address space of the first flash memory partition Flash Bank1 is 0x0800 0000 to 0x0803 FFFF, and the address space of the second flash memory partition Flash Bank2 is 0x0804 0000 to 0x0807 FFFF. When the memory remapping function is enabled, the address spaces of the two independent flash memory partitions are exchanged, namely, the address space of the first flash memory partition Flash Bank1 is 0x0804 0000 to 0x0807 FFFF, and the address space of the second flash memory partition Flash Bank2 is 0x0800 0000 to 0x0803 FFFF.
[0044] Step S400, CPU state remains unchanged, the control chip obtains and executes nent 00? instruction from the second flash partition Flash Bank2, guides to the first read-only flash partition ROMI1 of the second flash partition Flash Bank2, and executes the updated application code.
[0045] Specifically, step S410, the first read-only flash partition ROMI1 of the second flash partition Flash Bank2 reinitializes the first read-write partition SRAM, and the content of the second read-write partition SRAM2 remains unchanged.
[0046] Specifically, content of the second read-write partition SRAM2 remains unchanged.
That is, the content of the second read-write partition SRAM2 shared by the first flash partition Flash Bank1 and the second flash partition Flash Bank2 does not change before and after the Bank exchange instruction is executed, so that key working state of the device remains unchanged.
[0047] Preferably, the control chip includes two independent flash memory partitions, which are respectively a first flash memory partition Flash Bankl and a second flash memory partition Flash Bank2. Each of the flash memory partitions comprises a first read-only flash memory partition ROM1 and a second read-only flash memory partition ROM2. The two first read-only flash memory partition ROM1 store application codes with changeable content; the two second read-only flash memory partition ROM2 store the same partition exchange codes.
[0048] Specifically, the contents stored in the two second read-only flash partitions ROM2 are consistent, and the contents stored in the two first read-only flash partitions ROMI are allowed to be different. Wherein the first read-only flash partition ROM1 of the first flash partition Flash Bankl1 stores the application code before the update, and the first read-only flash partition ROMI1 of the second flash partition Flash Bank2 stores the updated application code after the update.
[0049] Preferably, the control chip further comprises a static random access storage partition, which includes a first read-write partition SRAMI1 and a second read-write partition
SRAM2. The first read-write partition SRAMI stores re-initializable data segment content; and the second read-write partition SRAM2 stores non-re-initializable data segment content.
[0050] Specifically, as it should be seen from FIG. 2, the method of the present invention preferably has features that the control chip used has dual flash memory storage partitions and a memory remapping control function. In a normal mode, the address space of the first flash) memory partition Flash Bank1 is 0x0800 0000 to 0x0803 FFFF, and the address space of the second flash memory partition Flash Bank2 is 0x08040000 to 0x0807 FFFF. When the memory remapping function is enabled, the two independent flash partition address spaces will be swapped, that is, the address space of the first flash partition Flash Bank1 is 0x0804 0000 to 0x0807 FFFF, and the address space of the second flash partition Flash Bank2 is 0x0800 0000 to 0x0803 FFFF.
[0051] As shown in FIG. 3, the method of the present invention is usefully provided with content and address space allocation for the firmware program. In an independent flash memory partition (Flash Bank), the memory partition can be divided into an application code area (ROM1) with variable content and a Bank exchange code area (ROM2) with unchanged content/address. In the shared static random access memory partition (SRAM), it is divided into a reinitializable data segment (SRAMI1) and a non-reinitializable data segment (SRAM2).
[0052] As shown in FIG. 1, the control chip starts from the first flash partition Flash Bank 1 by default. When the Flash Bankl is powered on, and after executing the startup code and initialization code in sequence, it enters the main loop to wait for the Bank exchange instruction. After receiving the Bank exchange instruction, the program will execute the inherent fixed code in the ROM2 area of the first flash partition Flash Bankl to perform memory remapping operations. Since the address space of the fixed code in the ROM2 area of the second flash partition Flash Bank2 is consistent with that of the ROM2 area of the first flash partition Flash Bankl, the program will execute the application program in the ROM1 area of the second flash partition Flash Bank2 without changing the CPU state, thus achieving real-time firmware update without resetting the control chip.
[0053] Further, a real-time firmware update system without resetting the control chip is provide to implement the real-time firmware update method without resetting the control chip as described above, the system comprising:
[0054] a flash partition unit, comprising a first flash partition Flash Bankl and a second flash partition Flash Bank2, for storing application code and partition exchange code before and after updating;
[0055] a static random access memory partition unit, comprising a first read-write partition 00089
SRAMI and a second read-write partition SRAM2, for storing re-initializable data segments and non-re-initializable data segments; and
[0056] a command execution unit comprises a control chip and is configured to execute the application code in the flash memory partition unit.
[0057] In addition, a computer-readable storage medium which stores a computer program and is executed by a processor to implement the firmware real-time update method without resetting the control chip as described above.
[0058] In the real-time firmware update method without resetting the control chip, the system and the computer-readable storage medium as described above, the control chip of the device uses a single-chip microcomputer with dual flash memory partitions and has a memory remapping control function, so that the control chip can program the flash memory partition with new firmware while executing the old firmware application function, and seamlessly exchange and execute the new firmware through the memory remapping function, thereby completing the real-time firmware update of the control chip without resetting. From the perspective of the end user, the present invention ensures that normal use of the user is not affected when the product is upgraded, thereby improving the stability, security and ease of use of the terminal. In consideration of product life, the two version areas on the flash memory are used alternately. After a successful upgrade, the next startup will run from the other area.
Compared with products that update and run versions in the identical area, this alternating use of flash memory partitions extends service life and improves product stability. The method of the invention is simplified, easy to implement, low in cost and convenient to promote.
[0059] It is to be noted that the above-mentioned descriptions represent merely the exemplary embodiments of the present disclosure, without any intention to limit the scope of the present disclosure thereto. Those skilled in the art should understand that the present invention may have various modifications and changes. These modifications, equivalent replacements, improvements, etc., made within the spirit and principle of the present invention should be included in the scope of protection of the present invention.
Claims (5)
1. À method for real-time firmware update without resetting a control chip, wherein the control chip has a dual storage partition flash memory, the method comprises the following steps: step 1, a first flash memory partition Flash Bank1 of the control chip stores application code and partition exchange code before the update, and a second flash memory partition Flash Bank2 of the control chip stores the application code and the partition exchange code after the update; step 2: the control chip is powered on and starts from the first flash partition Flash Bankl by default, the control chip startup code is executed to copy the read and write segments in the flash partition to the static random access storage partition, initialize external devices, and enter the main loop program; step 3, executing the Bank exchange instruction; the control chip executes partition exchange code of the second read-only flash partition ROM2 area of the first flash partition Flash Bankl, and starts the memory remapping control function; and step 4, CPU state remains unchanged, the control chip obtains and executes the next instruction from the second flash partition Flash Bank2, introduces to the first read-only flash partition ROMI of the second flash partition Flash Bank2, and executes the updated application code; wherein the control chip has a memory remapping control function, and stack, register and PC pointer of the control chip remain unchanged; wherein the control chip comprises two independent flash memory partitions, the two independent flash memory partitions are respectively a first flash memory partition Flash Bankl and a second flash memory partition Flash Bank2, each of the flash memory partitions comprises a first read-only flash memory partition ROMI and a second read-only flash memory partition ROM2, the two first read-only flash memory partition ROMIs store application code with changeable content; the two second read-only flash memory partition ROM2s store the same partition exchange code; wherein the control chip further includes a static random access storage partition which comprises a first read-write partition SRAMI and a second read-write partition SRAM2, the first read-write partition SRAM1 stores re-initializable data segment content; and the second read-write partition SRAM2 stores non-re-initializable data segment content; wherein the step of starting the memory remapping control function in step 3 further comprises: step 3.1, address spaces of the first flash memory partition Flash Bank] and the second flash memory partition Flash Bank2 are exchanged;
wherein after the control chip obtains and executes the next instruction from the second flash memory 9999 partition Flash Bank2 in step 4, further comprising the following step: step 4.1, the first read-only flash partition ROMI1 of the second flash partition Flash Bank2 reinitializes the first read-write partition SRAM], and the content of the second read-write partition SRAM2 remains unchanged.
2. The method for real-time firmware update without resetting the control chip as claimed in claim 1, wherein the step of storing the application code and the partition exchange code before the update in the first flash memory partition Flash Bank1 of the control chip, and storing the updated application code and the partition exchange code in the second flash memory partition Flash Bank? of the control chip in step 1 further comprises: step 1.1, the first read-only flash partition ROMI of the first flash partition Flash Bankl stores the application code before the update, and the second read-only flash partition ROM2 of the first flash partition Flash Bank1 stores the partition exchange code; step 1.2: the first read-only flash partition ROMI of the second flash partition Flash Bank2 stores the updated application code, and the second read-only flash partition ROM2 of the second flash partition Flash Bank? stores the partition exchange code.
3. The method for real-time firmware update of a non-resetting control chip according to claim 1, wherein the step of copying the read-write segment in the flash memory partition to the static random access storage partition in step 2 further comprises: step 2.1, copying the content of the reinitializable data segment to the first read-write partition SRAMI step 2.2, copying the content of the data segment that cannot be reinitialized to the second read-write partition SRAM2.
4. A real-time firmware update system without resetting control chip, which is configured to implement the real-time firmware update method without resetting the control chip as claimed in any one of claims 1 to 3, wherein the system comprises: a flash memory partition unit, comprising a first flash memory partition Flash Bankl and a second flash memory partition Flash Bank2, for storing application code and partition exchange code before and after updating; a static random access memory partition unit, comprising a first read-write partition SRAMI and a second read-write partition SRAM2, for storing re-initializable data segments and non-re-initializable data segments; and a command execution unit includes a control chip and is used to execute the application code in the re 9999 memory partition unit.
5. A computer-readable storage medium stored with a computer program therein, wherein the program is executed by a processor to implement the real-time firmware update method of a non-reset control chip of anyone of claims 1 to 3.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202410061190.1A CN117573175B (en) | 2024-01-16 | 2024-01-16 | Firmware real-time updating method, system and storage medium for non-reset control chip |
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| LU600039B1 true LU600039B1 (en) | 2025-07-01 |
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| CN118963803A (en) * | 2024-08-07 | 2024-11-15 | 大秦数字能源技术股份有限公司 | Firmware program updating method, system, storage medium and microprocessor |
| CN121255250B (en) * | 2025-12-04 | 2026-02-06 | 北京芯驰半导体科技股份有限公司 | Program upgrade methods, chips, and vehicles |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US5596738A (en) * | 1992-01-31 | 1997-01-21 | Teac Corporation | Peripheral device control system using changeable firmware in a single flash memory |
| CN102662711B (en) * | 2012-04-06 | 2017-03-29 | 中兴通讯股份有限公司 | A kind of chip fast initializing method and device |
| CN102855151B (en) * | 2012-08-21 | 2016-06-08 | 武汉电信器件有限公司 | The optical module firmware not interrupting business is in application upgrade method |
| US11768611B2 (en) * | 2020-04-02 | 2023-09-26 | Axiado Corporation | Secure boot of a processing chip |
| CN112346770A (en) * | 2020-11-10 | 2021-02-09 | 天津津航计算技术研究所 | Embedded program online updating method |
| CN114428633A (en) * | 2022-01-05 | 2022-05-03 | 支付宝(杭州)信息技术有限公司 | Firmware upgrading method, device and equipment |
| CN116501343A (en) * | 2023-03-28 | 2023-07-28 | 超聚变数字技术有限公司 | A program upgrading method, power supply and computing device |
| CN116501357A (en) * | 2023-06-28 | 2023-07-28 | 广东高斯宝电气技术有限公司 | Online upgrade method of singlechip |
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Effective date: 20250701 |