CN117573175A - Firmware real-time updating method, system and storage medium for non-reset control chip - Google Patents
Firmware real-time updating method, system and storage medium for non-reset control chip Download PDFInfo
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- CN117573175A CN117573175A CN202410061190.1A CN202410061190A CN117573175A CN 117573175 A CN117573175 A CN 117573175A CN 202410061190 A CN202410061190 A CN 202410061190A CN 117573175 A CN117573175 A CN 117573175A
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- 238000000034 method Methods 0.000 title claims abstract description 36
- 238000005192 partition Methods 0.000 claims abstract description 225
- 101001106432 Homo sapiens Rod outer segment membrane protein 1 Proteins 0.000 claims abstract description 24
- 102100021424 Rod outer segment membrane protein 1 Human genes 0.000 claims abstract description 24
- 230000006870 function Effects 0.000 claims abstract description 21
- 101150065817 ROM2 gene Proteins 0.000 claims description 16
- 230000003068 static effect Effects 0.000 claims description 13
- 230000009977 dual effect Effects 0.000 claims description 5
- 238000004590 computer program Methods 0.000 claims description 3
- 238000012545 processing Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000013507 mapping Methods 0.000 description 2
- 230000005055 memory storage Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 101100087530 Caenorhabditis elegans rom-1 gene Proteins 0.000 description 1
- 101100305983 Mus musculus Rom1 gene Proteins 0.000 description 1
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- 238000004891 communication Methods 0.000 description 1
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- 239000000725 suspension Substances 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/65—Updates
- G06F8/654—Updates using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/65—Updates
- G06F8/656—Updates while running
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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Abstract
The invention discloses a method, a system and a storage medium for updating firmware of a non-reset control chip in real time, wherein the method comprises the following steps: the control chip is electrified, started from the first flash memory partition and executes a Bank exchange instruction; the control chip executes the partition exchange code of the second read-only flash memory partition of the first flash memory partition, starts the memory remapping control function, maintains the CPU state unchanged, acquires and executes the next instruction from the second flash memory partition, guides the next instruction to the first read-only flash memory partition ROM1 of the second flash memory partition, and executes the updated application program code. The control chip programs new firmware for the flash memory partition while executing the function of the old firmware application program, and seamlessly exchanges and executes the new firmware through the memory remapping function to complete the real-time updating of the firmware of the control chip without resetting.
Description
Technical Field
The invention relates to the technical field of embedded industrial equipment, in particular to a method and a system for updating firmware of a non-reset control chip in real time and a computer readable storage medium.
Background
Firmware (Firmware) is a program written in EPROM (erasable programmable read only memory), EEPROM (electrically erasable programmable read only memory), or FLASH chip. Firmware is a device "driver" stored inside the device, acting as the most basic, bottom-most work for a digital product. Through firmware, the operating system can implement the running actions of a specific machine according to a standard device driver, and a user can generally update the program through a specific refreshing program. In the hardware device, the firmware is the soul of the hardware device, and because some hardware devices have no other software components except the firmware, the firmware also determines the functions and performances of the hardware device.
Many applications require the product to support a software upgrade after release, which forces the application to include a bootstrap program to manage the flash memory content and the communication medium on which the information is shared with the external host device. Depending on the architecture of the single chip microcomputer, the flash memory erase/write operations may stop executing instructions, which may be too costly for some end applications, since these operations may take several milliseconds, the application is typically off-line to perform the firmware update, and downtime may be as long as several seconds. In the non-redundant case, performing the software update may cause the control chip to reset and restart, resulting in a change in the operating state of the device, and even in the redundant environment, it is sometimes necessary to manually redesign the device upgrade process, which also generates additional costs.
Disclosure of Invention
In view of the foregoing, there is a need for a method, system, and computer-readable storage medium for real-time updating of firmware of a non-reset control chip that prevents a device suspension response when a terminal uses a non-redundant device configuration for firmware upgrade.
A method for updating firmware in real time without resetting a control chip having a dual memory partition flash memory, the method comprising the steps of:
step one, the application program codes and the partition exchange codes before updating are stored in a first Flash memory partition Flash Bank 1 of the control chip, and the updated application program codes and the partition exchange codes are stored in a second Flash memory partition Flash Bank 2 of the control chip;
step two, the control chip is electrified, the control chip is started from the Flash Bank 1 of the first Flash memory partition by default, a control chip starting code is executed, a read-write section in the Flash memory partition is copied to the static random access memory partition, external equipment is initialized, and a main circulation program is entered;
step three, executing a Bank switching instruction; the control chip executes the partition exchange code of the second read-only Flash partition ROM2 area of the first Flash partition Flash Bank 1, and starts the memory remapping control function;
and step four, the CPU state of the central processing unit is kept unchanged, the control chip acquires and executes the next instruction from the second Flash partition Flash Bank 2, guides the next instruction to the first read-only Flash partition ROM1 of the second Flash partition Flash Bank 2, and executes the updated application program code.
Preferably, the control chip has a memory remapping control function, and its stack, registers and PC pointers remain unchanged.
Preferably, the control chip includes two independent Flash memory partitions, the two independent Flash memory partitions are a first Flash memory partition Flash Bank 1 and a second Flash memory partition Flash Bank 2, each Flash memory partition includes a first read-only Flash memory partition ROM1 and a second read-only Flash memory partition ROM2, and the two first read-only Flash memory partitions ROM1 store application program codes with changeable contents; the two second read-only flash memory partition ROMs 2 store the same partition exchange code.
Preferably, the control chip further comprises a static random access memory partition, the static random access memory partition comprises a first read-write partition SRAM1 and a second read-write partition SRAM2, and the first read-write partition SRAM1 stores data segment contents capable of being reinitialized; the second read-write partition SRAM2 stores the contents of the data section which cannot be reinitialized.
Preferably, the step of storing the updated application code and the partition exchange code in the first Flash memory partition Flash Bank 1 of the control chip in the step one specifically includes:
step 1.1, storing application program codes before updating in a first read-only Flash partition ROM1 of a first Flash partition Flash Bank 1, and storing partition exchange codes in a second read-only Flash partition ROM2 of the first Flash partition Flash Bank 1;
step 1.2, the updated application code is stored in the first read-only Flash partition ROM1 of the second Flash partition Flash Bank 2, and the partition exchange code is stored in the second read-only Flash partition ROM2 of the second Flash partition Flash Bank 2.
Preferably, the step of copying the read-write section in the flash memory partition to the sram partition in the second step specifically includes:
step 2.1, copying the content of the data segment which can be reinitialized to a first read-write partition SRAM1;
and 2.2, copying the content of the data segment which cannot be reinitialized to the second read-write partition SRAM2.
Preferably, the specific step of turning on the memory remapping control function in the third step includes:
step 3.1, the address space of the first Flash memory partition Flash Bank 1 is exchanged with the address space of the second Flash memory partition Flash Bank 2.
Preferably, the control chip in the fourth step further includes the following steps after obtaining and executing the next instruction from the second Flash memory partition Flash Bank 2:
step 4.1, the first read-only Flash partition ROM1 of the second Flash partition Flash Bank 2 reinitializes the first read-write partition SRAM1, and the content of the second read-write partition SRAM2 remains unchanged.
And a firmware real-time updating system of a non-reset control chip for realizing the firmware real-time updating method of the non-reset control chip, the system comprises:
the Flash memory partition unit comprises a first Flash memory partition Flash Bank 1 and a second Flash memory partition Flash Bank 2, and is used for storing application program codes and partition exchange codes before and after updating;
a static random access memory partition unit including a first read-write partition SRAM1 and a second read-write partition SRAM2 for storing a re-initializable data segment and a non-re-initializable data segment;
and the command execution unit comprises a control chip and is used for executing the application program codes in the flash memory partition unit.
And a computer-readable storage medium having stored thereon a computer program for execution by a processor to implement a firmware real-time update method of a non-reset control chip as described above.
In the method, the system and the computer readable storage medium for updating the firmware of the non-reset control chip in real time, the control chip of the device uses the singlechip with the double flash memory partitions and has the control function of memory remapping, so that the control chip programs new firmware for the flash memory partitions while executing the function of an old firmware application program, and performs the new firmware by seamless exchange through the memory remapping function, thereby completing the real-time updating of the firmware of the non-reset control chip. From the perspective of a terminal user, the invention ensures that the normal use of the user is not influenced when the product is upgraded, and provides the stability, the safety and the usability of the terminal use. From the service life of the product, two version areas on the flash memory are used alternately, and the flash memory is started to run from another area next time after the updating is successful. The method of the invention is simple, easy to realize, low in cost and convenient to popularize.
Drawings
FIG. 1 is a flow chart of device-switched firmware of a method for updating firmware in real time without resetting a control chip according to an embodiment of the invention.
Fig. 2 is an address mapping diagram of a dual flash memory partition in different modes according to a firmware real-time update method without resetting a control chip according to an embodiment of the present invention.
FIG. 3 is a schematic diagram of address mapping of programs and variables under a dual flash memory storage partition of a firmware real-time update method without resetting a control chip according to an embodiment of the present invention.
Detailed Description
In this embodiment, a method, a system and a computer readable storage medium for updating firmware in real time without resetting a control chip are taken as an example, and the present invention will be described in detail with reference to specific embodiments and drawings.
Referring to fig. 1, fig. 2 and fig. 3, a method for updating firmware of a control chip without resetting is shown in the embodiment of the present invention, in which the control chip used has a memory remapping control function, and the stack, the register and the PC pointer remain unchanged. The memory remapping operation of the control chip does not affect the current state of the CPU. The method comprises the following steps:
step S100, the updated application program code and the partition exchange code are stored in the first Flash memory partition Flash Bank 1 of the control chip, and the updated application program code and the partition exchange code are stored in the second Flash memory partition Flash Bank 2 of the control chip.
In step S110, the first read-only Flash partition ROM1 of the first Flash partition Flash Bank 1 stores the application code before updating, and the second read-only Flash partition ROM2 of the first Flash partition Flash Bank 1 stores the partition exchange code.
In step S120, the updated application code is stored in the first read-only Flash partition ROM1 of the second Flash partition Flash Bank 2, and the partition exchange code is stored in the second read-only Flash partition ROM2 of the second Flash partition Flash Bank 2.
Specifically, the control chip can program the updated application code in the first read-only Flash partition ROM1 of the second Flash partition Flash Bank 2 while executing the updated application code in the first read-only Flash partition ROM1 of the first Flash partition Flash Bank 1.
Step S200, the control chip is electrified, the control chip is started from the Flash Bank 1 of the first Flash memory partition by default, a control chip starting code is executed, a read-write section in the Flash memory partition is copied to the static random access memory partition, external equipment is initialized, and a main circulation program is entered.
In step S210, the content of the data segment that can be reinitialized is copied to the first read-write partition SRAM1.
In step S220, the content of the data segment that is not reinitialized is copied to the second read-write partition SRAM2.
Step S300, executing a Bank switching instruction; the control chip executes the partition exchange code of the second read-only Flash partition ROM2 area of the first Flash partition Flash Bank 1, and starts the memory remapping control function.
Step S310, the address space of the first Flash memory partition Flash Bank 1 is exchanged with the address space of the second Flash memory partition Flash Bank 2.
Specifically, as shown in fig. 2, in the normal mode, the address space of the first Flash memory partition Flash Bank 1 is 0x0800 0000 to 0x0803 FFFF, and the address space of the second Flash memory partition Flash Bank 2 is 0x0804 0000 to 0x0807 FFFF; when the memory remapping function is enabled, two independent Flash memory partition address spaces are exchanged, namely, the address space of the first Flash memory partition Flash Bank 1 is 0x0804 0000 to 0x0807 FFFF, and the address space of the second Flash memory partition Flash Bank 2 is 0x0800 0000 to 0x0803 FFFF.
In step S400, the CPU state of the central processing unit remains unchanged, and the control chip obtains and executes the next instruction from the second Flash partition Flash Bank 2, guides to the first read-only Flash partition ROM1 of the second Flash partition Flash Bank 2, and executes the updated application program code.
In step S410, the first read-only Flash partition ROM1 of the second Flash partition Flash Bank 2 reinitializes the first read-write partition SRAM1, and the contents of the second read-write partition SRAM2 remain unchanged.
Specifically, the content of the second read-write partition SRAM2 is kept unchanged, that is, before and after the execution of the Bank swap instruction, the content of the second read-write partition SRAM2 shared by the first Flash partition Flash Bank 1 and the second Flash partition Flash Bank 2 is unchanged, so that the key working state of the device is kept unchanged.
Preferably, the control chip includes two independent Flash memory partitions, the two independent Flash memory partitions are a first Flash memory partition Flash Bank 1 and a second Flash memory partition Flash Bank 2, each Flash memory partition includes a first read-only Flash memory partition ROM1 and a second read-only Flash memory partition ROM2, and the two first read-only Flash memory partitions ROM1 store application program codes with changeable contents; the two second read-only flash memory partition ROMs 2 store the same partition exchange code.
Specifically, the contents stored in the two second read-only flash memory partitions ROM2 are consistent; the content stored in the two first read-only Flash memory partitions ROM1 is allowed to be different, wherein the first read-only Flash memory partition ROM1 of the first Flash memory partition Flash Bank 1 stores application program codes before updating, and the first read-only Flash memory partition ROM1 of the second Flash memory partition Flash Bank 2 stores application program codes after updating.
Preferably, the control chip further comprises a static random access memory partition, the static random access memory partition comprises a first read-write partition SRAM1 and a second read-write partition SRAM2, and the first read-write partition SRAM1 stores data segment contents capable of being reinitialized; the second read-write partition SRAM2 stores the contents of the data section which cannot be reinitialized.
Specifically, as can be seen from fig. 2, the method of the present invention first needs to have a dual flash memory storage partition for the control chip used and a memory remapping control function. In the normal mode, the address space of the first Flash memory partition Flash Bank 1 is 0x0800 0000 to 0x0803 FFFF, and the address space of the second Flash memory partition Flash Bank 2 is 0x0804 0000 to 0x0807 FFFF. When the memory remapping function is enabled, two independent Flash memory partition address spaces will be swapped, i.e. the address space of the first Flash memory partition Flash Bank 1 is 0x0804 0000 to 0x0807 FFFF, and the address space of the second Flash memory partition Flash Bank 2 is 0x0800 0000 to 0x0803 FFFF. As can be seen from fig. 3, the method of the present invention requires a requirement for content and address space allocation for firmware programs, and can be divided into an application code area (ROM 1) with variable content and a Bank exchange code (ROM 2) with fixed content/address in an independent Flash partition (Flash Bank). In a common static random access memory partition (SRAM), it is divided into a data section (SRAM 1) that can be reinitialized and a data section (SRAM 2) that cannot be reinitialized.
As shown in fig. 1, the control chip is powered on by default and started from the first Flash memory partition Flash Bank 1, and after executing the start code and the initialization code in sequence, enters a main loop to wait for a Bank exchange instruction, and after receiving the Bank exchange instruction, the program executes the ROM2 area fixed code of the first Flash memory partition Flash Bank 1 to perform memory remapping operation. Because the address space of the ROM2 area fixed code of the second Flash memory partition Flash Bank 2 is consistent with the ROM2 area of the first Flash memory partition Flash Bank 1, under the condition that the CPU state is unchanged, the program can execute the ROM1 area application program of the second Flash memory partition Flash Bank 2, and the firmware real-time update of the control chip without resetting is realized.
And a firmware real-time updating system of a non-reset control chip for realizing the firmware real-time updating method of the non-reset control chip, the system comprises:
the Flash memory partition unit comprises a first Flash memory partition Flash Bank 1 and a second Flash memory partition Flash Bank 2, and is used for storing application program codes and partition exchange codes before and after updating;
a static random access memory partition unit including a first read-write partition SRAM1 and a second read-write partition SRAM2 for storing a re-initializable data segment and a non-re-initializable data segment;
and the command execution unit comprises a control chip and is used for executing the application program codes in the flash memory partition unit.
And a computer-readable storage medium having stored thereon a computer program for execution by a processor to implement a firmware real-time update method of a non-reset control chip as described above.
In the method, the system and the computer readable storage medium for updating the firmware of the non-reset control chip in real time, the control chip of the device uses the singlechip with the double flash memory partitions and has the control function of memory remapping, so that the control chip programs new firmware for the flash memory partitions while executing the function of an old firmware application program, and performs the new firmware by seamless exchange through the memory remapping function, thereby completing the real-time updating of the firmware of the non-reset control chip. From the perspective of a terminal user, the invention ensures that the normal use of the user is not influenced when the product is upgraded, and provides the stability, the safety and the usability of the terminal use. From the service life of the product, two version areas on the flash memory are used alternately, and the flash memory is started to run from another area next time after the updating is successful. The method of the invention is simple, easy to realize, low in cost and convenient to popularize.
It should be noted that the above-mentioned embodiments are merely preferred embodiments of the present invention, and are not intended to limit the present invention, but various modifications and variations of the present invention will be apparent to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
1. A method for updating firmware in real time without resetting a control chip having a dual memory partition flash memory, the method comprising the steps of:
step one, the application program codes and the partition exchange codes before updating are stored in a first Flash memory partition Flash Bank 1 of the control chip, and the updated application program codes and the partition exchange codes are stored in a second Flash memory partition Flash Bank 2 of the control chip;
step two, the control chip is electrified, the control chip is started from the Flash Bank 1 of the first Flash memory partition by default, a control chip starting code is executed, a read-write section in the Flash memory partition is copied to the static random access memory partition, external equipment is initialized, and a main circulation program is entered;
step three, executing a Bank switching instruction; the control chip executes the partition exchange code of the second read-only Flash partition ROM2 area of the first Flash partition Flash Bank 1, and starts the memory remapping control function;
and step four, the CPU state of the central processing unit is kept unchanged, the control chip acquires and executes the next instruction from the second Flash partition Flash Bank 2, guides the next instruction to the first read-only Flash partition ROM1 of the second Flash partition Flash Bank 2, and executes the updated application program code.
2. The method for updating firmware of a non-reset control chip according to claim 1, wherein said control chip has a memory remapping control function, and a stack, a register and a PC pointer thereof are kept unchanged.
3. The method for updating firmware of a non-reset control chip according to claim 2, wherein the control chip comprises two independent Flash memory partitions, the two independent Flash memory partitions are respectively a first Flash memory partition Flash Bank 1 and a second Flash memory partition Flash Bank 2, each Flash memory partition comprises a first read-only Flash memory partition ROM1 and a second read-only Flash memory partition ROM2, and the two first read-only Flash memory partition ROMs 1 store application program codes with changeable contents; the two second read-only flash memory partition ROMs 2 store the same partition exchange code.
4. The method for updating firmware of a non-reset control chip according to claim 2, wherein the control chip further comprises a static random access memory partition, the static random access memory partition comprises a first read-write partition SRAM1 and a second read-write partition SRAM2, and the first read-write partition SRAM1 stores a re-initializable data segment content; the second read-write partition SRAM2 stores the contents of the data section which cannot be reinitialized.
5. The method for updating firmware of a non-reset control chip in real time as claimed in claim 3, wherein the step of storing the updated application code and partition exchange code in the first Flash memory partition Flash Bank 1 of the control chip and storing the updated application code and partition exchange code in the second Flash memory partition Flash Bank 2 of the control chip specifically comprises:
step 1.1, storing application program codes before updating in a first read-only Flash partition ROM1 of a first Flash partition Flash Bank 1, and storing partition exchange codes in a second read-only Flash partition ROM2 of the first Flash partition Flash Bank 1;
step 1.2, the updated application code is stored in the first read-only Flash partition ROM1 of the second Flash partition Flash Bank 2, and the partition exchange code is stored in the second read-only Flash partition ROM2 of the second Flash partition Flash Bank 2.
6. The method for updating firmware of a non-reset control chip according to claim 4, wherein the step of copying the read/write section in the flash memory partition to the sram partition in the second step comprises:
step 2.1, copying the content of the data segment which can be reinitialized to a first read-write partition SRAM1;
and 2.2, copying the content of the data segment which cannot be reinitialized to the second read-write partition SRAM2.
7. The method for updating firmware of a non-reset control chip according to claim 1, wherein the specific step of turning on the memory remapping control function in step three comprises:
step 3.1, the address space of the first Flash memory partition Flash Bank 1 is exchanged with the address space of the second Flash memory partition Flash Bank 2.
8. The method for updating firmware of a non-reset control chip according to claim 4, wherein the control chip in the fourth step obtains and executes the next instruction from the second Flash partition Flash Bank 2, and further comprises the following steps:
step 4.1, the first read-only Flash partition ROM1 of the second Flash partition Flash Bank 2 reinitializes the first read-write partition SRAM1, and the content of the second read-write partition SRAM2 remains unchanged.
9. A real-time firmware updating system of a non-reset control chip for implementing the real-time firmware updating method of a non-reset control chip according to any one of claims 1 to 8, the system comprising:
the Flash memory partition unit comprises a first Flash memory partition Flash Bank 1 and a second Flash memory partition Flash Bank 2, and is used for storing application program codes and partition exchange codes before and after updating;
a static random access memory partition unit including a first read-write partition SRAM1 and a second read-write partition SRAM2 for storing a re-initializable data segment and a non-re-initializable data segment;
and the command execution unit comprises a control chip and is used for executing the application program codes in the flash memory partition unit.
10. A computer-readable storage medium having stored thereon a computer program for execution by a processor to implement the method for firmware real-time update of a non-reset control chip according to any one of claims 1-8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410061190.1A CN117573175B (en) | 2024-01-16 | Firmware real-time updating method, system and storage medium for non-reset control chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410061190.1A CN117573175B (en) | 2024-01-16 | Firmware real-time updating method, system and storage medium for non-reset control chip |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN117573175A true CN117573175A (en) | 2024-02-20 |
| CN117573175B CN117573175B (en) | 2024-06-21 |
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