LU59536A1 - - Google Patents

Info

Publication number
LU59536A1
LU59536A1 LU59536A LU59536A LU59536A1 LU 59536 A1 LU59536 A1 LU 59536A1 LU 59536 A LU59536 A LU 59536A LU 59536 A LU59536 A LU 59536A LU 59536 A1 LU59536 A1 LU 59536A1
Authority
LU
Luxembourg
Application number
LU59536A
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of LU59536A1 publication Critical patent/LU59536A1/xx

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/06—Time-space-time switching
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0626—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators
    • H04J3/0629—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators in a network, e.g. in combination with switching or multiplexing, slip buffers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0676—Mutual

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
LU59536A 1968-10-02 1969-09-30 LU59536A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE1800726 1968-10-02

Publications (1)

Publication Number Publication Date
LU59536A1 true LU59536A1 (de) 1970-01-09

Family

ID=5709404

Family Applications (1)

Application Number Title Priority Date Filing Date
LU59536A LU59536A1 (de) 1968-10-02 1969-09-30

Country Status (13)

Country Link
JP (1) JPS5038285B1 (de)
AT (1) AT300906B (de)
BE (1) BE739731A (de)
CH (1) CH518657A (de)
DE (1) DE1800726B1 (de)
DK (1) DK131450B (de)
FR (1) FR2019667A1 (de)
GB (1) GB1257124A (de)
LU (1) LU59536A1 (de)
NL (1) NL6914413A (de)
RO (1) RO64752A (de)
SE (1) SE362181B (de)
SU (1) SU608491A3 (de)

Also Published As

Publication number Publication date
SE362181B (de) 1973-11-26
JPS5038285B1 (de) 1975-12-09
SU608491A3 (ru) 1978-05-25
RO64752A (fr) 1978-11-15
BE739731A (de) 1970-04-02
NL6914413A (de) 1970-04-06
AT300906B (de) 1972-08-10
DK131450C (de) 1975-12-01
DE1800726B1 (de) 1970-05-27
FR2019667A1 (de) 1970-07-03
GB1257124A (de) 1971-12-15
DK131450B (da) 1975-07-14
CH518657A (de) 1972-01-31

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