LU58605A1 - - Google Patents
Info
- Publication number
- LU58605A1 LU58605A1 LU58605DA LU58605A1 LU 58605 A1 LU58605 A1 LU 58605A1 LU 58605D A LU58605D A LU 58605DA LU 58605 A1 LU58605 A1 LU 58605A1
- Authority
- LU
- Luxembourg
Links
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/58—Random or pseudo-random number generators
- G06F7/582—Pseudo-random number generators
- G06F7/584—Pseudo-random number generators using finite field arithmetic, e.g. using a linear feedback shift register
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
- H04L9/065—Encryption by serially and continuously modifying data stream elements, e.g. stream cipher systems, RC4, SEAL or A5/3
- H04L9/0656—Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher
- H04L9/0662—Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher with particular pseudorandom sequence generator
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/58—Indexing scheme relating to groups G06F7/58 - G06F7/588
- G06F2207/581—Generating an LFSR sequence, e.g. an m-sequence; sequence may be generated without LFSR, e.g. using Galois Field arithmetic
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/58—Indexing scheme relating to groups G06F7/58 - G06F7/588
- G06F2207/583—Serial finite field implementation, i.e. serial implementation of finite field arithmetic, generating one new bit or trit per step, e.g. using an LFSR or several independent LFSRs; also includes PRNGs with parallel operation between LFSR and outputs
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Pure & Applied Mathematics (AREA)
- Computational Mathematics (AREA)
- Signal Processing (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Computer Networks & Wireless Communication (AREA)
- General Engineering & Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Algebra (AREA)
- Mathematical Physics (AREA)
- Probability & Statistics with Applications (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
LU58605 | 1969-05-08 |
Publications (1)
Publication Number | Publication Date |
---|---|
LU58605A1 true LU58605A1 (fr) | 1969-08-22 |
Family
ID=19726028
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
LU58605D LU58605A1 (fr) | 1969-05-08 | 1969-05-08 |
Country Status (2)
Country | Link |
---|---|
FR (1) | FR2044948A5 (fr) |
LU (1) | LU58605A1 (fr) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0318140A2 (fr) * | 1987-10-23 | 1989-05-31 | Control Data Corporation | Générateur pseudo-aléatoire et circuit de somme de vérification pour puce VLSI |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2124320C1 (de) * | 1971-05-17 | 1978-04-27 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Elektrische Schaltung zur Erzeugung einer Vielzahl verschiedener Codes |
FR2519828B2 (fr) * | 1982-01-11 | 1986-01-31 | Telediffusion Fse | Systeme de videotex muni des moyens de controle d'acces a l'information |
JPH03278711A (ja) * | 1990-03-28 | 1991-12-10 | Ando Electric Co Ltd | M系列擬似ランダムパターン発生回路 |
US5420925A (en) * | 1994-03-03 | 1995-05-30 | Lectron Products, Inc. | Rolling code encryption process for remote keyless entry system |
-
1969
- 1969-05-08 LU LU58605D patent/LU58605A1/xx unknown
- 1969-05-27 FR FR6917237A patent/FR2044948A5/fr not_active Expired
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0318140A2 (fr) * | 1987-10-23 | 1989-05-31 | Control Data Corporation | Générateur pseudo-aléatoire et circuit de somme de vérification pour puce VLSI |
EP0318140A3 (fr) * | 1987-10-23 | 1991-01-02 | Control Data Corporation | Générateur pseudo-aléatoire et circuit de somme de vérification pour puce VLSI |
Also Published As
Publication number | Publication date |
---|---|
FR2044948A5 (fr) | 1971-02-26 |