LU101923B1 - Boost converter for a power supply for an electrical load, and power supply and method for boosting the input voltage in a power supply for an electrical load - Google Patents

Abstract

The invention relates to a step-up converter for a power supply for an electrical consumer, having a rectifier or pole changer circuit (D1, D2; S3, S4), an inductor (L1) and a filter capacitor (C1), the inductor (L1) being connected to one pole an AC voltage source (ACin) and to a node (P1) between two semiconductor switches (S1 and S2). According to the invention, the first semiconductor switch (S1) is connected in series with a measuring resistor (R1). The step-up converter has a signal generation unit (110) for generating drive signals for the two semiconductor switches (S1, S2), with the first semiconductor switch (S1) being closed and the second semiconductor switch (S2) being opened for step-up conversion of the input voltage when the input voltage (Vm) is positive is used to drive a current through the inductor (L1) to magnetize the inductor (L1). To demagnetize the inductance (L1), the first semiconductor switch (S1) is opened and the second semiconductor switch (S2) is closed and the filter capacitor (C1) is charged accordingly. The signal generation unit (110) has means for detecting the current through the measuring resistor (R1), in particular at the beginning of the phase for magnetizing the inductance (L1). This boost converter (100) can be used advantageously as a power factor pre-regulator in power supplies.

Description

4 LU101923 |

Step-up converter for a power supply of an electrical consumer | and | Input voltage in a power supply of an electrical consumer |

The present invention relates to a step-up converter for a power supply for supplying an electrical load.

The invention . further relates to a power supply that has a boost converter according to the. invention has.

The step-up converter can be used in particular as a power factor pre-regulator in a switched-mode power supply.

The |

The invention further relates to a method for upconverting the | Input voltage in a power supply of an electrical consumer. | Power supplies are required for a wide range of areas and purposes. |

Since the term power supply is used in many ways, the ]

Term converter used.

They have the task of controlling the current flow between | to control current source and load or from one current type to another | to reshape.

They belong to the sub-area of power electronics within the | Electrical engineering.

There are the following types of power converters: rectifiers, | Inverters, DC converters and AC converters.

To these | different power converters also include the power supply units, also known as | Power supplies are called.

You have the task electronic | To supply equipment with a DC voltage.

A distinction is made between linear | Power supplies and switching power supplies.

The switched-mode power supplies also belong to | the regulated power supplies. |

1 shows the basic structure of a switched-mode power supply.

It consists of | the components active PFC circuit 10, DC converter 20, | Power transmission level 30, smoothing 40, control level 50, electrical isolation |

60 and control 70. At the input of the switching power supply is the |

Mains voltage from the public power supply network.

As an example, | the AC voltage with the effective value of 230 V and a mains frequency | of 50 Hz.

In the active PFC circuit 10, the following three | components must be present, mains filter 1, step-up converter 2 and |

2 LU101923 A filter capacitor 3. The output of the active PFC circuit 10 is a high . DC voltage, which affects e.g. the voltage value 400 V. This | DC voltage is converted into a square-wave signal by the DC converter 20 . chopped up. Inside is a power transistor, e.g. bipolar transistor 4, Ë MOSFET transistor, according to Metal Oxide Semiconductor Field Effect . Transistor, Thyristor or IGBT, corresponding to Insulated Gate Bipolar Transistor, | which generates the square-wave signal through switching operations. By changing the | Different voltages and | Adjust currents and thus also different services. For the control | of the circuit breakers, the technologies used are mainly pulse-width | modulation (PWM) and pulse train modulation (PFM). | For power supplies designed for power ranges of 75 W and more, | it dictates that they use PFC technology, according to Power Factor | Correction, to avoid repercussions on the power supply network by generating harmonics. | This is also defined in the European standard EN61000-3-2. For this, | often an active PFC circuit is used. This consists of a type | additional switched-mode power supply, which is connected upstream of the actual one, and | ensures that the current drawn corresponds to the sinusoidal mains voltage i. As a result, the current follows a course similar to that of a resistor at the | current mains voltage would cause. Thus, with a not exactly ; sinusoidal mains voltage, as it often occurs in power grids, the . the actual course — not the idealized one — of the mains voltage is traced. .

The power factor remains close to one and fewer | harmonics. Otherwise, these could "rock up" and | lead to overloading of the power grid. The power factor gives the | ratio of active power to apparent power. Is the phase shift | between zero current and voltage, active power and apparent power are equal | and the power factor remains at unity. If between voltage and current | noticeable phase differences exist, power flows back to the | power plant and the power factor drops below one. Active PFC | Circuits usually consist of a rectifier with direct |

3 LU101923 .

downstream step-up converter, which has a large-capacity capacitor.

to a voltage above the peak voltage of the AC mains voltage, .

e.g. 400 V, charges. This then becomes the actual consumer | (Switching power supply or e.g. electronic ballast of fluorescent lamps).

provided. A step-up converter is also referred to as a step-up converter. it . is a flyback converter in which a coil inducts a current through the | Load drives when the switching transistor blocks. | 2 shows the basic circuit diagram of an up-converter which is in a | such active PFC circuit can be used. By operating | Boost converter circuits in the so-called boundary conduction mode.

low-loss switching of commonly used MOSFET |. Semiconductor switches S reached. Here, the step-up converter 100 is in the vicinity of | the gap limit of the inductor current IL operated so that both currentless | Switching on, so-called “Zero Current Switching” (ZCS), as well as |! Voltage-free switching, so-called "Zero Voltage Switching" (ZVS), the . switch S is enabled. The inductor L1 of the step-up converter 100 and the | Output capacity of the semiconductor switch Coss form a. series resonant circuit. This resonant circuit is within half.

Period duration of its natural frequency reloaded, so that at | change of sign of the inductor current IL, the output capacitance Coss on the | twice the value of the boost converter input voltage Vin, minus the | Boost converter output voltage Vout is reloaded. As a result, at . switching on the semiconductor switch S again, the switching voltage and the | Inrush current and thus the switching losses are reduced. Such switching losses | arise when the semiconductor switch S is current-carrying. After the | Ohm’s law applies, P = U*I. The power loss P, which is in the | Semiconductor switch S is converted into heat is therefore dependent on how | high is the voltage that is applied. .

In Fig. 3 are voltage and current curve over a complete. Switching period of the semiconductor switch S shown. The course of the current I. is | triangle-shaped. During the switch-on phase ton, the current through the |

4 LU101923 | Choke coil L1 linearly on. During the tor off phase, the current falls through .

the choke coil L1 decreases linearly. In the phase tres, which is half the period | the resonant frequency of the oscillating circuit consisting of choke coil L1 and | Corresponds to capacity of the semiconductor switch S, even the changes.

current direction. The temporal relationships are made up as follows: | ton = DO .

Îres = TT * JL+Cosc | Pin is the input power and L is the inductance of the choke coil | L1 In order to switch the semiconductor switch with as little loss as possible. guarantee, the period duration Ts of a switching cycle must not be shorter | as: | Tsmin = ton + tors + tres: © This ensures that the transistor capacitance of the semiconductor switch | S can be discharged for lossless switching. | In particularly loss-optimized applications, a .

conventional step-up converter according to Fig. 2 a half-bridge PFC circuit | with at least two active semiconductor switches S1, 82 are used. This is in | 4 shown. In this case, the diode D from FIG. 2 is replaced by a further | Semiconductor switch S2 replaced. | The chronological relationships that apply to the circuit according to FIG US Pat. No. 8,766,605 B2 relating to the use of a half-bridge | PFC circuit explained. The term half-bridge PFC- | Circuit expressed that both the positive and the negative | Half-wave is upconverted by the same semiconductor switch branch. | However, this makes a polarity reversing circuit necessary, which circuit |

LU101923 | 5 shows the chronological sequence of the drive signals of the semiconductor switches |! S81 and S2 shown for a positive input voltage Vin. The | Control signals are generated by setting current thresholds In and |; | 5 generated. For this purpose, the current must be measured and marked with | predetermined values are compared. A The condition for turning off S1 and turning on S2 is in | In this case, exceeding the current threshold In of the inductor current |. doing | the current threshold In for the respective operating point is controlled by a current controller | predetermined. The condition for turning off S2 and turning on | 81 is in this case falling below the current threshold |; of the inductor current .

I. The current threshold I; is statically specified and their position ensures a | complete charge reversal from the capacity Cosc of the semiconductor switch S1. | This remains in contrast to the circuit in Fig. 2, in which the diode D! Determines the reloading process, the switch S2 is switched on until a | complete reloading of the capacitance Cosc to 0 V has taken place. After that . Semiconductor switch S1 switched on and S2 switched off at the same time, so that the current IL | can commutate from 82 to 81 and the direction of the current IL changes again ©. A new cycle begins with the magnetization of the | choke coil. | Details of this control method are in the documents US | 20070109822 A1 and US 8026704 B2. | An alternative method for generating the control signals for the | Semiconductor switches S1 and S2 is from a doctoral thesis "Current Mode Control | structure: Current-Mode Control: Modeling and Digital Application”, by Jian Li, | April 14, 2009, Blacksburg, Virginia Polytechnic Institute and State University, | famous. To generate the switching times tons1 and tonsz, the | Semiconductor switches S1 and S2 comparators are used, the through the current |

6 LU101923 j IL caused voltage drop in a sense resistor with | Compare voltage thresholds. .

From the document “LED Application Design Using BCM Power Factor | Correction (PFC) Controller for 100W Lightning System™; AN-9731, 02011 . Fairchild Semiconductor Corporation Rev. 1.0.0, 3/24/11 is a Circuit Design | for a PFC circuit that operates in the so-called "Boundary Conduction Mode". (BCM) is known. | The methods mentioned for generating the control signals for | Boost converter topologies operating with 2 power switches S1, S2, | need all the information about the course of the current through the inductance | L to generate the control signals with comparators. The featured | However, solutions only allow this by accepting considerable disadvantages. | In one solution, the current |L is measured directly with a | Sense resistor (shunt) in the current path of I. using a circuit | for potential isolation, which brings the signal to the measuring potential. | Disadvantages: a. Electrical isolation circuits are more expensive | b. Electrical isolation circuits often only have a low | bandwidth and reproduce the signal distorted. | In the other solution, the current is measured with current transformers in | the individual current switch paths using additional switching means for | Degaussing of the current transformers and additional switching devices in order to | measure current bidirectionally. | Disadvantages: | c. It is complex switching means with many.

Components | i.e. Current transformers are usually more expensive than current sense resistors | (shunts). They usually measure the current indirectly via a |

7 LU101923 ' Measurement of the magnetic field strength of the magnetic field created by the | Current flow is generated using coils or Hall sensors. | It is therefore an object of the invention to provide an up-converter for | Provide power supplies that overcome the above disadvantages | avoids. In doing so, the inventors recognized that the potential for the | Measurement and control circuits, as usual, rely on the low-noise potential of the | negative intermediate circuit voltage should be applied. In addition, a most favorable current measurement with the help of only one measuring resistor in the | Current path with little additional circuitry for detecting the current | enough. ' This object is achieved by a step-up converter according to claim 1, a power supply of an electrical load according to claim 12 and a | Method of stepping up the input voltage in a | Power supply according to claim 14 solved. | The dependent claims contain advantageous developments and | Improvements of the invention as described below. | 20 . In a general embodiment, the invention relates to a boost converter.

for a power supply of an electrical consumer, having a |] rectifier or polarity reversing circuit, an inductor and a | Filter capacitor, with the inductance connected to one pole of the | AC voltage source is connected and connected to a node between | two semiconductor switches. This upshifter is characterized by | that the first semiconductor switch is connected in series with a measuring resistor | is, and a signal generating unit for generating drive signals for | has the two semiconductor switches, wherein for upconversion the | input voltage with a positive input voltage of the first semiconductor switch | is closed and the second semiconductor switch is opened to a | Driving current through the inductance to magnetize the inductance. To | demagnetization of the inductance, the first semiconductor switch is opened and |

8 LU101923 É the second semiconductor switch is closed and the filter capacitor | loaded accordingly.

The signal generation unit has means for | Detection of the current through the measuring resistor at the beginning of the phase to | Magnetization of the inductance and a filter capacitor, where the |

Inductance is connected to one pole of the AC voltage source and to | a node between two semiconductor switches.

In a preferred | Characteristic is the first semiconductor switch in series with a measuring resistor | connected to measure the current flowing through the first semiconductor switch | flows.

In this case, a signal generation unit | provided for the generation of control signals for the two | semiconductor switch.

For step-up input voltage with positive | Input voltage, the first semiconductor switch is closed and the second. Semiconductor switch opened to drive a current through the inductor to . Magnetization of the inductance.

To demagnetize the inductance, ; the first semiconductor switch is open and the second semiconductor switch | closed.

Thus, in the demagnetization phase, the filter capacitor | loaded accordingly.

Furthermore, the signal generation unit has means | for detecting the current through the measuring resistor at the beginning of the phase to | Magnetization of the inductance with a positive input voltage.

The | Invention offers the advantage that a possible lossless switching of the. Semiconductor switch is possible.

Particularly disturbing for lossless switching | is namely the capacitance of the semiconductor switch.

It creates tension. during the switching process, which together with the remaining current flow | leads to a power loss in the semiconductor switch.

To losslessly | switch, the fullest possible discharge of the capacity of the N semiconductor switch is required.

A current measurement is required for this.

A . The particular advantage of the circuit is that a simple measuring resistor | sufficient for the current measurement. | In a further development of the invention, the | Input AC voltage with negative input voltage of the first | Semiconductor switch opened and the second semiconductor switch closed to | to drive a current through the inductance to magnetize the |

| 9 LU101923 |

Inductance, with the demagnetization of the inductance of the first: semiconductor switch is closed and the second semiconductor switch is opened. will. in the demagnetization phase, the filter capacitor . loaded accordingly.

The signal generation unit has means for:

Detection of the current through the measuring resistor at the end of the phase to ; Demagnetization of the inductance.

This variant of the invention allows | Lossless switching of the semiconductor switches by adapting the control signals | the semiconductor switch even when the negative half-wave of the | AC input voltage.

Thus, the invention makes it possible to dispense with a;

Half-wave rectification, which would incur additional costs. . For the lossless possible switching, it is also advantageous if the. Signal generation unit has a calculation unit that. Control cycle time for the phases for magnetization and demagnetization per :

Control cycle depending on the input voltage and : Output voltage pre-calculated.

A control cycle consists of the | Phases for magnetization and demagnetization.

The | Signal generation unit continues to have a control stage based on | the difference between the measured current value through the measuring resistor | and a current reference value, a correction value for the control cycle time; calculated.

Thus, various factors for a more accurate | Calculation of the control cycle time would be required, disregarded; will.

Some factors, such as component scatter, are unavoidable and | could only be captured with great effort.

Also, some |

Factors may be aging, resulting in more effort for their | consideration means. |

It is particularly advantageous for lossless switching if the correction value | in a timer unit of the signal generation unit for the subsequent |

Control cycle is applied so that the timer unit the | Control cycle time shortened or lengthened accordingly.

The | Signal generation unit generates the control signals for the semiconductor switches. |

10 LU101923 |

It is also advantageous that the signal generation unit has another. Has control level from the difference between predetermined | Output voltage and measured output voltage a | Magnetization time calculated.

This corresponds to a voltage regulator using | outputs a controlled variable to keep the output voltage constant. | To generate the control signals for the semiconductor switches, it is advantageous. if the signal generation unit comprises a further timer unit to which | the calculated magnetization time is passed on, in which the calculated ;

Magnetization time for a number of subsequent control cycles to | application comes.

The control signals are in the form of PWM signals | generated.

Due to the separate timing units, the duty cycle of the | PWM signals can be set variably. |

An advantageous variant is that the number of control cycles, | for which the calculated magnetization time is used, for a | half wave of the AC input voltage is valid.

The magnetization time | is kept constant over a half cycle for the sake of simplicity, while the | demagnetization time is adjusted. |

| It is also advantageous for the signal generation unit to have a | AC input voltage detection unit which is used for | Determination of the phase position of the AC input voltage is set up, and | the information about the phase position, in particular whether the positive half-wave | or negative half-wave of the AC input voltage is present, to a configuration unit of the signal generation unit.

The way the | of the inventive step-up converter is | for the positive and negative half-wave the AC input voltage is different.

Therefore the recording of the . Phase position advantageous. | a | In this regard, a further advantageous variant is that the | configuration unit is set up, a number of the components of the | Signal generation unit to be configured for operation with positive |

11 LU101923 | input voltage or with a negative input voltage, depending on what the | Information about the phase position of the AC input voltage indicates. It is | usual to configure the various components via register entries, | what can be done by the configuration unit. | To detect the current when discharging the capacitance of the | Semiconductor switch, it is advantageous to the measuring resistor between the first | Semiconductor switch and the return line to the input AC voltage source to.

which the inductance is not connected to switch. : | A choke coil | deployed. This can be defined by the number of windings and sections or | Upsetting and geometric design can be precisely adjusted. ; In a further embodiment, the invention consists of a power supply. an electrical consumer, which is a step-up converter according to the invention. has, The upconverter according to the invention can particularly | advantageous as a step-up converter for power factor pre-regulation in the ; serve power supply. | | Such power factor pre-regulation stages can be used particularly advantageously in | Use switching power supplies. | A further embodiment of the invention consists in a method for | Up-conversion of the input voltage in a power supply of a | electrical consumer. In this case, the up-wander has a . rectifier circuit, an inductor and a filter capacitor, where ; the inductance is connected to one pole of the input voltage source and to | a node between two semiconductor switches. Furthermore, a | Signal generation unit available for generating control signals for the. Semiconductor switch, the first semiconductor switch being closed for step-up conversion of the input voltage when the input voltage is positive and | the second semiconductor switch is opened to allow a current through the inductance |

12 LU101923 : to drive, to magnetize the inductance, and where to | Demagnetization of the inductance of the first semiconductor switch is opened and | the second semiconductor switch is closed and the filter capacitor | is loaded accordingly. The method is characterized in that | the current through the measuring resistor at the beginning of the phase to . Magnetization of the inductance is measured and a control cycle time for | the phases for magnetization and demagnetization per control cycle in | Dependence on the input voltage and output voltage | is predicted. A correction value for the control cycle time is calculated by a control stage based on the x difference between the measured current value through the measuring resistor and i a current reference value, .

by which the predicted control cycle time is corrected. So become | Deviations in the precalculated control cycle time are corrected and it | becomes the desired demagnetization time after a number of control cycles.

achieved, which leads to the complete discharge of the capacitance of the semiconductor switch: In this regard, there is a particular advantage in the fact that with this method | the current through the measuring resistor is measured at specified times, |! by the pre-calculated control cycle time and by the correction value | corrected, specified. For the invention it is sufficient to only switch the current | to measure these points in time, which is possible with inexpensive AD converters.

Several exemplary embodiments of the invention are described below with reference to the in | Figures shown in the drawings explained in more detail. Show it: | 1 shows a basic circuit diagram of a switched-mode power supply; | 2 shows a basic circuit diagram of a half-bridge PFC circuit with a | semiconductor switches; |

43 LU101923 .

3 shows the course of the current through the inductance of the half-bridge PFC circuit | 2 and the voltage curve at the semiconductor switch S due to | its drain-source capacitance; .

4 shows a basic circuit diagram of a half-bridge PFC circuit with two. semiconductor switches; | 5 shows the course of the current through the inductance of the half-bridge PFC circuit | 4 and the voltage curve at the semiconductor switch S1 | due to its drain-source capacitance; | 6 shows a basic circuit diagram of a half-bridge PFC circuit with two | semiconductor switches and polarity changer circuit; .

7 shows a basic circuit diagram of a half-bridge PFC circuit with two | Semiconductor switches, whereby the pole changer circuit is realized with diodes | 8 shows the course of the current through the inductance of the half-bridge PFC circuit; according to FIG. 7 with a positive half-cycle of the input voltage; | 8 shows the course of the current through the inductance of the half-bridge PFC circuit according to FIG. 7 with a negative half-cycle of the input voltage; and | 10 shows a block diagram of a signal generation unit of the half-bridge PFC circuit. .

The present description illustrates the principles of | disclosure of the invention. It is thus understood that professionals in the | will be able to conceive different implementations, although here | are not explicitly described, but the principles of the invention | embody revelation and should also be protected in its scope. |

14 LU101923 | As described, there is the approach of a PFC circuit in the boundary | Operate in Conduction Mode (BCM). The time ton becomes the repeated | Magnetizing the inductance L over a sine half-wave of . Mains AC voltage kept constant. This time is proportional to | Power output of the switching power supply and is controlled by a voltage regulator | specified, which corresponds to the output voltage of the circuit, e.g. 400 V, | should keep constant. | In addition, the time for demagnetizing the inductance L must be set | will. In the publication mentioned, this is done by generating a | Zero Current Detection (ZCD) signal generated by the reloading process of a | Diode is caused. However, this can be done in a | Boost converter circuit, in which the function of the diode is realized by a - current switch, but do not generate it, since this current switch is not | blocked by itself. | In order to solve this problem, it is proposed according to the invention that | Precalculate the point in time at which the second power switch is to switch off.

and adjust the demagnetization time accordingly. .

| The demagnetization time (off time) in which the first current switch S1 is opened | and the second S2 is closed is calculated as follows from the time ton to | Magnetize: | torr = TV. # ton- | Since the calculation is affected by component tolerances and other factors such as | Delays in generating control signals in driver stages, etc. | can deviate, it must be checked whether the | desired current value in the inductor L has been reached. |

15 LU101923 | To do this, the required information of the stream from the path of the first | Semiconductor switch S1 are used. With the help of a | current measuring resistor, a measuring voltage can be generated which | is proportional to the current through the semiconductor switch S1. | 6 shows a basic circuit diagram of the half-bridge PFC circuit according to the invention Circuit. The sinusoidal mains voltage with 230 V effective value and 50 Hz | Mains frequency is present at input ACin. In the top line is a | Choke coil L1 switched. In the example, it has an inductance of 64 uH. | This line goes to a node P1, which is connected on the one hand to the drain output of a first semiconductor switch S1. On the other hand | the node P1 is connected to the source input of a second | Semiconductor switch S2 in connection. Both semiconductor switches S1 and S2 are configured as | nMOSFET type field effect transistors. Instead, | other semiconductor switches such as bipolar transistors, thyristors or IGBTs | be used. They are used to rectify the input signal and | chop up To do this, they are switched at a relatively high frequency, e.g. 100 kHz. The drive signal CTRL1 is applied to the gate of the field effect transistor | S1 created. The control signal CTRL2 is applied to the gate of the | Field effect transistors 82 created. The exact timing of these control signals | is calculated in a digital circuit which is not shown in Fig. 6 but which | is explained in more detail below. At the output of the half-bridge PFC | In circuit 100, a filter capacitor C1 is connected, which during the | Through phase of the semiconductor switch S2 is charged and the | downstream DC converter of the switching power supply provides a high voltage of e.g. 400 V. For example, the filter capacitor C1 has a capacitance of 600 uF. The current, which flows in the opposite direction to discharging the transistor capacitance of semiconductor switch S1 when the semiconductor switch Sz is open, flows through the measuring resistor R1, which is provided in the lower switching branch of the series connection of the two semiconductor switches S1 and S2. The measuring resistor R1 has, for example, a resistance value of 20 m. With this current flow, the transistor capacity is discharged, which is necessary for lossless switching. To achieve this, first is the

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16 LU101923 | metrological recording of the current flow required.

Therefore the | Voltage drop recorded across the measuring resistor R1.

This is done like this | that the voltage at node P3 to an input of. Digital circuit is performed, across which the voltage is measured.

To do this | an A/D input of the digital circuit can be used.

In a second branch | two further semiconductor switches S3 and S4 are provided.

It is e.g. also about nMOS field effect transistors.

The node P2, to which both | Transistors are connected is connected to the return line to the E-Werk. | Both semiconductor switches S3 and S4 are used to reverse the polarity of the circuit.

For the | positive half-wave of the input voltage, S4 is blocked and S3 is conductive | switched.

For the negative half-wave of the input voltage, S3 is blocked; and S4 are turned on.

The switching signals CTRL3 and CTRL4 are therefore | switched with the 50 Hz mains frequency. | 7 shows another variant of this circuit, in which the two | Semiconductor switches S3 and S4 are replaced by diodes.

With these, the | Advantage that they do not require dedicated switching signals.

The diodes are | self-locking and show the desired polarity reversal behavior even without | control signals.

The other components in Fig. 7 sharing the same | Reference numerals as in Fig. 6 denote the same components. ! With the circuit acc.

Fig. 7 an approach is further developed from the | following publication is known: | LED Application Design Using BCM Power Factor Correction (PFC) Controller for | 100W Lightning System; AN-9731, 02011 Fairchild Semiconductor Corporation. Rev 1.0.0, 3/24/11. | With this circuit design, a PFC circuit in the so-called | "Boundary Conduction Mode" (BCM).

In this case, the time Ton that belongs to the | chopping of the input voltage with approx. 100 kHz, via a | The sine half wave of the mains voltage is kept constant.

This time corresponds to the | Time to magnetize the inductance L per control process.

How |

17 LU101923 | described, the PFC circuit contains a current control loop that performs the task | has, the instantaneous value of the input current I (tf) (choke current) proportional | to the instantaneous value of the input voltage Vin(t).

Then the | power factor can be kept close to unity.

This time is proportional to |

power and is set by a voltage regulator that regulates the | The output voltage of the circuit should be kept constant at 400 V, for example. |

In order to set the time for demagnetizing the inductor L, in the | mentioned publication uses a Zero Current Detection (ZCD) signal, which © is caused by the recharging process of the diode.

This can be | however, in a step-up circuit in which the function of the diode is denoted by | is realized in a low-loss semiconductor switch S2, but does not generate it, | since these semiconductor switches do not turn off by themselves when a gate voltage | applied. |

It is therefore, according to the invention, the point in time at which the second |. Should turn off semiconductor switch S2, precalculated and this calculation | corrected with the help of an additional current control process.

These . Precalculation and correction can be based on the positive |

input voltage (positive half-wave) or the negative input voltage | (negative half-wave) are carried out, because the necessary information to | Being able to regulate the current thresholds is included in both cases. |

8 shows the current control process with a positive input voltage.

Along | the current measured via the measuring resistor is plotted on the ordinate. | The time t is plotted along the abscissa.

The course of the | Measuring resistor R1 measured current is denoted by Ip.

The Time Sound To | Magnetization of the choke coil L is during the positive half-wave of the | AC input voltage kept constant.

During this time |

Semiconductor switch S1 closed and semiconductor switch S2 open.

The | remaining time of the control cycle Tr is variable and is used to demagnetize the | Choke coil L and for discharging the transistor capacitance of | Semiconductor switch S1 with the precalculated value and to regulate the |

18 LU101923 .

deviations. During the remaining time of Tp, the semiconductor switch S1 | opened and the semiconductor switch S2 closed. A settling time is in the | 8 during the second control cycle illustrated and with Torrset . designated. This corresponds to a correction value by which the after the .

corrected by the time Tp predicted before the control process. In the | Fig. 8 can also be seen that the period Tp shown in the second. Control cycle is shortened accordingly. Because the previous control process | has shown that the pre-calculated time Tr is too long because the | measured current Is does not correspond to the defined reference value Irer, but | deviates by the value lerr(t-1) and the Î reference value ler can only be achieved by shortening the period. In the third control cycle, the Ë desired reference value lr is actually reached. The times are | marked by a "+" symbol when the current values are recorded. This | Time points correspond to the predicted and corrected values for Tr 9 shows the corresponding control process with a negative input voltage | to the end of the current edge. In that case, three correction values are Tortset(t-2), | Toffset(t-1) shown. In each of the three control cycles shown, the | Precalculated control cycle length corrected. In the first cycle, the | predicted value shortened, lengthened in the second and shortened again in the third A control cycle. The current readings are also sent to the | points marked with the ,+” symbol. The AD converter is used at ) the pre-calculated and corrected points in time for measured value acquisition | triggered. | Finally, FIG. 10 shows a block diagram of an integrated circuit 110, | with which this type of regulation is implemented. The integrated circuit can

in the form of a DSP (digital signal processor), FPGA (field programmable gate | array), or ASIC (application specific integrated circuit) or with the help of a | Standard microcontrollers and appropriate software can be implemented. doing | the regulator architecture applies when the positive input voltage | (Half wave) applied. |

49 LU101923 | The drive signals CTRL1 and CTRL2 for the semiconductor switches S1 and S2 of the step-up converter 100 are generated with the controller. The | Block diagram contains the following components: With the reference numbers 111a | and 111b are two subtraction stages. In the stage 111a, the | Output voltage Vout subtracted from the reference voltage Vout rer. The . Output voltage should be kept as constant as possible at the value of ; 400 V. It is thus in the subtraction stage 111a, the deviation from the. setpoint determined. Depending on the load of the switched-mode power supply, the | DC link voltage may vary from 400 V and must be readjusted. .

In the subtraction stage 111b, the | currently measured current Ip subtracted by the measuring resistor R1. How | described, the measurement of the current always takes place at the precalculated | and corrected times. No further measured current values | are recorded. Thus, in this subtraction stage 111b, the respective deviation ler from the desired value Irer is determined. This is the essential . Information for the subsequent control stage 113, in which the correction Toffset | is calculated for the predicted period Tr of the control cycle. Ë A PI controller or PID controller, for example, can be used for this. Depending on | A requirement as to how quickly the difference should be corrected can also be a .

other controllers can be used. The control stage 113 gives the | Correction value Tomset to the downstream master timer unit 116 from. It corresponds to a programmable timer unit, which is activated after the | outputs an event at the set times. You could also use the event | output in the form of a generated signal. In digital technology, the | Event can also be issued in the form of a software event, by | similar to a software-generated interrupt, a specific | Program routine is called. In the master timer unit 116, the | Timer set with which the duty cycle for the control signals CTRL1 and | CTRLZ2 is calculated. The actual signal generation takes place in the PWM | Signal generation unit 119. To control the control signals CTRL1 and CTRL2 both | with the desired duty cycle, the | Information about the predicted magnetization time Ton is required. | This information is provided by the control stage 112. This time will be for |

20 LU101923 | keep the positive half-wave constant.

It is therefore a : control stage that readjusts the manipulated variable only relatively slowly.

It has been shown | that even a 10 Hz PI controller is sufficient for this.

The magnetization time Ton : can be calculated using the formula :

lon = pin + 5L ; are calculated, which has already been explained at the outset.

This formula always applies: when the current flow through the inductor L1 is at the gap limit | is operated.

This control stage 112 works with the input information | via the difference between the desired intermediate circuit voltage of e.g. 400 |

NV and the actually measured intermediate circuit voltage from the | subtraction stage 111a.

The regulated magnetization time Ton is made available on the one hand to a second timer unit 115, the corresponding; outputs events to the PWM signal generation unit 119. On the other hand, | the magnetization time Ton is given to a calculation unit 114 which is denoted by | of the formula | the time for the total length of magnetization time and the | Demagnetization time calculated.

The first part of the formula corresponds to the | Formula for calculating the demagnetization time tor, which is mentioned at the beginning | became. | The state of the input voltage is detected with the state machine 117 . | This is sampled with a time grid of 25 kHz.

The state machine | 117 determines whether the positive half-cycle is present or the negative half-cycle of the | input voltage.

The determined status is sent to a configuration unit | 118, the corresponding | Register settings for the various blocks of the built-in | Circuit 110 makes.

At least the PWM signal generation unit 119 | must be reconfigured, because with a negative input voltage, the | Functions of the semiconductor switches S1 and S2 swapped.

21 LU101923 |

In summary, the functionality of the integrated circuit is repeated; explained.

With the help of the integrated circuit 110, the information about the | Input voltage Vin and output voltage Vout and the voltage regulator |

112, which sets the magnetization time Ton, in the calculation unit 114 | a control cycle time Tp precalculated, with the inductor current |L the lower. current threshold should be reached.

After the end of this control cycle time | Both semiconductor switches S1 and S2 are switched off and a short time later the | first semiconductor switch S1 switched on again.

Now the measuring resistor R1 | live and immediately after switching on S1, the current through the ;

Measuring resistor measured flowing current.

If this deviates from the nominal | reference value for the complete discharge of the transistor capacitance | would have to set, the further control stage 113 provides a correction value. Toffset added to the predicted control cycle time Tp for the next | Control cycle is added.

Depending on the correction value, this results in a |

Shortening or lengthening of the control cycle time Te.

This way | the current approaches the reference value in the next control cycle.

So equals | the control stage 113 adapts the current at the measuring point to the reference current.

The | selected reference value lr is constant over a sine half-wave. |

With this method, however, it is also possible to use another point from the current flank for the regulation.

To do this, the calculation of the | Current reference value can be adjusted.

This can have different benefits | to have.

For example, an average current control could also be implemented in this way, with ;

which the circuit is not operated in BCM mode, but e.g. in CCM mode |

Mode, corresponding to Continuous Conduction Mode. . The disclosure is not limited to the exemplary embodiments | limited.

There is room for various adjustments and modifications, | which the person skilled in the art based on his specialist knowledge as well as on the disclosure | associated would consider |

29 LU101923 |

Reference List | Line filter 1 | step-up converter 2 |

filter capacitor 3 | Switching stage 4 | Transformer 5 . regulator 6 optocoupler 7 | active PFC circuit 10 . DC chopper 20 | Power transfer stage 30 | smoothing level 40 | control stage 50 |

Electrical isolation 60 | Control 70 | Upconverter 100 . signal generation unit 110 . subtraction stages 111a, 111b | further control stage 112 . Control level 113 | calculation unit 114 | further timer unit 115: | Timer unit 116 |

AC input voltage detection unit 117 | configuration unit 118 | PWM signal generation unit 119 | Filter capacitor C1 | Control signal CTRL1, CTRL2 |

diode D | Rectifier diode D1, D2 | Transistor capacitance Cosc | measured current Ip |

23 LU101923 .

Line for current measurement lb_sense | Deviation from the target current lerr | coil current IL | Target current Iref | Choke coil L1 | Semiconductor switches S1, S2, 83, 84 | Switching power supply SNG . Magnetization time ton | demagnetization time torr | Resonant vibration time tres . Correction value Toffset | Magnetization time Ton | Control cycle time Tp Ë input voltage Vin | output voltage Vout | Output voltage reference value Vout_ref |

Claims (15)

24 LU101923 : claims ' 1. Step-up converter for a power supply of an electrical consumer f, having a rectifier or polarity reversing circuit (D1, D2; . 83, S4), an inductor (L1) and a filter capacitor (C1), where the . Inductance (L1) is connected to one pole of the AC voltage source (ACin) | and to a node between two semiconductor switches (S1 and S2), : characterized in that the first semiconductor switch (S1) is connected in series with | a measuring resistor (R1) is connected, with a signal generation unit. (110) for generating control signals for the two semiconductor switches (S1, | S2), the first semiconductor switch (S1) being closed for step-up conversion of the input voltage when the input voltage (Vin) is positive and | the second semiconductor switch (S2) is opened to allow a current through the | To drive inductance (L1) to magnetize the inductance (L1), where for | Demagnetization of the inductance (L1) the first semiconductor switch (S1) opened | is and the second semiconductor switch (S2) is closed and the. Filter capacitor (C1) is charged accordingly, wherein the: signal generation unit (110) has means for detecting the current through. the sense resistor (R1) at a selected point in time of the phase to ; Magnetization of the inductance (L1), especially at the beginning of the phase to. magnetization. | 2. Upconverter according to claim 1, wherein for the upconversion of the . AC input voltage with negative input voltage (Vin) the first | Semiconductor switch (S1) is opened and the second semiconductor switch (82) | is closed to drive a current through the inductor (L1) to | Magnetization of the inductor (L1), with demagnetization of the | Inductance (L1) of the first semiconductor switch (S1) is closed and the | second semiconductor switch (S2) is opened and the filter capacitor (C1) | is loaded accordingly, and the signal generation unit (110) means | has for detecting the current through the measuring resistor (R1) at a | selected point in time of the phase for demagnetization of the inductance (L1), | especially at the end of the demagnetization phase. | 25 LU101923 | 3. A boost converter according to claim 1 or 2, wherein the | Signal generation unit (110) has a calculation unit (114) which calculates the À control cycle time (Tp) for the phases for magnetization and | Demagnetization per control cycle depending on the input voltage. (Vin) and output voltage (Vout) are predicted, and the | Signal generation unit (110) further comprises a control stage (113) which | based on the difference between the measured current value (I) through the . Measuring resistor (R1) and a current reference value (Ir) a correction value; (Tomer) calculated for the control cycle time (Tr). . 4. Upconverter according to claim 3, wherein the correction value (Toftset) in: a timer unit (116) of the signal generation unit (110) for the: subsequent control cycle is used, so that the timer unit | (116) shortens or lengthens the control cycle time accordingly. | 5. boost converter according to claim 4, wherein the signal generation unit. (110) has a further control stage (112) from the difference between. given output voltage and measured output voltage, a magnetization time (Ton) is calculated. | 6. Upconverter according to claim 5, wherein the signal generation unit | (110) has a further timer unit (115) to which the calculated | Magnetization time (ton) is forwarded in which the . Magnetization time (Ton) for a number of subsequent control cycles to . application comes. | 7. Boost converter according to claim 6, wherein the number of control cycles for ; which the calculated magnetization time (Ton) is applied, for a . half wave of the AC input voltage is valid. | 8. boost converter according to any one of the preceding claims, wherein the | Signal generation unit (110) with an input AC voltage | Detection unit (117) is equipped to determine the phase position of the | 26 LU101923 à AC input voltage is set up, and the information about the . Phase position, in particular whether the positive half-wave or negative half-wave of the | AC input voltage is applied to a configuration unit (118) of the signal generation unit (110). | 9. A boost converter according to claim 8, wherein the configuration unit (118) | is set up, a number of the components of the signal generation unit (110) | to be configured for operation with positive input voltage or with . negative input voltage, depending on what the information about the | Indicates the phase position of the AC input voltage. . 10. boost converter according to any one of the preceding claims, wherein the © measuring resistor (R1) between the first semiconductor switch (S1) and the. return line to the AC input voltage source (ACin) to which the inductance ‘ (L1) is not connected. | 11. A boost converter according to any one of the preceding claims, wherein the | Aufwartswandier as an inductor having a choke coil (L1). © 12. Power supply of an electrical consumer, thereby | indicated that the power supply requires an up-converter after a | of the preceding claims, wherein the up-converter for ; Power factor pre-regulation in the power supply is used. | 13. Power supply according to claim 12, wherein the power supply as | Switching power supply is designed. : 14. Method of stepping up the input voltage in a | Power supply of an electrical consumer, which has a step-up converter | (100) with a rectifier or pole changer circuit (D1, D2; S3, $4), a . Inductance (L1) and a filter capacitor (C1), wherein the inductance | (L1) is connected to one pole of the input voltage source (ACin) and to | a node between two semiconductor switches (S1 and S2), and with a | 27 LU101923 | Signal generation unit (110) for generating drive signals (CTRL1, | CTRL2) for the semiconductor switches (S1, S2), wherein the | input voltage with a positive input voltage (Vin) the first | Semiconductor switch (S1) is closed and the second semiconductor switch (82) is opened in order to drive a current through the inductor (L1) to | Magnetization of the inductance (L1), and for demagnetization of the | inductance (L1) the first semiconductor switch (S1) is opened and the second | Semiconductor switch (S2) is closed and the filter capacitor (C1) | is charged accordingly, characterized in that the current through the | Sense resistor (R1) at a selected time of the phase to. Magnetization of the inductance (L1), especially at the beginning of the phase to | Magnetization of the inductance (L1) is measured and a control cycle time | (Te) for the phases for magnetization and demagnetization per | Control cycle depending on the input voltage (Vin) and | output voltage (Vout) is predicted, and by a control stage | (113) based on the difference between the measured current value (lb) | through the measuring resistor (R1) and a current reference value (ler) | Correction value (Tosset) for the control cycle time (Tp) is calculated by which the | predicted control cycle time (Tp) is corrected. | 15. The method according to claim 14, wherein the current (ls) through the | Measuring resistor (R1) is measured at predetermined times, which are predicted by the È control cycle time (Te) and by the correction value (Torfset) | corrected, specified. |