KR980003865A - Photomask of semiconductor device and method of forming charge storage electrode using same - Google Patents

Photomask of semiconductor device and method of forming charge storage electrode using same Download PDF

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Publication number
KR980003865A
KR980003865A KR1019960026510A KR19960026510A KR980003865A KR 980003865 A KR980003865 A KR 980003865A KR 1019960026510 A KR1019960026510 A KR 1019960026510A KR 19960026510 A KR19960026510 A KR 19960026510A KR 980003865 A KR980003865 A KR 980003865A
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KR
South Korea
Prior art keywords
photomask
light
charge storage
forming
pattern
Prior art date
Application number
KR1019960026510A
Other languages
Korean (ko)
Inventor
김상훈
이희목
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019960026510A priority Critical patent/KR980003865A/en
Publication of KR980003865A publication Critical patent/KR980003865A/en

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Abstract

1. 청구범위에 기재된 발명이 속한 기술분야1. Technical field to which the invention described in the claims belongs

반도체 장치 제조.Semiconductor device manufacturing.

2. 발명이 해결하려고 하는 기술적 과제2. Technical Challenges to be Solved by the Invention

종래의 실린더형 전하저장 전극 형성시, 희생막과 제2폴리실리콘막을 중착하고, 패터닝하는 공정 및 희생막 제거 공정이 필수적으로 요구되므로써, 공정이 복잡하고, 또 스페이서 형태의 제2폴리실리콘막 패턴이 무너지는 현상등으로 공정 상의 페일(fail)을 유발하는 문제점이 있었음.In the conventional method of forming a cylindrical charge storage electrode, a sacrificial layer and a second polysilicon layer are stacked and patterned, and a sacrificial layer removal process is indispensably required. Therefore, the process is complicated, and the second polysilicon layer pattern Which causes a failure in the process due to the collapse phenomenon.

3. 발명이 해결방법의 요지3. Invention is the point of solution

희생막 및 제2폴리실리콘막을 중착하지 않는 반도체 장치의 실린더형 전하저장 전극 형성을 위한 포토 마스크 및 그를 사용한 전하저장 전극 형성방법을 제공하고자 함.A photomask for forming a cylindrical charge storage electrode of a semiconductor device which does not impregnate a sacrificial layer and a second polysilicon film, and a method of forming a charge storage electrode using the photomask.

4. 발명의 중요한 용도4. Important Uses of the Invention

반도체 장치의 전하저장 전극 형성에 이용됨.Used to form charge storage electrodes of semiconductor devices.

Description

반도체 장치의 포토 마스크 및 그를 사용한 전하저장 전극 형성방법Photomask of semiconductor device and method of forming charge storage electrode using same

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제2a도는 본 발명의 일실시예에 따른 전하저장 전극 형성을 위한 포토 마스크의 레이아웃도.FIG. 2A is a layout view of a photomask for forming a charge storage electrode according to an embodiment of the present invention; FIG.

제2b도 내지 제2c도는 본 발명의 일실시예에 따른 포토 마스크를 사용한 전하저장 전극 형성 공정도.FIGS. 2b to 2c are views showing a process of forming a charge storage electrode using a photomask according to an embodiment of the present invention. FIG.

Claims (2)

노광빛이 투과되는 기판, 상기 기판상에 형성되어 웨이퍼상의 감광막 소정 부위에 노광빛이 조사되지 않도록 노광빛을 차단하는 차광 패턴을 구비하여 반도체 제조에 사용되는 포토마스크에 있어서, 상기 차광 패턴의 소정 부위에서 상기 노광빛이 투과되되, 그에 대응되는 감광막이 완전히 노광되지 않을 정도의 약한 정도의 강도를 가지는 노광빛이 투과되도록 상기 차광막 패턴내의 소정부위에 형성되는 더미(dummy) 패턴을 포함하여 구성되는 포토 마스크.A photomask for use in semiconductor manufacturing, comprising: a substrate through which exposure light is transmitted; and a light-shielding pattern formed on the substrate, the light-shielding pattern interrupting exposure light so that a predetermined portion of the photoresist film on the wafer is not irradiated with light, And a dummy pattern formed on a predetermined portion of the light-shielding film pattern so that the exposure light having a strength of a weak degree to the extent that the corresponding light-sensitive film is not completely exposed is transmitted therethrough Photomask. 층간절연막을 관통하여 반도체 기판상의 소정부위에 콘택되는 반도체 장치의 전하저장 전극 형성방법에 있어서, 전체구조 상부에 폴리실리콘막을 형성하는 단계; 상기 폴리실리콘막상에, 그에 대응하는 감광막이 완전히 노광되지 않을 정도의 약한 강도를 가지는 노광빛이 투과되도록 하는 소정의 패턴을 포함하여 구성되는 포토마스크를 사용하여 가장자리에 비해 중앙부위가 움푹 패인 포토레지스트 패턴을 형성하는 단계, 및 상기 포토레지스트 패턴을 식각 장벽으로 하여 상기 폴리실리콘막을 식각하는 단계를 포함하여 이루어진 반도체 장치의 전하저장 전극 형성방법.A method of forming a charge storage electrode of a semiconductor device, the method comprising the steps of: forming a polysilicon film on an entire structure; A photoresist having a recessed central portion as compared with an edge thereof is formed on the polysilicon film by using a photomask including a predetermined pattern for allowing exposure light having a weak intensity to be transmitted so that the corresponding photoresist film is not completely exposed, Forming a pattern on the polysilicon film; and etching the polysilicon film with the photoresist pattern as an etch barrier. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: It is disclosed by the contents of the first application.
KR1019960026510A 1996-06-29 1996-06-29 Photomask of semiconductor device and method of forming charge storage electrode using same KR980003865A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960026510A KR980003865A (en) 1996-06-29 1996-06-29 Photomask of semiconductor device and method of forming charge storage electrode using same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960026510A KR980003865A (en) 1996-06-29 1996-06-29 Photomask of semiconductor device and method of forming charge storage electrode using same

Publications (1)

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KR980003865A true KR980003865A (en) 1998-03-30

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100489521B1 (en) * 2002-09-09 2005-05-16 동부아남반도체 주식회사 Reticle for fabricating multi-level pattern
KR100911873B1 (en) * 2006-10-09 2009-08-11 주식회사 하이닉스반도체 Exposure mask for forming storage node of capacitor in semiconductor memory device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100489521B1 (en) * 2002-09-09 2005-05-16 동부아남반도체 주식회사 Reticle for fabricating multi-level pattern
KR100911873B1 (en) * 2006-10-09 2009-08-11 주식회사 하이닉스반도체 Exposure mask for forming storage node of capacitor in semiconductor memory device

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