KR970078340A - Bandwidth Allocation Method of Electronic Switching System - Google Patents

Bandwidth Allocation Method of Electronic Switching System Download PDF

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Publication number
KR970078340A
KR970078340A KR1019960019385A KR19960019385A KR970078340A KR 970078340 A KR970078340 A KR 970078340A KR 1019960019385 A KR1019960019385 A KR 1019960019385A KR 19960019385 A KR19960019385 A KR 19960019385A KR 970078340 A KR970078340 A KR 970078340A
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KR
South Korea
Prior art keywords
allocation method
lower processor
electronic switching
bandwidth
bandwidth allocation
Prior art date
Application number
KR1019960019385A
Other languages
Korean (ko)
Other versions
KR100197409B1 (en
Inventor
김주용
오영민
Original Assignee
유기범
대우통신 주식회사
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Publication date
Application filed by 유기범, 대우통신 주식회사 filed Critical 유기범
Priority to KR1019960019385A priority Critical patent/KR100197409B1/en
Publication of KR970078340A publication Critical patent/KR970078340A/en
Application granted granted Critical
Publication of KR100197409B1 publication Critical patent/KR100197409B1/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54541—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme using multi-processor systems
    • H04Q3/54566—Intelligent peripherals, adjunct processors
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M3/00—Automatic or semi-automatic exchanges
    • H04M3/22—Arrangements for supervision, monitoring or testing

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

본 발명은 TDX-100 전전자 교환기에 있어서, 하위 프로세서(200)와 디바이스(220) 간의 전송 대역폭을 할당하도록 하기에 적합한 전전자 교환기의 대역폭 할당 방법에 관한 것으로서, 본 발명에서는 TDX-100 전전자 교환기에 있어서 하위 프로세서(200)와 디바이스(220)간의 사용하고자 하는 전송 대역폭을 하위 프로세서(200)와 통신절차에 의해서 할당할 수 있는 것이다.The present invention relates to a bandwidth allocation method of an electronic switching system suitable for allocating a transmission bandwidth between the lower processor (200) and the device (220) in the TDX-100 electronic switching system. In the exchange, the transmission bandwidth to be used between the lower processor 200 and the device 220 may be allocated by the lower processor 200 and the communication procedure.

Description

전전자 교환기의 대역폭 할당 방법Bandwidth Allocation Method of Electronic Switching System

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 일반적인 교환기 시스템의 구성도, 제2도는 본 발명에 따른 전전자 교환기의 대역폭 할당 방법의 일 실시예를 설명하기 위한 블록도.1 is a block diagram of a general exchange system, and FIG. 2 is a block diagram illustrating an embodiment of a bandwidth allocation method of an all-electronic exchange according to the present invention.

Claims (3)

정합부(210)가 하위 프로세서(200)와 디바이스(220)간을 정합함에 있어서, 상기 디바이스(220)가 파워온되어 초기화도면 상기 정합부(210)와 물리적으로 연결된 소정의 PCM 포트를 통해 상기 초기화된 디바이스(220)가 어떤 종류의 디바이스인지를 상기 하위 프로세서(200)로 보고하는 단계와; 상기 하위 프로세서(200)는 사용하지 않는 PCM포트를 주기적으로 모니터하여 관리하는 단계와; 상기 디바이스(220)는 상기 하위 프로세서(200)와 통신절차에 의해서 사용할 전송 대역폭을 할당받는 단계를 포함하여 이루어지는 전전자 교환기의 대역폭 할당 방법.In the matching unit 210 to match between the lower processor 200 and the device 220, the device 220 is powered on through the predetermined PCM port physically connected to the matching unit 210 in the initialization drawing Reporting to the lower processor (200) what kind of device the initialized device (220) is; The lower processor 200 periodically monitoring and managing unused PCM ports; The device (220) is a bandwidth allocation method of the electronic switching center comprising the step of receiving a transmission bandwidth to be used by the communication process with the lower processor (200). 제1항에 있어서, 디바이스(220)가 초기화된 후, 최초로 통신하는 전송 대역폭은 128Kbps임을 특징으로 하는 전전자 교환기의 대역폭 할당 방법.The method of claim 1, wherein after the device (220) is initialized, the first communication bandwidth is 128 Kbps. 제1항에 있어서, 상기 전송 대역폭의 할당은 2채널 단위로 증가시킴을 특징으로 하는 전전자 교환기의 대역폭 할당 방법.The bandwidth allocation method of claim 1, wherein the allocation of the transmission bandwidth is increased in units of two channels. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019960019385A 1996-05-31 1996-05-31 Method for allocating bandwidth in tdx-100 full electronic switching system KR100197409B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960019385A KR100197409B1 (en) 1996-05-31 1996-05-31 Method for allocating bandwidth in tdx-100 full electronic switching system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960019385A KR100197409B1 (en) 1996-05-31 1996-05-31 Method for allocating bandwidth in tdx-100 full electronic switching system

Publications (2)

Publication Number Publication Date
KR970078340A true KR970078340A (en) 1997-12-12
KR100197409B1 KR100197409B1 (en) 1999-06-15

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KR1019960019385A KR100197409B1 (en) 1996-05-31 1996-05-31 Method for allocating bandwidth in tdx-100 full electronic switching system

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KR (1) KR100197409B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100465300B1 (en) * 1999-10-28 2005-01-13 엘지전자 주식회사 Device for interface control of Peripheral Processor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100465300B1 (en) * 1999-10-28 2005-01-13 엘지전자 주식회사 Device for interface control of Peripheral Processor

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Publication number Publication date
KR100197409B1 (en) 1999-06-15

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