KR970077497A - Method of forming device isolation film in semiconductor device - Google Patents

Method of forming device isolation film in semiconductor device Download PDF

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Publication number
KR970077497A
KR970077497A KR1019960018221A KR19960018221A KR970077497A KR 970077497 A KR970077497 A KR 970077497A KR 1019960018221 A KR1019960018221 A KR 1019960018221A KR 19960018221 A KR19960018221 A KR 19960018221A KR 970077497 A KR970077497 A KR 970077497A
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KR
South Korea
Prior art keywords
silicon nitride
pad oxide
layer pattern
forming
film
Prior art date
Application number
KR1019960018221A
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Korean (ko)
Inventor
최진
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019960018221A priority Critical patent/KR970077497A/en
Publication of KR970077497A publication Critical patent/KR970077497A/en

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Abstract

반도체장치의 소자분리막 형성방법이 개시되어 있다. 본 발명은 반도체기판의 소정영역 표면에 활성영역을 한정하기 위하여 차례로 적층된 제1패드 산화막 패턴 및 실리콘질화막 패턴을 형성하는 단계와, 상기 제1패드 산화막 패턴의 양 옆에 노출된 반도체기판을 일정깊이로 식각하여 리세스된 영역을 갖는 반도체 기판을 형성하는 단계와, 상기 제1패드 산화막 패턴을 등방성 식각하여 상기 실리콘질화막 패턴 가장자리 아리에 언더컷을 형성하는 단계와, 상기 결과물을 열산화시키어 상기 반도체 기판 표면에 제2패드 산화막을 형성하는 단계와, 상기 실리콘질화막 패턴의 측벽 및 상기 리세스된 영역의 측벽에 형성된 제2패드 산화막의 표면에 실리콘질화막으로 이루어진 제1스페이서를 형성하는 단계와, 상기 제1스페이서의 하단부에 폴리실리콘막으로 이루어진 제2스페이서를 형성하는 단계와, 상기 결과물을 열산화시키어 상기 실리콘 질화막 패턴 양 옆에 필드산화막을 형성하는 단계를 포함하는 것을 특징으로 하는 반도체장치의 소자분리막 형성방법을 제공한다. 본 발명에 의하면, 버즈비크의 폭을 감소시키면서 그 아래의 반도체기판에 가해지는 스트레스를 크게 완화시킬 수 있다. 따라서, 초고집적 반도체장치에 적합한 소자분리막을 형성할 수 있다.A method of forming a device isolation film of a semiconductor device is disclosed. According to an embodiment of the present invention, a first pad oxide layer pattern and a silicon nitride layer pattern are sequentially formed on a surface of a predetermined region of a semiconductor substrate to define an active region, and the semiconductor substrate exposed to both sides of the first pad oxide layer pattern is fixed. Etching a depth to form a semiconductor substrate having a recessed region, isotropically etching the first pad oxide layer pattern to form an undercut on an edge of the silicon nitride layer pattern edge, and thermally oxidizing the resultant Forming a second pad oxide film on a surface of the substrate, forming a first spacer made of a silicon nitride film on a surface of a second pad oxide film formed on sidewalls of the silicon nitride film pattern and a sidewall of the recessed region; Forming a second spacer made of a polysilicon film on the lower end of the first spacer; Sikieo thermal oxidation of the gwamul it provides a device isolation film formed in a semiconductor device comprising the steps of forming a field oxide film next to the silicon nitride film pattern amount. According to the present invention, it is possible to greatly reduce the stress applied to the semiconductor substrate below while reducing the width of the Buzzbeek. Therefore, an element isolation film suitable for an ultra high density semiconductor device can be formed.

Description

반도체 장치의 소자분리막 형성방법Method of forming device isolation film in semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2C도 내지 제2D도는 본 발명에 의한 소자분리막 형성방법을 설명하기 위한 단면도들이다.2C to 2D are cross-sectional views illustrating a method of forming an isolation layer according to the present invention.

Claims (1)

반도체기판의 소정영역 표면에 활성영역을 한정하기 위하여 차례로 적층된 제1패드 산화막 패턴 및 실리콘질화막 패턴을 형성하는 단계; 상기 제1패드 산화막 패턴의 양 옆에 노출된 반도체기판을 일정깊이로 식각하여 리세스된 영역을 갖는 반도체기판을 형성하는 단계; 상기 제1패드 산화막 패턴을 등방성 식각하여 상기 실리콘질화막 패턴 가장자리 아래에 언더컷을 형성하는 단계; 상기 결과물을 열산화시키어 상기 반도체기판 표면에 제2패드 산화막을 형성하는 단계; 상기 실리콘질화막 패턴의 측벽 및 상기 리세스된 영역의 측벽에 형성된 제2패드 산화막의 표면에 실리콘질화막으로 이루어진 제1스페이서를 형성하는 단계; 상기 제1스페이서의 하단부에 폴리실리콘막으로 이루어진 제2스페이서를 형성하는 단계; 및 상기 결과물을 열산화시키어 상기 실리콘 질화막 패턴 양 옆에 필드산화막을 형성하는 단계를 포함하는 것을 특징으로 하는 반도체장치의 소자분리막 형성방법.Forming a first pad oxide layer pattern and a silicon nitride layer pattern sequentially stacked on a surface of a predetermined region of the semiconductor substrate to define an active region; Etching the semiconductor substrates exposed to both sides of the first pad oxide layer pattern to a predetermined depth to form a semiconductor substrate having recessed regions; Isotropically etching the first pad oxide layer pattern to form an undercut under an edge of the silicon nitride layer pattern; Thermally oxidizing the resultant to form a second pad oxide layer on the surface of the semiconductor substrate; Forming a first spacer made of a silicon nitride film on a surface of a second pad oxide film formed on sidewalls of the silicon nitride film pattern and sidewalls of the recessed region; Forming a second spacer made of a polysilicon film on a lower end of the first spacer; And thermally oxidizing the resultant to form field oxide films on both sides of the silicon nitride film pattern. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019960018221A 1996-05-28 1996-05-28 Method of forming device isolation film in semiconductor device KR970077497A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019960018221A KR970077497A (en) 1996-05-28 1996-05-28 Method of forming device isolation film in semiconductor device

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Application Number Priority Date Filing Date Title
KR1019960018221A KR970077497A (en) 1996-05-28 1996-05-28 Method of forming device isolation film in semiconductor device

Publications (1)

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KR970077497A true KR970077497A (en) 1997-12-12

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100744067B1 (en) * 2005-06-28 2007-07-30 주식회사 하이닉스반도체 Method for fabricating semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100744067B1 (en) * 2005-06-28 2007-07-30 주식회사 하이닉스반도체 Method for fabricating semiconductor device

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