KR970056796A - Scan conversion circuit - Google Patents

Scan conversion circuit Download PDF

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Publication number
KR970056796A
KR970056796A KR1019950052224A KR19950052224A KR970056796A KR 970056796 A KR970056796 A KR 970056796A KR 1019950052224 A KR1019950052224 A KR 1019950052224A KR 19950052224 A KR19950052224 A KR 19950052224A KR 970056796 A KR970056796 A KR 970056796A
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KR
South Korea
Prior art keywords
digital
analog
video signal
conversion circuit
outputting
Prior art date
Application number
KR1019950052224A
Other languages
Korean (ko)
Other versions
KR100345327B1 (en
Inventor
김정세
Original Assignee
김광호
삼성전자 주식회사
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Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019950052224A priority Critical patent/KR100345327B1/en
Publication of KR970056796A publication Critical patent/KR970056796A/en
Application granted granted Critical
Publication of KR100345327B1 publication Critical patent/KR100345327B1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/22—Arrangements affording multiple use of the transmission path using time-division multiplexing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/20—Pc systems
    • G05B2219/25—Pc structure of the system
    • G05B2219/25431—Dual Port memory

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

복수의 병렬로 입력되는 영상 신호를 시분할 다중화시켜 1개의 영상신호로 출력하는 주사 변환 회로가 개시된다.Disclosed is a scan conversion circuit for time division multiplexing a plurality of video signals input in parallel and outputting the same as one video signal.

본 발명에 따른 주사 변환 회로는 입력되는 영상 신호의 개수에 상응하는 개수의 아날로그 디지털 변환기를 구비하며 입력되는 영상 신호를 디지털 영상 신호로 변환시켜 주는 아날로그 디지털 변환부; 입력되는 영상 신호의 개수에 상응하는 개수의 듀얼 포트 메모리를 구비하며 상기 아날로그 디지털 변환부에서 출력되는 디지털 영상 신호를저장하였다가, 시분할로 출력하는 듀얼 포트 메모리부; 상ㄱ심지어 듀얼 포트 메모리부에서 시분할로 출력되는 디지털 영상 신호를 래치하고 상기 아날로그 디지털 변환부에 입력되는 영상 신호의 주기에 따라 출력하는 래치부; 및 상기 래치부에서 출력되는 디지털 영상 신호를 아날로그 변환시켜 출력하는 디지털 아날로그 변환부를 포함함을 특징으로 한다.The scan conversion circuit according to the present invention comprises an analog-digital converter having a number of analog-digital converters corresponding to the number of input image signals and converting the input image signal into a digital image signal; A dual port memory unit having a number of dual port memories corresponding to the number of input image signals and storing the digital image signals output from the analog-digital converter and outputting them in time division; A latch unit for latching a digital video signal output in time division from the dual port memory unit and outputting the digital video signal according to a period of the video signal input to the analog-digital converter; And a digital-to-analog converter for converting and outputting a digital video signal output from the latch unit.

본 발명에 따른 주사 변환 회로는 종래의 주사 변환 회로에 비해 그 구성이 간단하게 되는 것으로써 잡음에 강인한 특성을 갖는다.The scan conversion circuit according to the present invention has a characteristic that is simple in configuration compared with the conventional scan conversion circuit and thus is robust to noise.

Description

주사 변환 회로Scan conversion circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

.제2도는 본 발명에 따른 주사 변환 회로의 구성을 보이는 블록도이다,2 is a block diagram showing the configuration of a scan conversion circuit according to the present invention.

제3도는 제2도에 도시된 장치에 있어서 입출력 영상 신호, 리드 신호, 라이트 신호의 동기 관계를 보이는 도면이다.FIG. 3 is a diagram showing the synchronization relationship between input / output video signals, read signals, and write signals in the apparatus shown in FIG.

Claims (1)

복수의 영상 신호를 시분할 다중화하여 하나의 영상 신호로 변환시켜 출력하는 주사 변환 회로에 있어서, 입력되는 영상 신호의 개수에 상응하는 개수의 아날로그 디지털 변환기를 구비하며 입력되는 영상 신호를 디지털 영상 신호로 변환시켜주는 아날로그 디지털 변환부; 입력되는 영상 신호의 개수에 상응하는 개수의 듀얼 포트 메모리를 구비하며 상기 아날로그 디지털 변환부에서 출력되는 디지털 영상 신호를 저장하였다가, 시분할로 출력하는 듀얼 포트 메모리부; 상기 듀얼 포트 메모리부에서 시분할로 출력되는 디지털 영상 신호를 래치하고 상기 아날로그 디지털 변환부에 입력되는 영상 신호의 주기에 따라 출력하는 래치부; 및 상기 래치부에서 출력되는 디지털 영상 신호를 아날로그 변환시켜 출력하는 디지털 아날로그 변환부를 포함하는 주사 변환 회로.A scan conversion circuit for time division multiplexing a plurality of video signals and converting the same into one video signal, the scan conversion circuit comprising a number of analog to digital converters corresponding to the number of input video signals and converting the input video signals into digital video signals. Analog-to-digital converter for letting; A dual port memory unit having a number of dual port memories corresponding to the number of input image signals and storing the digital image signals output from the analog-digital converter and outputting them in time division; A latch unit for latching a digital video signal output in time division from the dual port memory unit and outputting the digital video signal according to a period of the video signal input to the analog-digital converter; And a digital-to-analog converter for analog-converting and outputting the digital video signal output from the latch unit. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950052224A 1995-12-19 1995-12-19 Scan conversion circuit KR100345327B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950052224A KR100345327B1 (en) 1995-12-19 1995-12-19 Scan conversion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950052224A KR100345327B1 (en) 1995-12-19 1995-12-19 Scan conversion circuit

Publications (2)

Publication Number Publication Date
KR970056796A true KR970056796A (en) 1997-07-31
KR100345327B1 KR100345327B1 (en) 2002-12-16

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Application Number Title Priority Date Filing Date
KR1019950052224A KR100345327B1 (en) 1995-12-19 1995-12-19 Scan conversion circuit

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100920333B1 (en) * 2008-07-04 2009-10-07 서정일 Apparatus for making crust of overcooded rice with openning and closing device of heating plate

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2025880A1 (en) * 1989-09-25 1991-03-26 Ichiro Tsuchiya Furnace for production of optical fiber preform
TW232060B (en) * 1992-10-06 1994-10-11 Seiko Epson Corp Image processing apparatus
JPH06292239A (en) * 1993-03-31 1994-10-18 Toshiba Corp Television signal processing unit
JP3276705B2 (en) * 1993-03-31 2002-04-22 三洋電機株式会社 Split video monitor
KR940023195A (en) * 1993-03-31 1994-10-22 정석 Image Processing Memory Circuit of Multivision System
KR100243364B1 (en) * 1994-10-29 2000-02-01 유무성 Double scan converter circuit using synchronization generating ic

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100920333B1 (en) * 2008-07-04 2009-10-07 서정일 Apparatus for making crust of overcooded rice with openning and closing device of heating plate

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