KR970055597A - Arithmetic unit of audio decoder - Google Patents

Arithmetic unit of audio decoder Download PDF

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Publication number
KR970055597A
KR970055597A KR1019950067195A KR19950067195A KR970055597A KR 970055597 A KR970055597 A KR 970055597A KR 1019950067195 A KR1019950067195 A KR 1019950067195A KR 19950067195 A KR19950067195 A KR 19950067195A KR 970055597 A KR970055597 A KR 970055597A
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KR
South Korea
Prior art keywords
data
sample data
scale
information
bit allocation
Prior art date
Application number
KR1019950067195A
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Korean (ko)
Inventor
김수상
Original Assignee
김희수
Lg 전자부품주식회사
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Publication date
Application filed by 김희수, Lg 전자부품주식회사 filed Critical 김희수
Priority to KR1019950067195A priority Critical patent/KR970055597A/en
Publication of KR970055597A publication Critical patent/KR970055597A/en

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Abstract

본 발명은 MPEG(Moving Picture Experts Grouping)에 사용되어 압축된 오디오 데이터를 복원 연산처리를 수행하는 오디오 디코더의 연산장치에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a computing device of an audio decoder used for moving picture experts grouping (MPEG) to perform reconstruction processing of compressed audio data.

본 발명은 데이터를 분석하고 샘플데이터에 대한 비트할당정보 및 스케일펙트 인덱스정보 및 스케일페트 선택정보를 출력하는 인터페이스부를 포함하여The present invention includes an interface unit for analyzing data and outputting bit allocation information, scale defect index information, and scale pet selection information for sample data.

“〔C×(D+샘플데이터)〕×SEI”“[C × (D + Sample Data)] × SEI”

C.D:비트할당정보, 샘플데이터:압축된 각각의 데이터. SFI:스케일펙트 인덱스값의 식으로 오디오 데이터를 복원연산 처리하는 것을 특징으로 한다.C.D: Bit allocation information, sample data: Each compressed data. SFI: Reconstruction processing for audio data in the form of a scale defect index value.

Description

오디오 디코더(audio decoder)의 연산장치Arithmetic unit of audio decoder

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 의한 오디오 디코더의 연산장치의 구성을나타내는 블록도.1 is a block diagram showing the configuration of an arithmetic unit of an audio decoder according to the present invention.

제2도는 본 발명에 사용되는 제어신호를 나타내는 타이밍(timing)도.2 is a timing diagram showing a control signal used in the present invention.

Claims (1)

데이터를 분석하고 샘플데이터에 대한 비트할당정보 및 스케일펙트 인덱스정보 및 스케일페트 선택정보를 출력하는 인터페이스부를 포함하여Including an interface unit for analyzing data and outputting bit allocation information, scale defect index information, and scale pet selection information for sample data. “〔C×(D+샘플데이터)〕×SEI”“[C × (D + Sample Data)] × SEI” C.D:비트할당정보, 샘플데이터:압축된 각각의 데이터. SFI:스케일펙트 인덱스값의 식으로 오디오 데이터를 복원연산 처리하는 것을 특징으로 하는 오디오 디코더의 연산장치.C.D: Bit allocation information, sample data: Each compressed data. SFI: An arithmetic unit for an audio decoder, characterized in that the audio data is decompressed and processed in the form of a scale defect index value. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950067195A 1995-12-29 1995-12-29 Arithmetic unit of audio decoder KR970055597A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950067195A KR970055597A (en) 1995-12-29 1995-12-29 Arithmetic unit of audio decoder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950067195A KR970055597A (en) 1995-12-29 1995-12-29 Arithmetic unit of audio decoder

Publications (1)

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KR970055597A true KR970055597A (en) 1997-07-31

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KR1019950067195A KR970055597A (en) 1995-12-29 1995-12-29 Arithmetic unit of audio decoder

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100760976B1 (en) * 2005-08-01 2007-09-21 (주)펄서스 테크놀러지 Computing circuits and method for running an mpeg-2 aac or mpeg-4 aac audio decoding algorithm on programmable processors

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100760976B1 (en) * 2005-08-01 2007-09-21 (주)펄서스 테크놀러지 Computing circuits and method for running an mpeg-2 aac or mpeg-4 aac audio decoding algorithm on programmable processors

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