KR970055566A - Phase Synchronization Loop for Improving Phase Synchronization Time - Google Patents
Phase Synchronization Loop for Improving Phase Synchronization Time Download PDFInfo
- Publication number
- KR970055566A KR970055566A KR1019950064216A KR19950064216A KR970055566A KR 970055566 A KR970055566 A KR 970055566A KR 1019950064216 A KR1019950064216 A KR 1019950064216A KR 19950064216 A KR19950064216 A KR 19950064216A KR 970055566 A KR970055566 A KR 970055566A
- Authority
- KR
- South Korea
- Prior art keywords
- control
- analog
- digital
- phase
- voltage
- Prior art date
Links
- 238000000034 method Methods 0.000 claims abstract 4
- 230000001360 synchronised effect Effects 0.000 claims abstract 3
- 238000001914 filtration Methods 0.000 claims 11
- 230000010355 oscillation Effects 0.000 claims 11
- 238000006243 chemical reaction Methods 0.000 claims 6
- 238000001514 detection method Methods 0.000 claims 3
- 230000002035 prolonged effect Effects 0.000 abstract 2
- 230000005540 biological transmission Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
- H03L7/187—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop
- H03L7/189—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using means for coarse tuning the voltage controlled oscillator of the loop comprising a D/A converter for generating a coarse tuning voltage
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
- H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
1. 청구범위에 기재된 발명이 속한 기술분야1. TECHNICAL FIELD OF THE INVENTION
무선통신시스템의 위상동기루프에 관한 것이다A phase locked loop of a wireless communication system
2. 발명이 해결하려고 하는 기술적 과제2. The technical problem to be solved by the invention
전압제어발진기의 부품편차 및 주위환경의 변화에 의한 편차로 길어지는 위상동리루프의 동기시간을 개선한다.It improves the synchronous time of phase-locked loops, which is prolonged due to component deviation of the voltage-controlled oscillator and variations due to changes in the surrounding environment.
3. 발명의 해결방법의 요지3. Summary of Solution to Invention
본 발명에 따른 위상동기루프는 무선통신시스템의 송신모드 또는 수신모드의 동작이 수행되기 바로 직전에 각 동가 모드에서 요구되는 주파수들에 대한 제어전압을 평가한 후 이 평가된 제어전압을 실제 동작모드에서 이용함으로써 전압제어발진기의 부품편차 및 주위환경의 변화에 의한 편차로 길어지는 동기시간을 개선한다.The phase locked loop according to the present invention evaluates the control voltages for the frequencies required in each equivalent mode immediately before the operation of the transmission mode or the reception mode of the wireless communication system is performed, and then uses the evaluated control voltages in the actual operation mode. This method improves the synchronous time, which is prolonged due to the component deviation of the voltage controlled oscillator and the deviation caused by the change of the surrounding environment.
4. 발명의 중요한 용도4. Important uses of the invention
주파수도약방식의 무선통신시스템.Frequency hopping wireless communication system.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2도는 본 발명의 제1실시예에 따른 위상동기루프의 구성도.2 is a block diagram of a phase locked loop according to a first embodiment of the present invention.
Claims (12)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950064216A KR100251631B1 (en) | 1995-12-29 | 1995-12-29 | Phase locked loop circuit and its method for improving phase synchronizing time |
DE19653134A DE19653134C2 (en) | 1995-12-29 | 1996-12-19 | Phase locked loop |
JP8349362A JPH09331253A (en) | 1995-12-29 | 1996-12-27 | Phase-locked loop for improving phase-synchronizing time |
US08/825,934 US5926515A (en) | 1995-12-26 | 1997-04-01 | Phase locked loop for improving a phase locking time |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950064216A KR100251631B1 (en) | 1995-12-29 | 1995-12-29 | Phase locked loop circuit and its method for improving phase synchronizing time |
Publications (2)
Publication Number | Publication Date |
---|---|
KR970055566A true KR970055566A (en) | 1997-07-31 |
KR100251631B1 KR100251631B1 (en) | 2000-04-15 |
Family
ID=19446851
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950064216A KR100251631B1 (en) | 1995-12-26 | 1995-12-29 | Phase locked loop circuit and its method for improving phase synchronizing time |
Country Status (3)
Country | Link |
---|---|
JP (1) | JPH09331253A (en) |
KR (1) | KR100251631B1 (en) |
DE (1) | DE19653134C2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100362879B1 (en) * | 2001-02-15 | 2002-11-29 | 엘지이노텍 주식회사 | A phase locked-loop control circuit for fast phase struck |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19906561B4 (en) * | 1999-02-17 | 2005-08-25 | Dosch & Amand Gmbh & Co. Kg | Phase control circuit for wireless communication equipment, has voltage controlled oscillator, phase comparator creating first control signal, control unit creating second control signal, and control signal selector switching |
WO2005062471A1 (en) * | 2003-12-19 | 2005-07-07 | Philips Intellectual Property & Standards Gmbh | Method and arrangement for interference compensation in a voltage-controlled frequency generator |
KR100803360B1 (en) | 2006-09-14 | 2008-02-14 | 주식회사 하이닉스반도체 | Pll circuit and method for controlling the same |
KR101483857B1 (en) | 2013-05-15 | 2015-01-16 | 삼성전기주식회사 | Frequency tuning circuit and method |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2483704A1 (en) * | 1980-06-03 | 1981-12-04 | Thomson Csf | FREQUENCY PRESPOSITION DEVICE FOR INDIRECT SYNTHESIZER OF FREQUENCY AND SYNTHESIZER COMPRISING SUCH A DEVICE |
US4980652A (en) * | 1988-09-02 | 1990-12-25 | Nippon Telegraph And Telephone Corporation | Frequency synthesizer having compensation for nonlinearities |
JPH0496515A (en) * | 1990-08-13 | 1992-03-27 | Fujitsu Ltd | Phase locked loop circuit and semiconductor integrated circuit |
JPH05304467A (en) * | 1992-04-24 | 1993-11-16 | Ricoh Co Ltd | Oscillation circuit |
JP2765443B2 (en) * | 1993-08-05 | 1998-06-18 | 日本電気株式会社 | Phase locked loop circuit |
-
1995
- 1995-12-29 KR KR1019950064216A patent/KR100251631B1/en not_active IP Right Cessation
-
1996
- 1996-12-19 DE DE19653134A patent/DE19653134C2/en not_active Expired - Fee Related
- 1996-12-27 JP JP8349362A patent/JPH09331253A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100362879B1 (en) * | 2001-02-15 | 2002-11-29 | 엘지이노텍 주식회사 | A phase locked-loop control circuit for fast phase struck |
Also Published As
Publication number | Publication date |
---|---|
KR100251631B1 (en) | 2000-04-15 |
DE19653134A1 (en) | 1997-11-06 |
DE19653134C2 (en) | 1999-02-18 |
JPH09331253A (en) | 1997-12-22 |
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