KR970055184A

KR970055184A - Low Voltage CMOS Transconductance Device

Info

Publication number: KR970055184A
Application number: KR1019950047419A
Authority: KR
Inventors: 송규상; 송원철
Original assignee: 양승택; 한국전자통신연구원
Priority date: 1995-12-07
Filing date: 1995-12-07
Publication date: 1997-07-31
Also published as: KR0176089B1

Abstract

본 발명은 저전압 전원에서 동작하며 전력소모가 적고 출력전압의 스윙범위가 넓은 CMOS를 사용하여 트랜스컨덕턴스(trnasconductacne)를 얻고자 하는 저전압 CMOS 트랜스컨덕턴스 장치에 관한 것으로서, 그 특징은 저전압에서 사용되고 저전력 소모를 위하여 CMOS를 사용하여 입력전압을 출력전류로 변환하는 트랜스 컨덕턴스 장치에 있어서, 제1트랜지스터의 게이트와 제2트랜지스터의 게이트는 각각 양 및 음의 입력단자로 사용되고 소소는 모두 접지에 연결되며 각 드레인을 통하여 양 및 음의 전류 출력이 나타나며, 제1트랜지스터의 드레인과 제2트랜지스터의 드레인 각각을 통하여 나타난 양 및 음의 출력전류가 게이트가 서로 연결되어 있는 제3트랜지스터와 제4트랜지스터 각각의 소스로 입력되어 각 드레인으로 출력되며, 제3트랜지스터의 드레인과 제4트랜지스터의 드레인 각각을 통하여 나타난 양 및 음의 출력전류가 게이트가 서로 연결되어 있고 소스가 전원에 연결되어 있는 제11트랜지스터와 제12트랜지스터 각각의 드레인으로 입력되고 또한 게이트가 서로 연결되어 있고 각 드레인이 출력으로 연결되어 있는 제9트랜지스터와 제10트랜지스터 각각의 소스 각각으로도 입력되며, 게이트가 서로 연결되어 있으며 소스가 모두 접지로 연결되어 있는 제5트랜지스터와 제6트랜지스터 각각의 드레인이 게이트가 서로 연결되어 있는 제7트랜지스터와 제8트랜지스터 각각의 소스와 연결되어 있으며, 제7트랜지스터의 드레인과 제8트랜지스터의 드레인과 제9트랜지스터의 드레인과 제10트랜지스터의 드레인이 서로 연결되어 있는 단자를 통하여 전류가 출력되는 데에 있으므로, 본 발명은 저전압 전원에서 동작하며 전력소모가 적고 출력 전압의 스윙 범위가 넓어서, 휴대 전화기와 같이 저전압이 요구되는 휴대용 전자 통신기에 유용하다는데에 그 효과가 있다.The present invention relates to a low voltage CMOS transconductance device which operates at a low voltage power source and uses a CMOS having low power consumption and a wide swing range of output voltage to obtain a transconductance. In the transconductance device that converts the input voltage to the output current using CMOS, the gate of the first transistor and the gate of the second transistor are used as positive and negative input terminals, respectively, and the source is connected to ground, and each drain The positive and negative current outputs are displayed through the input, and the positive and negative output currents through the drain of the first transistor and the drain of the second transistor are respectively input to the sources of the third and fourth transistors whose gates are connected to each other. Outputted to each drain, and the drain and fourth of the third transistor The positive and negative output currents shown through the drains of the transistors are respectively input to the drains of the 11th and 12th transistors whose gates are connected to each other, and the source is connected to the power supply, and the gates are connected to each other. It is also input to each of the sources of the ninth and tenth transistors connected to the outputs, and the drains of the fifth and sixth transistors of which the gates are connected to each other and the sources are connected to ground are connected to the gates. The current is connected through the terminals of the seventh and eighth transistors, and the drain of the seventh transistor, the drain of the eighth transistor, the drain of the ninth transistor, and the drain of the tenth transistor are connected to each other. In the low voltage power supply Small and low power consumption, the swing range of the output voltage wide, there is the effect to a portable electronic communication device that is useful daneunde low voltage is required, such as a portable telephone.

Description

Low Voltage CMOS Transconductance Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 따른 저전압 CMOS 트랜스컨덕턴스 장치의 전체 회로도.1 is an overall circuit diagram of a low voltage CMOS transconductance device according to the present invention.

Claims

In a transconductance device used at low voltage and converting an input voltage into an output current using CMOS for low power consumption, the gate of the first transistor and the gate of the second transistor are used as positive and negative input terminals, respectively, and the source is grounded. Connected to the positive and negative current outputs through each drain; Positive and negative output currents, which are generated through the drains of the first transistor and the drains of the second transistor, are respectively input to the sources of the third and fourth transistors having gates connected to each other, and are outputted to the respective drains; The positive and negative output currents through the drain of the third transistor and the drain of the fourth transistor are respectively input to the drain of each of the eleventh and twelfth transistors whose gates are connected to each other and the source is connected to a power source. Are also input to each of the sources of each of the ninth and tenth transistors, which are connected to each other and each drain is connected to an output; A drain of each of the fifth and sixth transistors whose gates are connected to each other and the sources are all connected to ground is connected to a source of each of the seventh and eighth transistors whose gates are connected to each other; A low voltage CMOS transconductance device, characterized in that current is output through a terminal connected between the drain of the seventh transistor, the drain of the eighth transistor, the drain of the ninth transistor, and the drain of the tenth transistor.

※ Note: The disclosure is based on the initial application.