KR970054247A - NAND type nonvolatile memory device - Google Patents

NAND type nonvolatile memory device Download PDF

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Publication number
KR970054247A
KR970054247A KR1019950067032A KR19950067032A KR970054247A KR 970054247 A KR970054247 A KR 970054247A KR 1019950067032 A KR1019950067032 A KR 1019950067032A KR 19950067032 A KR19950067032 A KR 19950067032A KR 970054247 A KR970054247 A KR 970054247A
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KR
South Korea
Prior art keywords
channel
select transistor
string
type
memory device
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KR1019950067032A
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Korean (ko)
Inventor
최정달
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김광호
삼성전자 주식회사
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Priority to KR1019950067032A priority Critical patent/KR970054247A/en
Publication of KR970054247A publication Critical patent/KR970054247A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8236—Combination of enhancement and depletion transistors

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Read Only Memory (AREA)

Abstract

본 발명은 NAND형 비휘발성 메모리 소자에 관한 것으로서, 각 스트링에 포함되는 채널공핍형 및 채널증가형 선택트랜지스터 중에서 채널공핍형 선택트랜지스터의 문턱전압을 증가시켜 셀동작2 성능을 향상시킨다.The present invention relates to a NAND type nonvolatile memory device, and increases a threshold voltage of a channel depletion type select transistor among channel depletion type and channel increase type select transistors included in each string to improve cell operation 2 performance.

본 발명은 채널중가형 제1스트링 선택트랜지스터, 채널공핍형 제2스트링 선택트랜지스터, 다수의 셀트랜지스터, 채널공핍형 제3소오스 선택트랜지스터, 채널증가형 제4소오스 선택트랜지스터가 순차적으로 직렬로 연결되는 제1스트링과; 상기 제1스트링과 비트라인 및 소오스라인을 공유하고 동일 방향으로 나란히 위치되는 동시에; 채널공핍형 제1스트링 선택트랜지스터, 채널중가형 제2스트링 선택트랜지스터, 다수의 셀트랜지스터, 채널중가형 제3소오스 선택트랜지스터, 채널공핍형 제4소오스 선택트랜지스터가 순차적으로 직렬로 연결되는 제2스트링(200)을 포함하여 구성되는 NAND형 비휘발성 메모리 소자에 있어서, 상기 채널공핍형 선택트랜지스터의 게이트 산화막의 두께가 상기 채널중가형 선택트랜지스터의 게이트 산화막의 두께보다 더 두껍게 형성된 것을 특징으로 한다.According to the present invention, a channel-weighted first string select transistor, a channel depleted second string select transistor, a plurality of cell transistors, a channel depleted third source select transistor, and a channel-increased fourth source select transistor are sequentially connected in series. A first string; Simultaneously sharing bit lines and source lines with the first string and being positioned side by side in the same direction; A second string in which the channel depletion type first string select transistor, the channel weight type second string select transistor, the plurality of cell transistors, the channel weight type third source select transistor, and the channel depletion type fourth source select transistor are sequentially connected in series. In the NAND type nonvolatile memory device including 200, the thickness of the gate oxide film of the channel depletion type selection transistor is thicker than the thickness of the gate oxide film of the channel weighting type select transistor.

Description

NAND형 비휘발성 메모리 소자NAND type nonvolatile memory device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제6도는 본 발명에 의한 NAND형 비휘발성 메모리 소자를 구성하는 스트링블록을 나타내는 등가회로도이다.6 is an equivalent circuit diagram showing a string block constituting a NAND type nonvolatile memory device according to the present invention.

Claims (4)

채널중가형 제1스트링 선택트랜지스터, 채널공핍형 제2스트링 선택트랜지스터, 다수의 셀트랜지스터, 채널공립형 제3소오스 선택트랜지스터, 채널중가형 제4소오스 선택트랜지스터가 순차적으로 직렬로 연결되는 제1스트링과; 상기 제1스트링과 비트라인 및 소오스라인을 공유하고 동일방향으로 나란히 위치되는 동시에; 채널공핍형 제1스트링 선택트랜지스터, 채널중가형 제2스트링 선택트랜지스터, 다수의 셀트랜지스터, 채널중가형 제3소오스 선택트랜지스터, 채널공핍형 제4소오스 선택트랜지스터가 순차적으로 직렬로 연결되는 제2스트링(200)을 포함하여 구성되는 NAND형 비휘발성 메모리 소자에 있어서, 상기 각 스트링의 채널공핍형 선택트랜지스터의 게이트 산화막의 두께가 상기 채널중가형 선택트랜지스터 및 셀트랜지스터의 게이트 산화막의 두께보다 더 두껍게 형성된 것을 특징으로 하는 NAND형 비휘발성 메모리 소자.A first string in which a channel-weighted first string select transistor, a channel depletion-type second string select transistor, a plurality of cell transistors, a channel-public third source select transistor, and a channel-weighted fourth source select transistor are sequentially connected in series and; Simultaneously sharing bit lines and source lines with the first string and being located side by side in the same direction; A second string in which the channel depletion type first string select transistor, the channel weight type second string select transistor, the plurality of cell transistors, the channel weight type third source select transistor, and the channel depletion type fourth source select transistor are sequentially connected in series. The NAND type nonvolatile memory device including 200, wherein the thickness of the gate oxide layer of the channel depletion type selection transistor of each string is greater than the thickness of the gate oxide layer of the channel weighting type selection transistor and the cell transistor. NAND type nonvolatile memory device, characterized in that. 제1항에 있어서, 상기 채널공핍형 선택트랜지스터의 게이트 산화막 두께는 300A 내지 1000A임을 특징으로 하는 NAND형 비휘발성 메모리 소자.The NAND type nonvolatile memory device of claim 1, wherein a thickness of the gate oxide layer of the channel depletion select transistor is 300A to 1000A. 제1항에 있어서, 상기 채널중가형 선택트랜지스터의 게이트 산화막 두께는 100A 내지 300A임을 특징으로 하는 NAND형 비휘발성 메모리 소자.The NAND type nonvolatile memory device of claim 1, wherein the gate oxide layer has a thickness of 100A to 300A. 제1항에 있어서, 상기 셀트랜지스터의 게이트 산화막 두께는 70A 내지 100A임을 특징으로 하는 NAND형 비휘발성 메모리 소자.The NAND type nonvolatile memory device of claim 1, wherein the gate oxide layer of the cell transistor has a thickness of about 70A to about 100A. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950067032A 1995-12-29 1995-12-29 NAND type nonvolatile memory device KR970054247A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990071463A (en) * 1998-02-05 1999-09-27 가나이 쓰토무 Semiconductor integrated circuit device
KR100779479B1 (en) * 2004-12-24 2007-11-26 가부시키가이샤 리코 Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990071463A (en) * 1998-02-05 1999-09-27 가나이 쓰토무 Semiconductor integrated circuit device
KR100779479B1 (en) * 2004-12-24 2007-11-26 가부시키가이샤 리코 Semiconductor device

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