KR970052507A - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

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Publication number
KR970052507A
KR970052507A KR1019950069550A KR19950069550A KR970052507A KR 970052507 A KR970052507 A KR 970052507A KR 1019950069550 A KR1019950069550 A KR 1019950069550A KR 19950069550 A KR19950069550 A KR 19950069550A KR 970052507 A KR970052507 A KR 970052507A
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KR
South Korea
Prior art keywords
polysilicon
semiconductor device
depositing
manufacturing
gas
Prior art date
Application number
KR1019950069550A
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Korean (ko)
Inventor
여태정
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019950069550A priority Critical patent/KR970052507A/en
Publication of KR970052507A publication Critical patent/KR970052507A/en

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

본 발명은 반도체 소자의 제조방법에 관한 것으로, 보다 구체적으로는 반도체 소자의 콘택홀을 형성하고, 폴리실리콘을 형성하여 콘택을 이루는 공정시 미세한 콘택홀 내에 고르게 분포됨과 더불어 스텝 커버리지를 향상시킬 수 있는 반도체 소자의 제조방법에 관한 것으로, 반도체 소자의 스토리지 노드 전극 또는 비트 라인의 형성 공정시, 폴리실리콘의 스텝 커버리지를 향상시키기 위하여 표면이 거친 제1폴리실리콘을 형성하고, 불순물이 주입된 제2폴리실리콘을 형성한 다음, 표면이 평탄한 제3폴리실리콘을 순차적으로 형성하고, 이어서, 열처리 공정을 실시하므로써, 소자의 스텝 커버리지가 향상되고, 이로써, 소자의 질을 향상시킬 수 있다.The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to form stepped contact holes of a semiconductor device, to form polysilicon, and to evenly distribute the contact holes in the contact hole and to improve step coverage. A method of fabricating a semiconductor device, the method comprising: forming a coarse first polysilicon to improve step coverage of polysilicon in a process of forming a storage node electrode or a bit line of a semiconductor device, and injecting impurities into a second poly After silicon is formed, third polysilicon having a flat surface is sequentially formed, and then a heat treatment step is performed to improve the step coverage of the device, thereby improving the quality of the device.

Description

반도체 소자의 제조방법Manufacturing method of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 본 발명에 따른 반도체 소자의 제조방법을 설명하기 위한 도면.2 is a view for explaining a method of manufacturing a semiconductor device according to the present invention.

Claims (7)

반도체 소자를 구성하는 기본 전극이 구비된 반도체 기판 상부에 절연층을 형성하고, 콘택홀을 형성한 다음, 폴리실리콘을 증착하여 전극을 형성하는 단계를 포함하는 반도체 소자의 제조방법에 있어서, 상기 폴리실리콘을 증착하는 방법은, 표면이 거친 제1폴리실리콘을 증착하는 단계; 상기 제1폴리실리콘 상부에 불순물을 함유한 제2폴리실리콘을 증착하는 단계; 상기 제2폴리실리콘 상부에 표면이 평탄한 제3폴리실리콘을 증착하는 단계 및 열처리 하는 단계를 포함하는 것을 특징으로 하는 반도체 소자의 제조방법.A method of manufacturing a semiconductor device, the method comprising: forming an insulating layer on a semiconductor substrate having a basic electrode constituting a semiconductor device, forming a contact hole, and then depositing polysilicon to form an electrode; The method of depositing silicon includes depositing a roughened first polysilicon; Depositing a second polysilicon containing an impurity on the first polysilicon; And depositing a third polysilicon having a flat surface on the second polysilicon and performing a heat treatment. 제1항에 있어서, 상기 제1폴리실리콘은 550 내지 650℃에서 증착하는 것을 특징으로 하는 반도체 소자의 제조방법.The method of claim 1, wherein the first polysilicon is deposited at 550 to 650 ° C. 7. 제1항 또는 제2항에 있어서, 상기 제1폴리실리콘을 증착하기 위한 증착 개스로는 SiH4와 H2개스를 이용하는 것을 특징으로 하는 반도체 소자의 제조방법.The method of claim 1, wherein SiH 4 and H 2 gas are used as the deposition gas for depositing the first polysilicon. 제1항에 있어서, 상기 제2폴리실리콘은 550 내지 650℃에서 증착하는 것을 특징으로 하는 반도체 소자의 제조방법.The method of claim 1, wherein the second polysilicon is deposited at 550 to 650 ° C. 7. 제1항 또는 제4항에 있어서, 상기 제2폴리실리콘을 증착하기 위한 증착 개스로는 SiH4와 PH3개스를 이용하는 것을 특징으로 하는 반도체 소자의 제조방법.The method for manufacturing a semiconductor device according to claim 1 or 4, wherein SiH 4 and PH 3 gas are used as the deposition gas for depositing the second polysilicon. 제1항에 있어서, 상기 제3폴리실리콘은 500 내지 590℃에서 증착하는 것을 특징으로 하는 반도체 소자의 제조방법.The method of claim 1, wherein the third polysilicon is deposited at 500 to 590 ° C. 7. 제1항 또는 제6항에 있어서, 상기 제3폴리실리콘을 증착하기 위한 증착 개스로는 SiH4와 H2개스를 이용하는 것을 특징으로 하는 반도체 소자의 제조방법.The method of manufacturing a semiconductor device according to claim 1 or 6, wherein SiH 4 and H 2 gas are used as the deposition gas for depositing the third polysilicon. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950069550A 1995-12-30 1995-12-30 Manufacturing method of semiconductor device KR970052507A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950069550A KR970052507A (en) 1995-12-30 1995-12-30 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950069550A KR970052507A (en) 1995-12-30 1995-12-30 Manufacturing method of semiconductor device

Publications (1)

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KR970052507A true KR970052507A (en) 1997-07-29

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KR1019950069550A KR970052507A (en) 1995-12-30 1995-12-30 Manufacturing method of semiconductor device

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100728284B1 (en) * 2006-09-07 2007-06-13 두산인프라코어 주식회사 Ball screw device for preventing interference

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100728284B1 (en) * 2006-09-07 2007-06-13 두산인프라코어 주식회사 Ball screw device for preventing interference

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