KR970052380A - Method of forming protective film of semiconductor device - Google Patents

Method of forming protective film of semiconductor device Download PDF

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Publication number
KR970052380A
KR970052380A KR1019950058461A KR19950058461A KR970052380A KR 970052380 A KR970052380 A KR 970052380A KR 1019950058461 A KR1019950058461 A KR 1019950058461A KR 19950058461 A KR19950058461 A KR 19950058461A KR 970052380 A KR970052380 A KR 970052380A
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KR
South Korea
Prior art keywords
film
forming
protective film
semiconductor device
metal wiring
Prior art date
Application number
KR1019950058461A
Other languages
Korean (ko)
Other versions
KR100341848B1 (en
Inventor
이창권
Original Assignee
김주용
현대전자산업주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업주식회사 filed Critical 김주용
Priority to KR1019950058461A priority Critical patent/KR100341848B1/en
Publication of KR970052380A publication Critical patent/KR970052380A/en
Application granted granted Critical
Publication of KR100341848B1 publication Critical patent/KR100341848B1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76837—Filling up the space between adjacent conductive structures; Gap-filling properties of dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

본 발명은 반도체 소자의 보호막 형성 방법에 관한 것으로, 보호막 형성시 발생되는 보이드(Void)로 인한 금속 배선의 결함을 방지하기 위하여 최상부 금속 배선의 하부에 캐핑막을 형성하고, 상기 최상부 금속 배선을 폴리이마이드(Polyimide)막으로 보호하므로써 금속 배선에 결함이 발생되지 않도록 하여 소자의 신뢰성을 향상시키며, 공정을 단순화시킬 수 있는 반도체 소자의 보호막 형성 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a protective film of a semiconductor device, wherein a capping film is formed below the uppermost metal wiring to prevent defects in the metal wiring due to voids generated when the protective film is formed, and the uppermost metal wiring is formed of polyimide. The present invention relates to a method of forming a protective film for a semiconductor device which can improve the reliability of the device and simplify the process by preventing defects in the metal wiring by protecting with a (Polyimide) film.

Description

반도체 소자의 보호막 형성 방법Method of forming protective film of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2A도 내지 제2C도는 본 발명에 따른 반도체 소자의 보호막 형성 방법을 설명하기 위한 소자의 단면도.2A to 2C are cross-sectional views of a device for explaining a method of forming a protective film of a semiconductor device according to the present invention.

Claims (6)

반도체 소자의 보호막 형성 방법에 있어서, 절연층이 형성된 실리콘 기판상에 하부 금속 배선을 형성한 후 전체 상부면에 금속층간 절연막을 형성하고 표면을 평탄화시키는 단계와, 상기 단계로부터 상기 금속층간 절연막상에 굴절율이 높은 캐핑막을 형성하는 단계와, 상기 단계로부터 상기 캐핑막상에 상부 금속 배선을 형성한 후 전체 상부면에 폴리이마이드막을 형성하는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 보호막 형성 방법.A method of forming a protective film for a semiconductor device, comprising: forming a lower metal wiring on a silicon substrate on which an insulating layer is formed, forming an intermetallic insulating film on the entire upper surface, and planarizing the surface; Forming a capping film having a high refractive index, and forming a polyimide film on the entire upper surface after forming an upper metal wiring on the capping film from the step. 제1항에 있어서, 상기 캐핑막은 2000 내지 5000Å의 두께로 형성된 것을 특징으로 하는 반도체 소자의 보호막 형성 방법.The method of claim 1, wherein the capping film has a thickness of 2000 to 5000 kPa. 제1 또는 제2항에 있어서, 상기 캐핑막은 옥시나이트라이드인 것을 특징으로 하는 반도체 소자의 보호막 형성 방법.The method of claim 1, wherein the capping film is oxynitride. 제1 또는 제2항에 있어서, 상기 캐핑막은 질화막인 것을 특징으로 하는 반도체 소자의 보호막 형성 방법.The method of claim 1, wherein the capping film is a nitride film. 제1항에 있어서, 상기 폴리이마이드막은 2 내지 5μ의 두께로 형성된 것을 특징으로 하는 반도체 소자의 보호막 형성 방법.The method of claim 1, wherein the polyimide film is formed to a thickness of 2 to 5 μm. 제1항에 있어서, 상기 폴리이마이드막을 형성하는 단계로부터 상기 폴리이마이드막을 열처리하는 단계를 더 포함하는 것을 특징으로 하는 반도체 소자의 보호막 형성 방법.The method of claim 1, further comprising heat treating the polyimide film from forming the polyimide film. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950058461A 1995-12-27 1995-12-27 Method for fabricating passivation layer of semiconductor device KR100341848B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950058461A KR100341848B1 (en) 1995-12-27 1995-12-27 Method for fabricating passivation layer of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950058461A KR100341848B1 (en) 1995-12-27 1995-12-27 Method for fabricating passivation layer of semiconductor device

Publications (2)

Publication Number Publication Date
KR970052380A true KR970052380A (en) 1997-07-29
KR100341848B1 KR100341848B1 (en) 2002-11-07

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950058461A KR100341848B1 (en) 1995-12-27 1995-12-27 Method for fabricating passivation layer of semiconductor device

Country Status (1)

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KR (1) KR100341848B1 (en)

Also Published As

Publication number Publication date
KR100341848B1 (en) 2002-11-07

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