KR970052327A

KR970052327A - Metal line formation method of semiconductor device

Info

Publication number: KR970052327A
Application number: KR1019950054367A
Authority: KR
Inventors: 이창석
Original assignee: 김주용; 현대전자산업 주식회사
Priority date: 1995-12-22
Filing date: 1995-12-22
Publication date: 1997-07-29

Abstract

1. 청구범위에 기재된 발명이 속한 기술분야1. TECHNICAL FIELD OF THE INVENTION

반도체 소자 제조 방법.Semiconductor device manufacturing method.

2. 발명이 해결하려고 하는 기술적 과제2. The technical problem to be solved by the invention

금속라인을 형성하는데 있어서, 금속층을 형성하고 포토레지스트 패턴을 형성한 후 노광 공정을 통해 금속라인을 정의하는데, 상기 노광 공정에서 금속층의 반사 현상으로 형성하고자 하는 패턴에 노치가 생기므로 불량하고 수율이 낮은 금속라인이 형성된다는 문제점을 해결하고자 함.In forming a metal line, a metal layer is formed, a photoresist pattern is formed, and then a metal line is defined through an exposure process. In the exposure process, a notch is generated in a pattern to be formed by reflection of the metal layer. To solve the problem that low metal line is formed.

3. 발명의 해결방법의 요지3. Summary of Solution to Invention

금속층을 형성하기 전에 폴리이미드층을 형성하고 금속층이 형성될 오픈된 영역을 형성한 후 금속층을 형성함으로써, 노광시 금속층의 반사현상에 의해 포토레지스트 패턴에 결함이 생기는 것을 방지한 금속라인을 형성하고자 함.Before forming the metal layer, a polyimide layer is formed, an open region in which the metal layer is to be formed, and then a metal layer is formed to form a metal line which prevents defects in the photoresist pattern due to reflection of the metal layer during exposure. box.

4. 발명의 주용한 용도4. Main use of the invention

고집적 반도체 소자의 금속 라인을 형성하는데 이용됨.Used to form metal lines in highly integrated semiconductor devices.

Description

Metal line formation method of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2A도 내지 제2E도는 본 발명의 반도체 소자의 금속라인 형성 방법의 한 실시예에 따른 공정도.2A through 2E are process diagrams according to one embodiment of a method for forming a metal line of a semiconductor device of the present invention.

Claims

A method of forming a metal line of a semiconductor device, the method comprising: applying a polyimide on a structure on which a lower layer and an oxide film are formed on a semiconductor substrate, forming a first photoresist pattern for forming a metal contact hole, and forming the first photoresist pattern; Etching the polyimide layer and the oxide layer sequentially using a resist pattern as an etch barrier, forming a second photoresist pattern for forming a metal line, and then using the second photoresist pattern as an etch barrier. Etching the mid layer, removing the remaining photoresist and depositing a metal layer, performing planar etching until the polyamide layer is exposed, and removing the polyimide layer. Metal line formation method.

The method of claim 1, wherein the thickness of depositing the polyimide is about 20000 GPa.

※ Note: The disclosure is based on the initial application.