KR970052167A - Diffusion Area Formation Method with Good Substrate Surface in Semiconductor Device Manufacturing - Google Patents

Diffusion Area Formation Method with Good Substrate Surface in Semiconductor Device Manufacturing Download PDF

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Publication number
KR970052167A
KR970052167A KR1019950068469A KR19950068469A KR970052167A KR 970052167 A KR970052167 A KR 970052167A KR 1019950068469 A KR1019950068469 A KR 1019950068469A KR 19950068469 A KR19950068469 A KR 19950068469A KR 970052167 A KR970052167 A KR 970052167A
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KR
South Korea
Prior art keywords
ions
implanting
impurity
substrate surface
silicon
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KR1019950068469A
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Korean (ko)
Inventor
김광일
정욱진
권영규
배영호
Original Assignee
김종진
포항종합제철 주식회사
신창식
재단법인 산업과학기술연구소
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Application filed by 김종진, 포항종합제철 주식회사, 신창식, 재단법인 산업과학기술연구소 filed Critical 김종진
Priority to KR1019950068469A priority Critical patent/KR970052167A/en
Publication of KR970052167A publication Critical patent/KR970052167A/en

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  • Drying Of Semiconductors (AREA)
  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

본 발명은 반도체소자의 제조방법에 관한 것으로써, 게르마늄이온 혹은 실리콘 이온을 주입하여 비정질층을 일정깊이 이상 형성함으로써 기판표면이 양호한 확산영역을 형성하는 방법을 제공한다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and provides a method of forming a diffusion region having a good substrate surface by implanting germanium ions or silicon ions to form an amorphous layer or more.

본 발명의 방법은 실리콘 기판에 SiO2산화막을 형성한 후 이온이 주입되는 부위를 에칭제거하는 단계; 상기 이온주입 부위를 통해 불순물 이온을 주입하기 전에 그 불순물의 비정거리 보가 깊은 곳까지 비정질층을 형성하기 위하여 임계 도오즈량 이상의 게르마늄 혹은 실리콘 이온을 주입하는 단계; 상기 이온주입 부위를 통해 기판내에 불순물 이온을 주입한 단계; 및 질소 분위기하에서 650℃이상의 온도에서 급속열처리함을 포함한다.The method of the present invention comprises the steps of forming an SiO 2 oxide film on a silicon substrate and etching away the sites where ions are implanted; Implanting germanium or silicon ions of a critical dose or more in order to form an amorphous layer up to a deep distance of an impurity of the impurity before implanting the impurity ions through the ion implantation site; Implanting impurity ions into the substrate through the ion implantation site; And rapid heat treatment at a temperature of at least 650 ° C. under a nitrogen atmosphere.

이에 따라 기판표면이 양호한 확산영역이 얻어진다.As a result, a diffusion region having a good substrate surface is obtained.

Description

반도체소자제조에 있어서 양호한 기판표면을 갖는 확산영역형성방법Diffusion Area Formation Method with Good Substrate Surface in Semiconductor Device Manufacturing

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

Claims (3)

반도체소자의 제조방법에 있어서, 실리콘 기판에 SiO2산화막을 형성한 후 이온이 주입되는 부위를 에칭 제거하는 단계; 상기 이온주입 부위를 통해 불순물(dopant)이온을 주입하기전에 그 불순물의 비정거리보다 깊은 곳까지 비정질층을 형성하기 위하여 임계 도우즈량 이상의 게르마늄 이온 혹은 실리콘이온을 이온주입하는 단계; 상기 이온주입 부위를 통해 기판내에 불순물을 주입하는 단계; 및 질소부위하에서 상기에서 얻은 결과물을 650℃이상에서 급속 열처리하여 확산영역을 형성하는 단계를 포함하는 양호한 기판 표면을 갖는 확산영역 형성방법.A method of manufacturing a semiconductor device, comprising: forming a SiO 2 oxide film on a silicon substrate and etching away a portion into which ions are implanted; Implanting germanium ions or silicon ions having a threshold dose or more in order to form an amorphous layer to a depth deeper than an impurity of the impurities before implanting the dopant ions through the ion implantation site; Implanting impurities into the substrate through the ion implantation site; And rapidly heat-treating the resultant obtained above under a nitrogen region at 650 ° C. to form a diffusion region. 제1항에 있어서, 상기 게르마늄이온 혹은 실리콘 이온을 1×1015/㎠이상의 도우즈량으로 주입함을 특징으로 하는 방법.The method of claim 1, wherein the germanium ions or silicon ions are implanted in a dose of 1 × 10 15 / cm 2 or more. 제1항에 있어서, 상기 기판은 n형 실리콘 기판이고, 상기 불순물은 붕소(B)임을 특징으로 하는 방법.The method of claim 1, wherein the substrate is an n-type silicon substrate, and the impurity is boron (B). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950068469A 1995-12-30 1995-12-30 Diffusion Area Formation Method with Good Substrate Surface in Semiconductor Device Manufacturing KR970052167A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950068469A KR970052167A (en) 1995-12-30 1995-12-30 Diffusion Area Formation Method with Good Substrate Surface in Semiconductor Device Manufacturing

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Application Number Priority Date Filing Date Title
KR1019950068469A KR970052167A (en) 1995-12-30 1995-12-30 Diffusion Area Formation Method with Good Substrate Surface in Semiconductor Device Manufacturing

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KR970052167A true KR970052167A (en) 1997-07-29

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100310821B1 (en) * 1998-06-15 2001-12-17 김영환 Semiconductor defect improvement method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100310821B1 (en) * 1998-06-15 2001-12-17 김영환 Semiconductor defect improvement method

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