KR970051648A

KR970051648A - Interface device of PDDP display device

Info

Publication number: KR970051648A
Application number: KR1019950064310A
Authority: KR
Inventors: 김한성
Original assignee: 배순훈; 대우전자 주식회사
Priority date: 1995-12-29
Filing date: 1995-12-29
Publication date: 1997-07-29

Abstract

본 발명은 피디피(PDP)의 디스플레이 장치의 인터페이스 장치에 관한 것으로, 메모리에 저장된 디지탈 영상데이타가 메모리 제어부로부터의 선택신호(S)에 이거하여 라인 메모리블럭 내의 제1라인 메모리(LM1)와 제2라인 메모리(LM2)에 선택적으로 저장되고, 메모리 제어부로부터의 번지(A)에 상응하는 비트값이 어드레싱부로 제공된 다음PDP의 어드레싱 전극으로 어드레싱되므로써, 라인 메모리(LM1, LM2)를 이용하여 메모리와 어드레싱부를 인터페이스하므로, 어드레싱부의 스펙변경에 따라 메모의 제어부의 번지(A)를 변경하여 대응할 수 있고, 인터페이스를 디지탈 로직 대신에 라인 메모리를 사용하므로 제박비용을 절감시킬 수 있도록 한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an interface device of a display device of a PDP, wherein the digital image data stored in the memory is based on the selection signal S from the memory control unit and the first line memory LM1 and the second line in the line memory block. It is selectively stored in the line memory LM2, and a bit value corresponding to the address A from the memory controller is addressed to the addressing electrode of the next PDP provided to the addressing unit, thereby addressing the memory using the line memories LM1 and LM2. Since the interface is interfaced, the address A of the control unit of the memo can be changed according to the specification change of the addressing unit, and the interface can be used instead of the digital logic to reduce the gambling cost.

※ 선택도 : 제1도※ Selectivity: 1st

Description

Interface device of PDDP display device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명의 바람직한 실시예에 따른 PDP디스플레이 장치의 인터페이스 장치에 대한 개략적인 블럭 구성도.1 is a schematic block diagram of an interface device of a PDP display device according to a preferred embodiment of the present invention.

Claims

Memory control means 10 for generating a write address and a read address, and recording the digital image data on the basis of the write address from the memory control means 110 and then corresponding to the read address from the memory control means 110; A memory 120 for reading the digital image data, an interface means 130 for interfacing the digital image data read out from the memory 120 to the addressing allowance 140 of the PDP display device, and the interface means. An apparatus for providing interfaced digital image data to the addressing means (140) of the PDP display device, the interface means comprising: a; Selected based on the selection signal from the memory control means 110, and temporarily stores the digital image data read and provided from the memory 120, and then a bit value corresponding to the address provided from the memory control unit 110 And a plurality of line memories (130) for providing to the addressing means (140) of the PDP display device.

※ Note: The disclosure is based on the initial application.