KR970048316U - Reference clock generator of MPEG-2 video decoder - Google Patents

Reference clock generator of MPEG-2 video decoder

Info

Publication number
KR970048316U
KR970048316U KR2019950038371U KR19950038371U KR970048316U KR 970048316 U KR970048316 U KR 970048316U KR 2019950038371 U KR2019950038371 U KR 2019950038371U KR 19950038371 U KR19950038371 U KR 19950038371U KR 970048316 U KR970048316 U KR 970048316U
Authority
KR
South Korea
Prior art keywords
mpeg
video decoder
reference clock
clock generator
generator
Prior art date
Application number
KR2019950038371U
Other languages
Korean (ko)
Other versions
KR200141123Y1 (en
Inventor
유기령
Original Assignee
엘지반도체주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 엘지반도체주식회사 filed Critical 엘지반도체주식회사
Priority to KR2019950038371U priority Critical patent/KR200141123Y1/en
Publication of KR970048316U publication Critical patent/KR970048316U/en
Application granted granted Critical
Publication of KR200141123Y1 publication Critical patent/KR200141123Y1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T9/00—Image coding
    • G06T9/007—Transform coding, e.g. discrete cosine transform
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/4302—Content synchronisation processes, e.g. decoder synchronisation
    • H04N21/4305—Synchronising client clock from received content stream, e.g. locking decoder clock with encoder clock, extraction of the PCR packets
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/20—Servers specifically adapted for the distribution of content, e.g. VOD servers; Operations thereof
    • H04N21/23—Processing of content or additional data; Elementary server operations; Server middleware
    • H04N21/242—Synchronization processes, e.g. processing of PCR [Program Clock References]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/434—Disassembling of a multiplex stream, e.g. demultiplexing audio and video streams, extraction of additional data from a video stream; Remultiplexing of multiplex streams; Extraction or processing of SI; Disassembling of packetised elementary stream
    • H04N21/4344—Remultiplexing of multiplex streams, e.g. by modifying time stamps or remapping the packet identifiers

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Discrete Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)
KR2019950038371U 1995-12-05 1995-12-05 Clock generator for mpeg ii video decoder KR200141123Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019950038371U KR200141123Y1 (en) 1995-12-05 1995-12-05 Clock generator for mpeg ii video decoder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019950038371U KR200141123Y1 (en) 1995-12-05 1995-12-05 Clock generator for mpeg ii video decoder

Publications (2)

Publication Number Publication Date
KR970048316U true KR970048316U (en) 1997-07-31
KR200141123Y1 KR200141123Y1 (en) 1999-05-01

Family

ID=19432065

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019950038371U KR200141123Y1 (en) 1995-12-05 1995-12-05 Clock generator for mpeg ii video decoder

Country Status (1)

Country Link
KR (1) KR200141123Y1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100359782B1 (en) * 2000-11-27 2002-11-04 주식회사 하이닉스반도체 Method and Device for the system time clock control from MPEG Decoder

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100359782B1 (en) * 2000-11-27 2002-11-04 주식회사 하이닉스반도체 Method and Device for the system time clock control from MPEG Decoder

Also Published As

Publication number Publication date
KR200141123Y1 (en) 1999-05-01

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