KR970024913A - Video signal converter for video shooting - Google Patents

Video signal converter for video shooting Download PDF

Info

Publication number
KR970024913A
KR970024913A KR1019950033698A KR19950033698A KR970024913A KR 970024913 A KR970024913 A KR 970024913A KR 1019950033698 A KR1019950033698 A KR 1019950033698A KR 19950033698 A KR19950033698 A KR 19950033698A KR 970024913 A KR970024913 A KR 970024913A
Authority
KR
South Korea
Prior art keywords
signal
synchronization
video
input
image
Prior art date
Application number
KR1019950033698A
Other languages
Korean (ko)
Other versions
KR0164255B1 (en
Inventor
이완
Original Assignee
이완
신영상정보통신 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 이완, 신영상정보통신 주식회사 filed Critical 이완
Priority to KR1019950033698A priority Critical patent/KR0164255B1/en
Publication of KR970024913A publication Critical patent/KR970024913A/en
Application granted granted Critical
Publication of KR0164255B1 publication Critical patent/KR0164255B1/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0127—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level by changing the field or frame frequency of the incoming video signal, e.g. frame rate converter
    • H04N7/0132—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level by changing the field or frame frequency of the incoming video signal, e.g. frame rate converter the field or frame frequency of the incoming video signal being multiplied by a positive integer, e.g. for flicker reduction
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/04—Synchronising
    • H04N5/08—Separation of synchronising signals from picture signals
    • H04N5/10—Separation of line synchronising signal from frame synchronising signal or vice versa
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S348/00—Television
    • Y10S348/91—Flicker reduction

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Television Systems (AREA)
  • Controls And Circuits For Display Device (AREA)

Abstract

본 발명은 컴퓨터 화면에 디스플레이 되는 영상을 비디오 카메라로 촬영하여 이를 다시 방송용 화면이나 별도의 디스플레이 장치에 전송시켜 디스플레이 시킬 때, 컴퓨터의 신호를 입력하고 필요한 화각 확대율에서 화소(pixel)정보의 열화없이 수직 주파수차의 플리커(flicker)나 인터레이스에 의한 필드 플리커를 제거시키는 비디오 촬영용 영상신호 변환장치에 관한 것으로, 소스 화상을 제공하는 컴퓨터에서 제공된 화상 데이터와, 이를 촬영하는 비디오 카메라의 주파수 동기를 확립하고, 소스 화상 데이터의 출력 라인수의 변화없이 주사할 수 있도록 한 다음 상기와 같이 변환된 데이터를 타 디스플레이 장치에 주사하여 비디오 촬영을 하므로, 화면의 플리커 제거는 물론 화상의 해상도 저하의 문제를 제거하는 효과가 있다.The present invention inputs a computer signal and displays the image displayed on a computer screen with a video camera and transmits it to a broadcast screen or a separate display device, and displays the image without deterioration of pixel information at a necessary angle of view magnification. A video signal converting apparatus for video shooting that eliminates field flicker due to flicker or interlacing of a frequency difference, the method comprising: establishing image data provided by a computer providing a source image and frequency synchronization of a video camera photographing the same; The video can be scanned without changing the number of output lines of the source image data, and then the converted data is scanned on another display device to shoot video, thereby eliminating the problem of flickering the screen and reducing the resolution of the image. There is.

Description

비디오 촬영용 영상신호 변환장치Video signal converter for video shooting

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제3도는 본 발명에 의한 영상신호 변환장치를 나타내는 블럭도3 is a block diagram showing a video signal conversion apparatus according to the present invention.

Claims (4)

소스 화상을 제공하는 컴퓨터(1)에서 화상 신호를 입력받아 표푼동기 제공부(30)에서 제공되는 표준 동기신호와 주파수 동기를 확립토록 컴퓨터 화상 신호의 주파수를 변환시키는 변환부(20)와; 비디오 카메라(3)의 출력 신호에서 동기신호 만을 분리해내 상기 변환부(20)에 표준동기를 제공하여 최종 디스플레이(2)에 주사되는 화상의 동기를 확립하고, 소스 화상의 수직 라인수와 매치되는 수직 라인수를 제공하여 해상도 확립을 구현하는 표준동기제공부(30)로 구성되는 것을 특징으로 하는 비디오 촬영용 영상신호 변환장치.A converter (20) which receives an image signal from a computer (1) providing a source image and converts the frequency of the computer image signal to establish frequency synchronization with a standard synchronization signal provided from the standard synchronization providing unit (30); It separates only the synchronization signal from the output signal of the video camera 3 and provides standard synchronization to the conversion unit 20 to establish synchronization of the image scanned on the final display 2 and match the number of vertical lines of the source image. A video signal converting apparatus for video shooting, comprising: a standard synchronization providing unit (30) for establishing a resolution by providing a number of vertical lines. 제1항에 있어서, 상기 변환부(20)는 컴퓨터(1)에서 입력되는 화상신호(RGB 신호)를 디지탈변환하여 프레임 메모리(20-4)로 출력하는 A/D컨버터 (20-1)와; 상기 입력되는 화상신호(RGB)에서 입력 수평동기 (Hi) 신호와, 입력 수직동기 (Vi) 신호를 분리해 내는 동기분리기(20-2)와; 상기 동기분리기 (20-2)를 통해 입력된 입력 수평동기(Hi) 신호에서 컴퓨터(1)의 도트 클럭 (DOT CLOCK)에 상응하는 주파수와 위상의 입력클럭(CLK)을 생성하는 입력 위상동기루프(PLL) (20-3)와; 상기 A/D컨버터 (20-1)에서 출력되는 화상 데이타를 비디오 신호 성분의 열화없이 표시도트 및 표시라인을 그대로 저장하는 프레임 메모리 (20-4)와; 상기 동기분리기 (20-2)에서 분리된 입력수직동기 (Vi) 신호를 입력받아 상기 화상 데이타가 프레임 메모리 (20-4)에 한 프레임씩 저장(WRITE) 또는 리드(READ)될 때를 결정하여 프레임 메모리 (20-4)의 리드/라이트를 제어하는 프레임 메모리 제어부(20-5) 및; 상기 프레임 메모리 (20-4)에 저장된 데이타를 읽어들여 디스플레이(2)에 나타낼 때 표준동기 제공부(20-5)에서 입력되는 동기신호에 맞추어 프레임 데이타를 아날로그 신호로 변환하여 출력하는 D/A컨버터(20-6)로 구성되는 것을 특징으로 하는 비디오 촬영용 영상신호 변환장치.The A / D converter 20-1 of claim 1, wherein the converter 20 digitally converts an image signal (RGB signal) input from the computer 1 and outputs the digital signal to the frame memory 20-4. ; A sync separator 20-2 for separating an input horizontal sync signal and an input vertical sync signal Vi from the input image signal RGB; An input phase synchronization loop for generating an input clock CLK having a frequency and a phase corresponding to the dot clock DOT CLOCK of the computer 1 from the input horizontal synchronization Hi signal input through the synchronization separator 20-2. (PLL) (20-3); A frame memory (20-4) for storing image data output from the A / D converter (20-1) without any deterioration of a video signal component and display dots and display lines; Determines when the image data is stored (WRITE) or read (READ) by one frame in the frame memory 20-4 by receiving the input vertical synchronizer (Vi) signal separated by the sync separator 20-2. A frame memory control unit 20-5 for controlling read / write of the frame memory 20-4; D / A for converting the frame data into an analog signal according to the synchronization signal input from the standard synchronization providing unit 20-5 when reading the data stored in the frame memory 20-4 and displaying it on the display 2. Video signal conversion device for video shooting, characterized in that the converter (20-6). 제1항에 있어서, 상기 표준동기 제공부(3O)는 비디오 카메라에서 출력되는 등기신호를 입력받아 이를 기준 수직동기신호(Vref)와, 기준 수평동기신호(Href)로 분리하는 동기분리기 (30-1)와; 상기 동기분리기 (30-1)에서 출력되는 각 신호의 위상을 설정한 기준신호의 위상에 동기시켜 출력하는 변환 위상동기루프(30-2)와; 상기 변환 위상동기루프(30-2)를 통해 변환된 변환 주파수를 분주하는 분주기 (30-3) 및; 상기 분주기 (30-3)를 통해 분주된 주파수를 출력 위상에 동기시켜 출력클럭 신호를 생성하는 출력 위상동기루프(30-4)로 구성되는 것을 특징으로 하는 비디오 촬영용 영상신호 변환장치.The synchronization synchronizer (30) according to claim 1, wherein the standard synchronization providing unit (30) receives a registration signal output from a video camera and separates it into a reference vertical synchronization signal (Vref) and a reference horizontal synchronization signal (Href). 1) and; A conversion phase synchronization loop 30-2 for outputting the phase of each signal output from the synchronization separator 30-1 in synchronization with the phase of the set reference signal; A divider 30-3 for dividing the converted frequency through the converted phase locked loop 30-2; And an output phase synchronization loop (30-4) for generating an output clock signal by synchronizing the frequency divided by the divider (30-3) with the output phase. 제3항에 있어서, 상기 표준동기 제공부(3O)의 분주기(30-3)에서 출력되는 신호중 최종 수평동기 신호(Ho)는 소스 화상인 컴퓨터의 총 수직 라인수(Lo)를 카메라의 총 라인수(Lref)로 분할한 값에 입력 수평동기신호(Hi)를 곱한 값을 출력케 하여 디스플레이(2)에 주사되는 해상도의 저하를 방지토록 하는 것을 특징으로 하는 비디오 촬영용 영상신호 변환장치.The total horizontal line signal (Lo) of the computer, which is the source horizontal image, of the signals output from the frequency divider (30-3) of the standard synchronization providing unit (30). A video signal converting apparatus for video shooting, characterized by outputting a value obtained by multiplying the number of lines (Lref) by the input horizontal synchronization signal (Hi) to prevent a decrease in resolution scanned by the display (2). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950033698A 1995-10-02 1995-10-02 Image signal converting apparatus for video camera KR0164255B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950033698A KR0164255B1 (en) 1995-10-02 1995-10-02 Image signal converting apparatus for video camera

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950033698A KR0164255B1 (en) 1995-10-02 1995-10-02 Image signal converting apparatus for video camera

Publications (2)

Publication Number Publication Date
KR970024913A true KR970024913A (en) 1997-05-30
KR0164255B1 KR0164255B1 (en) 1999-03-20

Family

ID=19429063

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950033698A KR0164255B1 (en) 1995-10-02 1995-10-02 Image signal converting apparatus for video camera

Country Status (1)

Country Link
KR (1) KR0164255B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100359125B1 (en) * 2000-12-19 2002-11-04 한국항공우주연구원 a

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100359125B1 (en) * 2000-12-19 2002-11-04 한국항공우주연구원 a

Also Published As

Publication number Publication date
KR0164255B1 (en) 1999-03-20

Similar Documents

Publication Publication Date Title
EP0794525B1 (en) Pixel conversion apparatus
KR960039941A (en) Image signal processing apparatus and composite image projection apparatus
MY118491A (en) A subpicture image signal vertical compression circuit
JPH05292476A (en) General purpose scanning period converter
KR970024913A (en) Video signal converter for video shooting
US5754244A (en) Image display apparatus with line number conversion
KR100227425B1 (en) Apparatus for displaying double picture removing one pixel error
KR970705298A (en) A CONTROLLER FOR PROVIDING TIMING SIGNALS FOR VIDEO DATA FOR VIDEO DATA
JP3217820B2 (en) Video synthesizing method and external synchronous display device
JPS61172484A (en) Video field decoder
KR100196845B1 (en) Apparatus for interfacing video signals of a computer and a television
US5282035A (en) 1-Field memory synchronizer and synchronizing method
KR100237421B1 (en) Conversion device of scanning line in the output signal of liquid crystal display device
KR100297816B1 (en) Format Converter Peripheral Circuit
KR0182066B1 (en) Image signal transformation apparatus of digital formation
JPH07134575A (en) Video signal conversion device
KR100222904B1 (en) Picture moving apparatus of video signal converting apparatus
KR100516052B1 (en) How to transmit video parameters using blank sections
KR100396318B1 (en) Method of processing image data of high pixel density progressive ccd camera
JP3244422B2 (en) Scan line conversion circuit
JPH0833716B2 (en) Video signal converter
KR960006583A (en) Screen size conversion circuit of image signal processor
JPS60186891A (en) Highly refined signal converter
KR970057714A (en) TV splitter
KR960030681A (en) Wide screen double scan and screen aspect ratio converter

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20120912

Year of fee payment: 15

FPAY Annual fee payment

Payment date: 20130911

Year of fee payment: 16

FPAY Annual fee payment

Payment date: 20140912

Year of fee payment: 17

FPAY Annual fee payment

Payment date: 20150914

Year of fee payment: 18

EXPY Expiration of term