KR970022645A - Mission control drive signal generator using binary counter - Google Patents
Mission control drive signal generator using binary counter Download PDFInfo
- Publication number
- KR970022645A KR970022645A KR1019950034147A KR19950034147A KR970022645A KR 970022645 A KR970022645 A KR 970022645A KR 1019950034147 A KR1019950034147 A KR 1019950034147A KR 19950034147 A KR19950034147 A KR 19950034147A KR 970022645 A KR970022645 A KR 970022645A
- Authority
- KR
- South Korea
- Prior art keywords
- microprocessor
- binary counter
- counter
- oscillation
- signal generator
- Prior art date
Links
- 230000010355 oscillation Effects 0.000 claims 8
- 239000003990 capacitor Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
본 발명의 이진 카운터를 이용한 입구제어 구동신호 발생기는 마이크로 프로세서가 수행할 소정의 임무의 속도를 제어하는 클럭신호를 발생하여 마이크로 프로세서에 입력시키는 것이다.The inlet control drive signal generator using the binary counter of the present invention generates a clock signal for controlling the speed of a predetermined task to be performed by the microprocessor and inputs it to the microprocessor.
본 발명은 이진 카운터를 이용하여 간단히 각기 주기가 상이한 여러 가지의 클럭 신호를 발생하고, 이를 마이크로 프로세서에 입력시켜 처리할 임무에 따라 선택적으로 사용하게 하는 것으로서 시정수에 따라 발진하는 발진부(11)의 출력신호를 이진 카운터부(12)가 카운트하고, 이진 카운터부(12)의 각각의 출력단자(Qo∼ QN)로 출력되는 카운트 신호를 마이크로 프로세서(20)에 입력시켜 마이크로 프로세서(20)가 처리할 임무에 적합한 카운트 신호를 선택 사용하게 한다.The present invention simply generates a plurality of clock signals having different periods by using a binary counter, and inputs them to a microprocessor to selectively use them according to a task to be processed. The oscillator 11 oscillates according to a time constant. The binary counter unit 12 counts the output signal, and inputs a count signal output to each of the output terminals Q o to Q N of the binary counter unit 12 to the microprocessor 20 so as to input the microprocessor 20. Allows you to select and use the appropriate count signal for the task to be processed.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.
제1도는 본 발명의 구동신호 발생기의 일실시예 구성을 보인 회로도.1 is a circuit diagram showing an embodiment configuration of a drive signal generator of the present invention.
Claims (4)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950034147A KR970022645A (en) | 1995-10-05 | 1995-10-05 | Mission control drive signal generator using binary counter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019950034147A KR970022645A (en) | 1995-10-05 | 1995-10-05 | Mission control drive signal generator using binary counter |
Publications (1)
Publication Number | Publication Date |
---|---|
KR970022645A true KR970022645A (en) | 1997-05-30 |
Family
ID=66583465
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950034147A KR970022645A (en) | 1995-10-05 | 1995-10-05 | Mission control drive signal generator using binary counter |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR970022645A (en) |
-
1995
- 1995-10-05 KR KR1019950034147A patent/KR970022645A/en not_active Application Discontinuation
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR930020841A (en) | Clock generator | |
KR940027147A (en) | Semiconductor circuit device and pulse generation method | |
KR940002712A (en) | Improved External Memory Access Control in Processing Systems | |
EP1416354A3 (en) | Programmable frequency multiplier | |
KR970022645A (en) | Mission control drive signal generator using binary counter | |
KR920702095A (en) | Digital Circuit Encoding Binary Information | |
KR880000836A (en) | World clock | |
KR880000838A (en) | Multifunction analog electronic clock | |
KR970022699A (en) | Sampling Time Controller with Binary Counter | |
KR970007619A (en) | Multiple output timer | |
KR970070476A (en) | Duty drive control device | |
KR910002117A (en) | Semiconductor integrated circuit device | |
KR0154451B1 (en) | Buzzer drive control device and method | |
KR950009052A (en) | Frequency multiply oscillation circuit | |
KR940020682A (en) | Digital pulse width modulated signal generator | |
GB2060957A (en) | Electronic alarm clock circuit arrangement | |
SU805258A1 (en) | Pulse-phase programmable control system | |
KR970062834A (en) | Automatic calibration clock with time signal | |
SU1157664A1 (en) | Controlled pulser | |
KR970049356A (en) | Panel Drive Circuit of Digitizer System | |
KR960018856A (en) | Start level adjustment circuit of monitor horizontal oscillation circuit | |
KR970024608A (en) | Frequency conversion method and circuit of clock pulse | |
KR960039585A (en) | Three phase motor controller | |
KR960016187A (en) | Time delay for simultaneous delivery | |
KR920006932A (en) | Tape Speed Control |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PA0109 | Patent application |
Patent event code: PA01091R01D Comment text: Patent Application Patent event date: 19951005 |
|
PG1501 | Laying open of application | ||
A201 | Request for examination | ||
PA0201 | Request for examination |
Patent event code: PA02012R01D Patent event date: 20000808 Comment text: Request for Examination of Application Patent event code: PA02011R01I Patent event date: 19951005 Comment text: Patent Application |
|
E902 | Notification of reason for refusal | ||
PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 20020525 Patent event code: PE09021S01D |
|
E601 | Decision to refuse application | ||
PE0601 | Decision on rejection of patent |
Patent event date: 20020830 Comment text: Decision to Refuse Application Patent event code: PE06012S01D Patent event date: 20020525 Comment text: Notification of reason for refusal Patent event code: PE06011S01I |