KR970019554U - Camcell circuit - Google Patents

Camcell circuit

Info

Publication number
KR970019554U
KR970019554U KR2019950029489U KR19950029489U KR970019554U KR 970019554 U KR970019554 U KR 970019554U KR 2019950029489 U KR2019950029489 U KR 2019950029489U KR 19950029489 U KR19950029489 U KR 19950029489U KR 970019554 U KR970019554 U KR 970019554U
Authority
KR
South Korea
Prior art keywords
camcell
circuit
camcell circuit
Prior art date
Application number
KR2019950029489U
Other languages
Korean (ko)
Other versions
KR0137938Y1 (en
Inventor
김윤학
Original Assignee
엘지반도체주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 엘지반도체주식회사 filed Critical 엘지반도체주식회사
Priority to KR2019950029489U priority Critical patent/KR0137938Y1/en
Publication of KR970019554U publication Critical patent/KR970019554U/en
Application granted granted Critical
Publication of KR0137938Y1 publication Critical patent/KR0137938Y1/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C15/00Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
    • G11C15/04Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1084Data input buffers, e.g. comprising level conversion circuits, circuits for adapting load
KR2019950029489U 1995-10-19 1995-10-19 Semiconductor memory device KR0137938Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019950029489U KR0137938Y1 (en) 1995-10-19 1995-10-19 Semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019950029489U KR0137938Y1 (en) 1995-10-19 1995-10-19 Semiconductor memory device

Publications (2)

Publication Number Publication Date
KR970019554U true KR970019554U (en) 1997-05-26
KR0137938Y1 KR0137938Y1 (en) 1999-03-20

Family

ID=19426406

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019950029489U KR0137938Y1 (en) 1995-10-19 1995-10-19 Semiconductor memory device

Country Status (1)

Country Link
KR (1) KR0137938Y1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100562805B1 (en) * 1997-02-06 2006-05-25 노오텔 네트웍스 리미티드 Content addressable memory

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100562805B1 (en) * 1997-02-06 2006-05-25 노오텔 네트웍스 리미티드 Content addressable memory

Also Published As

Publication number Publication date
KR0137938Y1 (en) 1999-03-20

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Legal Events

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A201 Request for examination
E701 Decision to grant or registration of patent right
REGI Registration of establishment
FPAY Annual fee payment

Payment date: 20051021

Year of fee payment: 8

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