KR970018486A - Semiconductor device with improved internal power line structure - Google Patents

Semiconductor device with improved internal power line structure Download PDF

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Publication number
KR970018486A
KR970018486A KR1019950030030A KR19950030030A KR970018486A KR 970018486 A KR970018486 A KR 970018486A KR 1019950030030 A KR1019950030030 A KR 1019950030030A KR 19950030030 A KR19950030030 A KR 19950030030A KR 970018486 A KR970018486 A KR 970018486A
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KR
South Korea
Prior art keywords
power line
power
semiconductor device
parasitic load
parasitic
Prior art date
Application number
KR1019950030030A
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Korean (ko)
Inventor
강경우
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019950030030A priority Critical patent/KR970018486A/en
Publication of KR970018486A publication Critical patent/KR970018486A/en

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Abstract

본 발명은 개선된 내부전원라인구조를 가진 반도체 장치에 관한 것으로서, 특히 외부전원전압이 인가되는 리드프레임에 각각 연결되는 복수의 본딩 패드들; 각 본딩패드들에 연결되어 복수의 내부회로들에 각각 전원을 공급하기 위한 복수의 전원라인들; 복수의 전원라인들 중 기생부하가 작은 전원라인과 기생부하가 큰 전원 라인이 리드프레임에서 병합될 때 기생부하가 큰 전원라인으로부터 기생부하가 작은 전원라인으로 노이즈가 전파되는 것을 방지하기 위하여 기생부하가 작은 전원라인과 본딩패드의 사이에 연결된 노이즈 버퍼수단을 구비한다. 따라서, 본 발명에서는 전원라인을 통하여 노이즈가 전파되는 것을 방지할 수 있다.The present invention relates to a semiconductor device having an improved internal power supply line structure, and more particularly to a plurality of bonding pads connected to a lead frame to which an external power supply voltage is applied; A plurality of power lines connected to respective bonding pads to supply power to the plurality of internal circuits, respectively; Parasitic load is used to prevent noise from propagating from the power line with high parasitic load to the power line with low parasitic load when the power line with small parasitic load and power line with large parasitic load are merged in the lead frame. And a noise buffer means connected between the small power supply line and the bonding pad. Therefore, in the present invention, it is possible to prevent noise from propagating through the power line.

Description

개선된 내부전원라인구조를 가진 반도체 장치Semiconductor device with improved internal power line structure

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제3도는 본 발명에 의한 반도체 장치의 패드 분리형 내부전원라인의 구성을 나타낸 도면.3 is a diagram showing the configuration of a pad-separable internal power line of a semiconductor device according to the present invention.

제4도는 본 발명에 의한 반도체 장치의 패드 공유형 내부전원라인의 구성을 나타낸 도면.4 is a diagram showing the configuration of a pad sharing internal power line of a semiconductor device according to the present invention.

Claims (3)

외부전원전압이 인가되는 리드프레임에 각각 연결되는 복수의 본딩 패드들; 상기 각 본딩패드들에 연결되어 복수의 내부회로부들에 각각 전원을 공급하기 위한 복수의 전원라인들; 상기 복수의 전원라인들 중 기생부하가 작은 전원라인과 기생부하가 큰 전원라인 상기 리드프레임에서 병합될 때 기생부하가 큰 전원라인으로부터 기생부하가 작은 전원라인으로 노이즈가 전파되는 것을 방지하기 위하여 기생부하가 작은 전원라인과 본딩패드의 사이에 연결된 노이즈 버퍼수단을 구비한 것을 특징으로 하는 개선된 내부전원라인구조를 가진 반도체 장치.A plurality of bonding pads each connected to a lead frame to which an external power supply voltage is applied; A plurality of power lines connected to each of the bonding pads to supply power to a plurality of internal circuit units, respectively; Parasitic to prevent the propagation of noise from the power line with a high parasitic load to the power line with a low parasitic load when the parasitic load is merged in the lead frame among the plurality of power lines. A semiconductor device having an improved internal power line structure, comprising a noise buffer means connected between a light load power line and a bonding pad. 제1항에 있어서, 상기 노이즈 버퍼수단은 저항인 것을 특징으로 하는 개선된 내부전원라인구조를 가진 반도체 장치.The semiconductor device with an improved internal power line structure according to claim 1, wherein said noise buffer means is a resistor. 외부전원전압이 인가되는 리드프레임에 연결되는 본딩 패드; 상기 본딩패드에 각각 연결되어 복수의 내부회로부들에 각각 전원을 공급하기 위한 복수의 전원라인들; 상기 복수의 전원라인들 중 기생부하가 작은 전원라인과 기생부하가 큰 전원라인이 상기 본딩패드에서 병합될 때 기생부하가 큰 전원라인으로부터 기생부하가 작은 전원라인으로 노이즈가 전파되는 것을 방지하기 위하여 기생부하가 작은 전원라인과 본딩패드의 사이에 연결된 노이즈 버퍼수단을 구비한 것을 특징으로 하는 개선된 내부전원라인구조를 가진 반도체 장치.A bonding pad connected to a lead frame to which an external power supply voltage is applied; A plurality of power lines connected to the bonding pads to supply power to a plurality of internal circuit units, respectively; In order to prevent noise from propagating from the high parasitic power line to the low parasitic power line when the low parasitic power line and the high parasitic power line are merged in the bonding pad. A semiconductor device having an improved internal power line structure, comprising a noise buffer means connected between a power supply line with a low parasitic load and a bonding pad.
KR1019950030030A 1995-09-14 1995-09-14 Semiconductor device with improved internal power line structure KR970018486A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950030030A KR970018486A (en) 1995-09-14 1995-09-14 Semiconductor device with improved internal power line structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950030030A KR970018486A (en) 1995-09-14 1995-09-14 Semiconductor device with improved internal power line structure

Publications (1)

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KR970018486A true KR970018486A (en) 1997-04-30

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