KR970010372B1 - Similar character reading system of barcode decoder - Google Patents

Abstract

Digital signals of bar-code detected out of bar-code detecting part(1) are divided into toggle signals(Ta)(Tb)(Tc) in pulse generating part(2), and a starting-bar detecting part(4), a middle-bar part(7), ending-bar part(8) compare the signals to count the width in counter part(3) to recognize a bar-code. Since a similar character decoding part(9) detects similar character by comparing the module counter value adding space and bar adjacent to counter part(3) with the module counter value adding bar and space to it, so it prevents the error based on spread of ink.

Description

Similar character reading system of barcode decoder

1 is a block diagram of a conventional barcode decoder system.

2 is a block diagram of a barcode decoder system of the present invention.

3 is a detailed block diagram of the pseudo-collector discriminating unit of FIG.

4 is a character diagram of a bar code for explaining the present footing.

5 is a character diagram of a barcode according to FIG.

6 is a character diagram of a barcode using the delta-distance method of FIG.

7A to 7E are diagrams of output waveforms of the pulse generator for the bar code on the left side of FIG.

8 and 9A to 9D are explanatory diagrams for determining the similar collector in the similar collector discriminating unit of FIG.

* Explanation of symbols for the main parts of the drawings

1: Barcode detector 2: Pulse generator

3: counter part 4: start bar detection part

5: Basic module generating unit 6: Collector width comparison

7: middle bar detector 8: end bar detector

9: Similar collector discriminating unit 10: All collector checking unit

The present invention relates to a barcode decoder, and more particularly, to decoding similar characters generated by a delta distance method to accurately detect and prevent errors caused by smearing of ink. It relates to a similar character reading system of a barcode decoder.

The conventional barcode decoder system includes a slot scan unit 1 for converting an optical signal scattered from a barcode into a digital signal, which is an electrical signal, as shown in FIG. 1 and the slot scan unit 1. The bar code interval counter control unit 2 which counts the interval of the digital signal generated from the binary signal in binary, and stores the digital signal of the bar code output from the bar code interval counter control unit 2 and stores the stored data in the pulse generator unit 4 Input / output memory unit 3 for synchronously outputting the clock pulse generated from the "), a decoder unit 5 for decoding and outputting data output from the input / output memory unit 3, and the decoder unit. The frame control unit 6 which separates the normal data of the barcode from the data output from (5) and the barcode data output from the frame control unit 6 are searched and processed, and the barcode is A microprocessor (7) for controlling the slot scan unit (1) via the scan control unit (8) to determine whether it is in a position to be read by the slot scan unit (1), and output from the microprocessor (7) It is comprised as the interface adapter 9 which transmits the normal barcode to the host computer 10. FIG.

The operation of the conventional barcode information recognition processing system configured as described above and the problems thereof will be described as follows.

First, the slot scan unit 1 converts an electrical signal from an optical signal scattered from a bar code by a control signal of the microprocessor 7 through the can can control unit 8, and according to the signal, a slot in a bar is used. Signal to transition to ) And the signal that transitions to space in the bar ( Digital pulses are generated and applied to the barcode interval counter control unit 2, and the barcode interval counter control unit 2 is a signal ( ) And the signal that transitions from space to bar ( The time interval of) is counted in binary and stored in the input / output memory unit 3. After that, the signal output from the slot scan unit 1 ) ( ) Stops the barcode interval counter control unit 2, and the signal VID indicating 1 in the bar and (φ) in the space is output from the barcode interval counter control unit 2. ) ( ) Is output to the input / output memory unit 3, and at this point the barcode interval counter control unit 2 is reset and the next barcode signal is counted.

The data stored in the input / output memory unit 3 is outputted to the decoder unit 5 in synchronization with the clock pulses output from the pulse generator unit 4, and 11-bit binary data representing the interval width of the barcode and the like. When outputting the signal VID and the clock pulse CLK indicating whether the interval is a space or a space, the decoder unit 5 outputs a BCD bit representing a decimal character according to the data output from the input / output memory unit 3; It outputs four BCD bits that indicate the left, right margins of the barcode, the middle band, and errors in the barcode. That is, the mask signal MARK indicating whether the bar code is a bar space or the space, the equal signal EQUAL indicating whether the current bar code interval is the same as the previous bar code interval together with the three bar code previous intervals, and the bar code is odd parity or even number. The parity signals PARITY indicating the parity application are output to the frame controller 6, and the frame controller 6 receives the decoder unit by the dominant code RD and the write signal WR output from the microprocessor 7. Among the signals output from 5), the bar code is separated into illegal data and legitimate data and applied to the microprocessor 7, and the microprocessor 7 is located at a position where the barcode is read by the slot scan unit 1. Adjust the slot scan unit 1 through the scan control unit 8 to determine whether or not the signal is output from the frame control unit when the signal output therefrom is input through the scan control unit 8. Part 6 is searched. At this time, if barcode data separated from the frame control unit 6 is applied, the correlation adapter and module ten check are performed to determine whether the barcode data is a valid barcode. The host computer 10 transmits the data to the host computer 10 through the server 10.

However, such a conventional barcode decoder system is directly transitioned from the space output from the slot scan unit Signal A transitions from signal and bar to space If you count the space and bar directly by using, if there is bleeding of ink that can occur in barcode printing process, there is a problem in reliability of reading barcode. When scanning, an error occurs, and especially when decoding a barcode, the delta distance method is used, which causes similar characters to occur, for example, `` 1 '' and 7 and 2 and 8 similar characters. However, there is a problem that an error occurs when reading a barcode due to inaccurate reading of similar characters.

In view of the conventional problems, the present invention receives the barcode-related data from the input / output memory unit, processes the signal in the microprocessor, and then accurately transmits the barcode information to the host computer through the serial communication interface to correct the error due to ink bleeding. In addition to preventing the occurrence of the similar character to create a similar character reading system of the barcode decoder to accurately detect and read, when the present invention will be described in detail with reference to the accompanying drawings.

2 is a block diagram of a similar character reading system of the barcode decoder of the present invention. As shown therein, a barcode detection unit 1 for converting an optical signal scattered from a barcode into a digital signal and a digital signal from the barcode detection unit 1 are shown. Is generated from the high (H) to low (L), low to high, the pulse generator (2) for generating a toggle signal (T) by separating the data constituting the collector from the pulse generator (2) The counter section 3 which counts the width of the output toggle signal T and stores it until the end of each next count, and outputs the toggle signal CT from the data output from the counter section 3; A start guard bar detection unit 4 which checks a start guard bar, which is a start signal of a bar code, and outputs a start light bar signal SGB, and a module when the start guard bar signal SGB is detected. Multiple of the output value of the counter section 3 A basic module generating unit 5 for creating a basic module having a double value and a base module having a multiple value output from the basic module generating unit 5 when one collector is input from the counter unit 3; If it is judged that it is a legitimate collector composed of 7 modules and judges that it is a legitimate collector, the barcode width comparison part 6 which outputs a collector width comparison signal CCW, and the barcode from the data output from the said counter part 3 are carried out. The middle guard bar detector which checks whether the middle guard bar (Center Guard Bar) is input and outputs the middle guard bar signal (CGB) and outputs to the pulse generator (2) to invert the barcode signal ( 7) and an end guard bar detection unit 8 for outputting an end guard bar signal EGB indicating that the bar code is finished by checking an end guard bar, which is the end of the bar code, from the data output from the counter unit 3; ) And error in the collector recognition In order to distinguish between the counter value of the module in which the adjacent spaces and the bars are added and the counter value of the module in which the adjacent bars and the space are added together, the similar collector output is outputted to the input / output memory unit 14 to distinguish the counter value. A total collector check for outputting the total collector signal TOT by checking whether the same number of collectors are loaded on the left and right sides of the unit 9 and the intermediate guard bar output from the counter unit 3. In the 10 and the collector output from the counter unit 3, a bar code is input from the left side or the right side of the middle guard bar, and the odd and even parity are input to the input and output memory unit 14. The parity check unit 11 for outputting the signal PRT, the output of the parity check unit 11 and the counter unit 3 by checking the output from the start guard bar detection unit 4 and the collector width comparison unit 6. And the output of the pseudo-collector discrimination unit 9 The output of the input / output memory unit 14 is stored in the memory unit 14 and the outputs of the end guard bar detection unit 8 and the entire collector check unit 10 are checked, and the microprocessor 15 and the interface unit ( 16, the control unit 12 for controlling the transmission to the host computer 17 through the control unit 12, and the total collector signal TOT output from the total collector check unit 10 is input through the control unit 12. It is configured as an error checking unit 13 that checks for an error.

FIG. 3 is a detailed view of the pseudo-collector discriminating unit 9 of FIG. 2, and as shown in FIG. 3, the control unit 12 generated when the start bar signal SGB is detected from the start bar detector 4; The counter 9a, which is enabled by the control signal and counts the clock pulse of the counter unit 3, and is cleared in accordance with the bar code signal BARCOD level of the bar code detector 1, and counts from the counter 9a. A buffer 9b for shifting the multiplied clock pulses to multiply, a buffer 9c for outputting the base module 3MOD by dividing the base module 6MOD output from the base module generator 5 by ½, and The comparator 9d for comparing the output signals of the buffers 9b and 9c and outputting the corresponding values, the output signal of the comparator 9d and the start bar of the start bar detector 4 through the inverter gate 11. The counter 3 for outputting the NAND gate ND1 and the output signal of the NAND gate ND1. Constitute a cake similar in synchronism with the clock pulse selector discrimination signal (VAME) into the mouth, the flip-flop (9e) for outputting to the output memory unit 14.

In this case, as shown in FIG. 4, the barcode is a unit (`` 1 '') in the barcode, and the space ('' ø '') is called a module. The left side of the first 11 or more left barcodes There is a margin (LM), there is a start bar (SB) indicating the start of the bar code, there are seven modules (L, CH) on the mother's side, the middle bar (CB) comes out in the middle, right again There is a collector (R, CH) of the, there is an end bar (EB) to indicate the end of the bar code, the right margin (RM) of seven or more right bar code again appears.

In addition, one collector is displayed with two spaces and two bars. The left side of the middle bar (CB) appears in the order of space, bar, space, bar, and on the right side of the bar, space, bar, space. Scanning is also possible.

Here, the start bar SB is 1,?, 1, the middle bar CB is?, 1,?, 1,?, And the end bar EB is composed of modules of 1,?, 1.

Referring to the operation, effects of the present invention configured as described above in detail.

First, as shown in FIG. 7A, when a bar code consisting of a space section T1, a bar code start section T2, a collector section T3, and an intermediate bar section T4 is scanned by the scanning section, the barcode detection section 1 ) Is applied to the pulse generator 2 by converting the optical signal scattered from the barcode into a digital signal, and the pulse generator 2 is a barcode output from the barcode detector 1 as shown in FIG. Whenever the signal changes from `` ø '' to '' 1 '', it generates a toggle signal Ta (Tc) that is toggled in reverse, and the barcode signal changes from '' 1 '' to '' ø ''. Each time, a toggle signal Tb (Td), which is toggled on the contrary, is generated and an impulse signal is generated at the moment when the toggle signal Ta-Td changes from 1 to ψ. Therefore, the counter unit 3 receives the toggle signals Ta-Td of the pulse generator 2 and counts the widths thereof, stores them until the end of each next toggle signal counts, and then toggles the count value as shown in FIG. The signals CTa-CTd are output as 8 bits, respectively, and applied to the start bar detector 4, and the start bar detector 4 multiplies the toggle signals CTa-CTd output from the counter 3, and compares them. After the start bar signal SGB is detected, the start bar signal SGB indicating that the start guard bar SB is detected is output to the control unit 12.

When the start bar signal SGB is detected by the start bar detection unit 4 as described above, the basic module generator 5 raises and adds the toggle signals Ta (Tb) and Tc of the counter unit 3 to the basic unit. The module 4MOD (6MOD) (8MOD) (10MOD) is produced and outputted, and the collector width comparison part 6 is a collector from the counter part 3 as shown in Figs. 7A to 7D. Each time (L, CH) is read, the toe signal Ta (Tc) of the counter section 3 is added, i.e., Ta + Tc to determine the length of one collector, and the kerekuk is composed of seven modules. When the selector is compared to the base module 6MOD (8MOD) output from the base module generating unit 5 and judged to be a valid collector, the Kerek width comparison signal CCW is applied to the control unit 12. That is, if seven modules of one collector outputted from the counter unit 3 are between the base module 6MOD and the base module 8MOD, it is judged as a valid collector and outputs a collector width comparison signal CCW. Accordingly, the intermediate bar detection unit 7 detects the intermediate guard bars ø, 1, ø, 1, and ø as shown in FIG. 4, wherein all of the toggle signals Ta, Tb, and Tc output from the counter unit 3 are all present. If the same, the middle bar detection unit 7 outputs the middle bar signal CGB and outputs the signal CGB to the pulse generator 2 to invert the barcode signal.

That is, the left and right sides of the middle guard bar (CB) have the inverted collector (L, CH) (R, CH) system to control the pulse generator 2 with the middle bar signal (CGB) to control the barcode. When inverted, the toggle signals Ta-Tc are inverted and output. Then, when the collectors L, CH (R, CH) are finished, the end bar detection unit 8 checks whether the end guard bars EB of 1, ø, 1 are input from the counter unit 3. That is, by comparing the toggle signal Ta (Tb) output from the counter unit 3, the end bar detection unit 8 which is greater than or equal to causes the control unit 12 to apply the end bar signal EGB indicating that the barcode is finished. do. However, as shown in FIGS. 6, 8, and 9, a toggle signal Ta (Tc) which is a count value of a module in which bars and adjacent bars of a bar code are added, and a toggle signal Tb (Tc) which is a count value of a module in which bars and spaces are added The barcode signal detected incorrectly by the barcode detection unit 1, that is, detected by the barcode detection unit 1, may contain an error in printing on the barcode itself or for other reasons. In order to reduce this error, the collectors 1, 7, 2, and 2 are separated by using toggle signals Ta, Tb, Tc, and Td, which are signals toggled at each edge of a barcode. 8 is recognized as the same collector. Looking at the collectors 1 and 7 of these two types of similar collectors, they are treated with collectors such as (a) to (d) in FIG. 8 and FIG. However, in the case of sections T11 and T12 as shown in FIGS. 8 and 9 (a), the collector '' 1 '' is two modules, and the collector 7 is composed of one module. In the case of collectors 2 and 8, collector 2 is composed of two modules, and collector '' 8 '' is composed of one module. Therefore, using the difference between the sections T11 and T12 makes it possible to distinguish similar collectors.

That is, as shown in FIG. 3, when the start bar signal SGB is detected, the control unit 12 includes a counter configured in the pseudo-collector discriminating unit 9 during the sections T11 and T12 of FIGS. 8 and 9. 9a) will be enabled. Therefore, when the counter 9a configured in the pseudo-collector discriminating unit 9 counts the intervals of the sections T11 and T12 of the collector output from the counter unit 3, the interval T11 is a two-module value (ø, ø). ), And the section T12 has one module value ø. The value of one module or two modules output to the output terminals Q0-Q7 of the counter 9a is applied to the input terminals A0-A7 of the buffer 9b and sequentially stored in the buffer 9b. Multiplied by 2 and 4 module values, it is applied to the input terminals P0-P7 of the comparator 9d. At this time, the base module 6MOD is outputted from the base module generating unit 5, calculated through the buffer 9c, and then applied to the input terminals Q0-Q7 of the comparator 9d. Compare 2 modules, 4 modules through buffer 9b and 3 modules through buffer 9c, and if the value is greater than 3 modules, '' 1 '', '' 7 '', '' 2 '' and '' 8 '' to '' 1 '' or '' 2 '', if smaller than 3 module value, becomes collector '' 7 '' or '' 8 '' and one side input terminal of NAND gate (ND1) Is applied to the other input terminal of the NAND gate ND1, and the start bar signal SGB output from the start bar detector 4 is inverted and applied through the inverter gate 11 so that the NAND gate ND1 is connected to these input terminals. The NAND signal is applied to the input terminal D of the flip-flop 9e. Accordingly, the flip-flop 9e is synchronized with the toggle signal Ta-Tc applied from the counter section 3 to its output terminal ( To output a pseudo-collector discrimination signal (VAME). That is, when the pseudo-collector discrimination unit 9 is larger than the value of 3 modules by comparing 2 modules and 4 modules with 3 modules, the input / output memory unit 14 sets the pseudo-collector discrimination signal VAME to high (H). On the contrary, if it is smaller than 3 modules, the low (L) signal is applied to the input and output memory unit 14.

On the other hand, the total collector check unit 10 increments the counter each time the counter unit 3 finishes counting, so that the same number of collectors on the left and right sides of the intermediate guard bar CB are removed from the counter unit 3. If it is not the same by checking whether it is detected, the result is applied to the error check unit 13 through the control unit 12 to generate an error, and the parity check unit 11 has a bar code on the left side of the middle guard bar CB. It is determined whether it is inputted from the right side or the right side, and the result is applied to the input / output memory unit 14.

That is, the parity check unit 11 adds the toggle signal Ta-Tc, which is one collector signal, by the counter unit 3 and then adds the summed toggle signal Ta + Tb + Tc to the basic module generator 5. Compared with the basic module (4MOD) (6MOD) (8MOD) (10MOD) outputted from), it can be seen that the even parity discrimination signal (PRT) is output to the input and output memory unit 14 and read from the left side of the barcode. On the contrary, if it is not the same, an odd parity discrimination signal (PRT) may be output to read from the right side of the barcode.

In addition, the control unit 12 receives the start guard bar signal SGB from the start guard bar detection unit 4 to control the system, and receives the collector side comparison signal CCW from the collector width comparison unit 6. When recognized as a collector, a parity, a toggle signal Ta (Tb) (Tc) constituting the collector, a toggle signal (Ta + Tc) of the collector width comparison unit 6 representing the total length of one collector, and the like The pseudo-collector discrimination signal VAMB capable of discriminating the collector is controlled to be input to the input / output memory unit 14.

As such, when a valid bar code is detected until the end guard bar is detected, the control unit 12 applies data stored in the input / output memory unit 14 to the microprocessor 15, and the microprocessor 15 enters the input, output, and / or the like. The data is transmitted to the host computer 17 through the interface unit 16 which interprets the data of the barcode output from the output memory unit 14 to the extent that the original barcode data has.

As described in detail above, the present invention detects the guard bar of the bar code by using the toggle signal output from the counter unit using the delta-distance method with each of the start guard bar detection unit, the intermediate guard bar detection unit, and the end guard bar detection unit. By accurately detecting the pseudo-collector with the collector discriminating unit, it is possible to prevent an error caused by the smearing of the ink.

Claims (2)

The digital signal of the barcode detected by the barcode detector 1 is separated into a toggle signal Ta (Tb) (Tc) by the pulse generator 2, and a signal obtained by counting the width of the barcode is started. In a barcode decoder system in which a detection unit 4, an intermediate bar detection unit 7, and an end bar detection unit 8 compare barcodes with each other, the adjacent space from the counter unit 3 is used to prevent errors in the recognition of the collector. A similar character reading system of a barcode decoder, characterized in that it is configured as a pseudo-collector discrimination unit (9) for comparing a counter value of a module in which bars are added and a counter value of a module in which adjacent bars and spaces are combined. The counter-like collector discriminating unit (9) according to claim 1, wherein the pseudo-collector discriminating unit (9) includes a counter (9a) for counting clock pulses of the counter unit (3) when the start bar signal of the start bar detecting unit (4) is detected, and the counter ( A buffer 9b for shifting and multiplying the output signal of 9a), a buffer 9c for outputting the base module 3MOD by dividing the base module 6MOD outputted from the base module generator 5 by ½; The comparator 9d for comparing the output signals of the buffers 9b and 9c and outputting the corresponding value, and the start of the start bar detector 4 through the output signal of the comparator 9d and the inverter gate I1. NAND gate ND1 combining bar signal SGB and flip-flop 9e for outputting pseudo-selector discrimination signal VAME in synchronization with the clock pulse of the NAND gate ND1. Characteristic similarity reading system of a barcode decoder.