KR970004173B1 - Sound processing method in a room - Google Patents

Abstract

A method for processing a chamber sound is disclosed. First, a stereophonic sample sound is stored at a delaying buffer(S1). And then, an initial reflected sound and a reference signal of the remaining sound are generated by using the delayed sample sound(S2). Thereafter, a loop time(Ta,Tc) is calculated by using the delayed time of a comb filter(55) of each channel and an all-pass network(553) and, at the same time, a band-pass, a high-pass and a low-pass gains are calculated using the remaining sound time, a high-pass and a low-pass remaining rates(S3). And then, each of the remaining sounds of 16 channels is generated(S4). The remaining sounds of 16 channels are calculated to 4 outputs(S5). Finally, the four remaining channels are provided(S6).

Description

Indoor acoustic treatment

1 is an overall system configuration of the indoor sound processing apparatus to which the present invention is applied.

2 is a block diagram of an analog digital conversion board of the apparatus to which the present invention is applied.

3 is a detailed circuit diagram of an interface in a signal processor of the apparatus to which the present invention is applied.

4 is a block diagram of a signal processing unit for explaining a process of generating reverberation sound processed by the present invention.

5 is a detailed circuit diagram of a signal processor in FIG.

6 is a detailed circuit diagram of a signal coupling unit of FIG.

7 is an exemplary view of a band gain unit in FIG.

8 is a block diagram of a digital analog conversion board of the apparatus to which the present invention is applied.

9 is an overall flowchart for explaining the method of the present invention.

(A)-(c) of FIG. 10 is a detailed flowchart of the method of the present invention.

* Description of the symbols for the main parts of the drawings *

1: analog digital conversion board part 2: microcomputer

3: system memory 4: ramdisk

5: signal processor 6: interface

8: digital analog conversion board part 7: user interface

51: signal delay and reflection sound generator 52: reverberation sound generator

53: signal combination unit 521-536: signal processor

The present invention relates to an indoor acoustic processing method for synthesizing a sound field by combining reverberation sound, initial reflection sound, and inherent resonance according to the value of sound field parameters while controlling the system based on the main board ISA bus of a personal computer. will be.

In general, since the acoustic environment of the sound signal used in broadcasting is very diverse, the received sound signal rarely has the best sound quality. Therefore, the sound quality of the received original sound is often changed to the desired sound quality.

In addition, under the same sound quality, reverberation sound considering the direction of the room should be created in the sound quality of the original sound so as to feel the realism of a place such as a professional concert hall. In order to change the sound quality of the original sound to the desired sound quality, a process of processing an acoustic signal is required.

There are various purposes in the processing of acoustic signals, from the passive purpose of 'correction of the sound signal' to the active purpose of 'making sound'. The signal processing system is divided into amplitude domain processing system, frequency domain processing system and time domain processing system. It can be divided into three lines. Among them, the time domain processing system is used for the purpose of modifying the sound image of the original sound to make a desired sound, and is usually configured by using the sound delay.

However, in the related art, a circuit is complicated and an accurate sound effect cannot be obtained by adopting an analog method to implement the sound effect as described above.

Accordingly, an object of the present invention is to realize the best sound quality by creating three-dimensional reflection sound, reverberation sound and inherent resonance by combining the elements that determine the acoustic characteristics in the received sound signal, and determine the acoustic characteristics of the space according to the size of the indoor space To provide the desired sound quality, the entire system is controlled based on the director bus of the existing personal computer mainboard, and the latest digital signal processor can be easily implemented to generate the highest reverberation sound. At the same time, to provide a room acoustic processing method that can easily change and expand the sound field parameters.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

1 is an overall block diagram of an indoor sound processing apparatus to which the method of the present invention is applied, comprising: an analog digital conversion board unit 1 for converting a digital input signal composed of a stereo channel into a predetermined digital signal; The digital stereo input signal converted and output from the analog digital conversion board unit 1 and the sound field parameters output from the system memory 3 are mutually input and processed into an acoustic signal necessary for generating reverberation sound, while simultaneously providing an interface 6. A signal processor 5 for controlling data input / output with an ISA bus; A microcomputer 2 which controls the data exchange between the boards and controls the user interface unit 7 by encapsulating the entire system by a predetermined program; A ram disk 4, which stores a predetermined control program and provides it to the personal computer and the microcomputer 2 when the power is supplied; A user interface unit 7 which transmits a state of a desired sound field parameter between the system and the user to the microcomputer 2 so that a desired reverberation sound is output; A system memory (3) for storing sound field parameters desired by a user; The digital analog conversion board section 8, which converts digital sound data processed by the above sections into analog signals and outputs them, is interconnected.

The analog digital conversion board unit 1 includes an amplifier 11 which amplifies and unbalances an analog input signal having a balance composed of a stereo channel to a predetermined level as shown in FIG. 2; A low pass filter 12 which prevents aliasing occurring in a high frequency band by passing only a low frequency portion of an acoustic signal output from the amplifier 11; A sample holder (13) for storing a low frequency acoustic signal output through the low pass filter (12) for a predetermined time; A clock generator 16 for outputting a clock signal of a predetermined frequency to the A / D converter 14; An interrupt signal generator 17 for outputting an interrupt signal to the A / D converter 14 when an interrupt signal is input through the system bus; An A / D converter which receives a clock signal from the clock generator 16 and receives interrupt control from the interrupt signal generator 17 and converts an analog sound signal output from the sampling holder 13 into a predetermined digital signal ( 14); And a buffer 15 which delays the digital sound signal output from the A / D converter 14 for a predetermined time and outputs it through the system bus.

In addition, the interface 6 in the signal processor 5 determines the state condition between the central processor 65 and the input / output device according to the address output from the input / output address decoder 621 as shown in FIG. A handshaking register 61 for mutually transmitting the data; An input / output decoder 62 composed of an input / output address decoder 621 and an internal bus operation logic unit 622 to decode the input / output address of the central processor 65; Memory address decoder 631, byte decoder 632, memory control multiplexer 633, decoder 634, and memory 635 control access of memory between the bus and the internal bus and the central processor 65. A memory control unit 63; A buffer unit 64 comprising a data buffer 641 and an address buffer 642 for temporarily storing and outputting predetermined data and addresses; A central processor 65 having a sound field synthesis software, a global memory for storing an operating area, sound field parameters, delay memory and input / output data, a local memory for generating reverberation sound, and performing overall control functions including arithmetic functions It was equipped.

In this case, the sound field parameters employed in the reverberation sound generation process include eight kinds of reverberation time, high reverberation ratio, low reverberation ratio, predelay, reverberation sound level, initial delay time, initial reflection sound level, and indoor space size.

In addition, the signal processing unit 5 for generating reverberation sound delays the digital sound signal output from the analog digital conversion board unit 1 for a predetermined time and generates a predetermined reflection sound as shown in FIG. A signal delay and reflection sound generator 51 for outputting a predetermined signal as a reference for reverberation sound; The signal delay and reflection sound generators are connected in parallel with each other by parallel connection of several signal processors 521-536 to the room delay by the user and the reverberation reference signal output from the signal delay and reflection sound generators 51. A reverberation sound having a predetermined natural resonant frequency based on a reverberation reference signal output from 51 and a value of a sound field parameter input by a user corresponding to an indoor space size, reverberation time, high reverberation ratio and low reverberation ratio A reverberation sound generation unit 52 for outputting each of the 16 channels; A signal combiner 53 for generating a four-channel output signal by mixing the initial reflection sound output from the signal delay and reflection sound generator 51 and the 16-channel reverberation sound output from the reverberation generator 52; It was equipped.

The reverberation sound generated by the reverberation sound generation unit 52 is composed of 16 channels, and there are independent signal processors for each channel, only internal coefficients are different, and the configuration thereof is the same. Among the reverberation reference signals, the left signal is an odd channel. In (channels 1 to 15), the write signal is used as an input in the even panels (channels 2 to 16), respectively, and the reverberation sound generated in each channel is transmitted to the signal combiner 53.

That is, the signal processing units 521-536 in the reverberation sound generation unit 52 respectively receive the reverberation reference signal output from the signal delay and the reflection sound generation unit 51 as shown in FIG. A first band gain unit 54 which takes the form; It is composed of adder 551, M sample delay circuit 552, all-pass network 553, and reverberation time frequency characteristic realization unit 554, the indoor space size, reverberation time, high frequency reverberation ratio, low frequency of reverberation sound generation. A comb filter 55 for determining a reverberation ratio to determine reverberation density and natural resonance; The fifth band gain unit 56 reduces half the gain in the reverberation sound output from the comb filter 55 by half.

At this time, the all-pass network 553 includes a -ga gain control unit 5531 for adjusting the reverberation sound of the unit impulse output from the M sample delay circuit 552 to an impulse having a predetermined gain (-ga); An adder 5535 for adding the output signal of the ga gain control unit 5552 to the reverberation sound of the unit impulse output from the M sample delay circuit 552; An N sample delay circuit 5534 for delaying the output signal of the adder 5535 by a predetermined loop time Ta; A ga gain control unit 5532 controlling the output signal of the N sample delay circuit 5534 to an impulse having a predetermined gain (ga) and feeding it back to the adder 5535; A 1-ga ² gain control unit 5535 for adjusting the output signal of the N sample delay circuit 5534 to an impulse having a predetermined gain (1-ga ² ); The -ga gain control unit 5531 and the 1-ga ² gain control unit (5533) is an adder (5536) to add to each other to increase the reverberation density.

In addition, the frequency characteristic implementation unit 554 of the reverberation time receives the output signals of the all-pass network 553, respectively, 'medium gain + high pass gain', 'medium gain-high pass gain', and '(low pass gain-medium gain). Second to fourth band gains 55542-5544, each of which adjusts its gain to < RTI ID = 0.0 > A second gain control unit 5545 for receiving an output signal of the all-pass network 553 and adjusting a gain thereof; A first adder 5549 that adds an output signal of the fourth band gain unit 5544 and an output signal of the third gain control unit 5546; A first sample delay circuit 5547 which delays an output signal of the first adder 5549 by a predetermined time and feeds it back to the first adder 5549 through a third gain adjusting unit 5546; A second adder 5550 for adding the output signal of the first adder 5549 to the output signal of the third band gain unit 5543; A third adder 5551 that adds an output signal of the first adder 5549 to the output signals of the second band gain unit 5542 and the second gain control unit 5545 selectively output through the switch S1. Wow; A one sample delay circuit 5548 for delaying the output signal of the second adder 5551 to a predetermined time; A fourth adder 5552 for adding the output signal of the second adder 5550 to the output signal of the first sample delay circuit 5548; The first gain control unit 5551 is configured to adjust the output gain of the adder 5552 to a predetermined level and apply it to the adder 551 in the comb filter 55, respectively. The gain was calculated.

The signal combiner 53 may include a reverberation sound combiner 537 for receiving 16 reverberation sounds and combining the four reverberations into four output signals as shown in FIG. The reverberation sound combiner 537 converts the predetermined data into 16 bits and controls the gain thereof. The refining and gain control unit 538 comprises a reverberation and gain control unit 538. A fourth gain control unit 5381 which receives an output signal of the sound coupling unit 537 and adjusts its gain; An adder 5583 that selectively receives the output signals of the reverberation sound combiner 537 and the fourth gain control unit 5313 through a switch S2 and adds an initial reflection sound; An adder (5384) for adding the output signal of the fifth gain control unit (5582) to the output signal of the adder (5583); A one sample delay circuit (5385) for delaying the output signal of the adder (5384) by a predetermined time and feeding it back to the adder (5384) through the fifth gain adjusting unit (5582); An integerizer circuit 5386 for converting the output signal of the adder 5384 into 16 bits is provided.

7 shows an embodiment of the band gains according to the indoor space size, the reverberation time, the high reverberation ratio and the low reverberation ratio, and the loop time Tc, Ta, which is a delay time, corresponds to the indoor space size among the eight sound field parameters. As a result, each loop time of 16 channels is determined. It is obtained by analyzing the degree of reverberation sound according to the indoor space and is confirmed by computer simulation.

These values are in the form of a table in the program, and the corresponding loop times (Tc, Ta) are fetched when the sound field parameters of the room size are input.

The resonant frequency and the reverberation delay time are determined according to the loop time, and the reverberation time is added to the predelay value, which is a sound field parameter input by the user, to become the final reverberation delay time.

In addition, the digital analog conversion board unit 8 includes an address decoder 81 for decoding an address for each channel transmitted through the system bus as shown in FIG. 8; A control signal generator 82 for generating a predetermined control signal through the system bus; A buffer 1 (83) for temporarily storing predetermined data output through the system bus and adjusting its size; A D / A converter 84 for converting digital data output from the buffer 1 83 into analog; An anti-aliasing circuit (85) for preventing an aliasing phenomenon from a signal output from the D / A converter (84); A low pass filter 86 for passing only a low pass portion of the signal output from the anti-aliasing circuit 85; It is provided with a buffer 2 (87) for adjusting the magnitude of the output signal of the low pass filter (86).

On the other hand, the method of the present invention, as shown in (a)-(c) of FIGS. 9 and 10, receiving a stereo sound input sample and storing it in a delay buffer (S1); Generating an initial reflection sound and a reverberation reference signal using an acoustic signal delayed by a predetermined time (S2); The loop time Ta and Tc are calculated using the delay time of the comb filter 55 and the all-pass network 553 of each channel, and the band of each channel using the reverberation time, the high reverberation ratio and the low reverberation ratio. Calculating gain, high gain, midrange gain, and low pass (S3); Generating reverberation sound of 16 channels (S4); A signal combining step (S5) of calculating the sixteen reverberations into four outputs; It characterized in that the step (S6) for outputting the signal-coupled reverberation sound in the four channels.

Generating a reverberation reference signal using the delayed sound signal as the initial reflection sound (S2) includes: reading a predetermined signal used for reverberation (S21); Reading a delay signal used for the initial reflection sound (S22); Calculating a reverberation reference signal (S23); The initial reflection sound signal is calculated (S24).

The step (S4) of generating the 16 channel reverberation sound may include setting the signal processing channel to '0' (S40); Fetching M sample delay data of the M sample delay circuit 552 according to the delay time of the comb filter 55 (S41); Fetching N sample delay data of the N sample delay circuit 5534 according to the delay time of the all-pass network 553 (S42); Calculating output data of the all-pass network 5534 (S43); Calculating reverberation sound of each channel by multiplying the output data of the all-pass network 5534 by the output signal of the fifth band gain unit 56 (S44); Calculating data obtained by multiplying the output data of the all-pass network 5534 by the output signals of the second to fourth band gain units 5554-5544 of each channel (S45); Fetching the output data of one sample delay circuit (5547, 5548) (S46); Calculating a final feedback data of the comb filter 55 including the output signal data passing through the second to fourth band gain units 5554-5544 and the output data of the one sample delay circuits 5547 and 5548 (S47); ; Updating the data of the M sample delay circuit 552 and the N sample delay circuit 5534 (S48); Detecting whether the currently processed signal channel is larger than 16 (S49); If the result of the detection in the step S49 is less than 16, the M sample delay of the M sample delay circuit 552 according to the delay time of the comb filter 55 is regenerated to the signal processing channel of which the current signal processing channel is increased by '1'. The process returns to the process of fetching data (S41) (S50).

In addition, the signal combining step S5 of calculating the sixteen reverberation sounds into four outputs may be performed by adding or subtracting sixteen reverberation sound output data which are output to different values through several signal processors 521-536, respectively. Calculating an output signal (output 1 to output 4) of the channel (S51); The result of adding the left initial reflection sound signal to the output 1 is the final output value of the output 1, and the result of adding the write initial reflection sound signal to the output 2 is the final output value of the output 2 (S52).

In addition, the step (S6) of outputting the signal-coupled reverberation sound in four channels includes the step (S61) of adjusting the gain of the output signal (output 1 to output 4) of the four channels; A floating point format output signal (outputs 1 to 4) is converted into a 16-bit integer and output to the digital analog conversion board section 8 (S62).

Referring to the effect of the present invention made of such a process as follows.

First, the indoor sound processing apparatus to which the present invention is applied is a system bus including a system control unit 100 and a ram disk 4 which are composed of a microcomputer 2 and a system memory 3 centering on a moving bus which is a system bus of a spun computer. ), A signal processing unit 5 having a user interface unit 7, an interface 6, an analog digital conversion board unit 1, and a digital analog conversion board unit 8.

The analog digital conversion board unit 1 converts an input analog signal into a digital signal and transmits the converted digital signal to the system control unit 100. The analog digital conversion board unit 1 is composed of two boards, one board having one channel. Since digitalization is performed, stereo signals can be input. The two boards are divided into a master and a slave, so the slave board receives a sampling clock from the master board and operates.

That is, an interrupt signal is generated in the analog digital conversion board unit 1 every one sampling period, and the microcomputer 2 reads data by accessing an input / output address assigned to the analog digital conversion board unit 1.

As shown in FIG. 2, the analog digital conversion board unit 1 includes an amplifier 11, a low pass filter 12, a sample holder 13, a clock generator 16, an interrupt signal generator 17, It consists of an A / D converter 14 and a buffer 15. The analog sound signal is input as a balance signal and converted into an unbalanced input signal through the amplifier 11, where the magnitude of the signal is a variable resistor (not shown). The input signal is input in the range of +15 volts to -15 volts.

Thereafter, the low pass filter 12 receiving the output signal of the amplifier 11 before removing the analog sound signal to a digital signal, in order to remove the aliasing (aliasing) generated in the high frequency band The aliasing does not occur by using a frequency corresponding to half of the sampling frequency as a cutoff frequency. In the present invention, only a signal component of 8 kHz or less is used for a 20 kHz sampling frequency.

The predetermined sound signal outputted through the low pass filter 12 is input to the A / D converter 14 after passing through the sample holder 13 with the magnitude of the input signal being ± 10 volts. The holder 13 holders the input analog signal to a constant value of about 16 microseconds so that the analog signal can be stably converted to digital in the A / D converter 20. The sample holder 13 has an input range of up to ± 10 volts, but is allowed up to ± 15V and the error is designed to maintain ± 0.01% accuracy within 5 microseconds for a 20 volt step input.

Up to the sample holder 13 corresponds to the analog processing portion of the analog input unit, and then performs digital processing.

The acoustic signal converted into the digital signal through the A / D converter 14 is latched in the buffer 15 under the control of the address decoder and then read by an interrupt request output from the system control unit 100 of the personal computer. Is brought in.

At this time, the system controller 100 assigns an input / output address map usable for such an operation to, for example, 300H and 302H, and performs analog digital conversion in the A / D converter 14 every 20 kilohertz period. The clock signal oscillated at 5.2 MHz by the clock generator 16 using the crystal oscillator is made into 20 kHz by the binary counter, and this clock signal is made by using two dual 4-bit binary counters. Is used as a conversion signal of the A / D converter 14, and is also used as a reference clock of the slave analog digital conversion board used together.

In addition, the analog digital conversion is made of a frequency of 20 kHz, the system control unit 100 is interrupted only in the master analog digital conversion board of the two analog digital conversion boards at 50 microsecond intervals.

The A / D converter 14 has a digital signal that has been digitally converted and is temporarily stored in the buffer 15, and whenever a predetermined interrupt signal output from the interrupt signal generator 17 is generated, a system control unit is mounted on the system bus. 100).

The sound field parameters employed in the reverberation sound generation process of the present invention are eight of reverberation time, high reverberation ratio, low reverberation ratio, predelay, reverberation sound level, initial delay time, initial reflection sound level, and indoor space size. The adjustment ranges and adjustment units for the parameters are shown in Table 1.

TABLE 1

In other words, as shown in Table 1, the reverberation time is reverberation in the midrange around 500 Hz to 1 kHz, and can be adjusted from 0.1 to 100 seconds, and the adjustment unit is 20 steps by 10 times, 61 steps in total, and for a specific indoor space size. The high reverberation ratio is based on the reverberation time of 8 kHz and the adjustment range is 0.1 to 2.5 and the adjustment unit is 5√10 times. The low reverberation ratio is based on the reverberation time of 40 hertz. The range is 0.1 to 10, the adjustment unit is 5√10 times, the pre delay is adjusted in 1 millisecond units between 1 and 200 milliseconds, and the reverberation sound level is relative to the input signal level. Is 0 to -30 decibels, the adjustment unit is 1 decibel, the initial delay time is adjusted in 1 millisecond increments from 1 to 200 milliseconds, and the initial reflection level is -30 decibels to 0 decibels. It said adjustment unit is 1 decibels, indoor space was to be adjusted in one cubic m between 6 cubic square of 10 m by 10 orders of magnitude.

4 is a block diagram showing a reverberation sound generation state in the present invention, wherein the input sound signal is digital stereo data obtained by the analog digital conversion board unit 1 of FIG.

The signal delay in the signal delay and reflection sound generator 51 of FIG. 4 is performed by using the signal processor 5 in FIG. 1, wherein the signal delay and reflection sound generator 51 are read address and write address of the memory. By using the difference of the signal can be obtained delayed by the address difference, it is possible to obtain a pure reverberation sound by this method. The input signal is stored in the delay memory every sampling period and fetched after being delayed for a certain time. The delay time is determined by the initial delay time and the predelay value, and a delay signal is generated for each delay time. There are two delay memories, which delay the left and write signals respectively, and can delay up to 200 milliseconds. The signal delayed by the pre-delay value is adjusted according to the reverberation level value and becomes a reverberation reference signal, which is transmitted to the signal processors 521-536 of 16 channels in the reverberation sound generation unit 52 of FIG. The signal delayed by the initial delay time is adjusted according to the initial reflection sound level value, and is transmitted to the signal combiner 53 as an initial reflection sound signal.

The reverberation sound of the 16 channels and the initial reflection sound transmitted to the signal combiner 53 are combined with each other to form 4 channels of output data. In this case, the signal processor 5 of FIG. 1 is a reverberation sound generating method according to the present invention. It serves to synthesize.

FIG. 5 is a detailed circuit diagram of the signal processors 521-536 in the reverberation sound generating unit 52. The sound field parameters related to the signal processor 521-536 include an indoor space size, a reverberation time, and a high frequency reverberation ratio. 4 kinds of low reverberation ratio. The reverberation sound generation process is composed of 16 channels, and there is an independent reverberation generator 52 for each channel, and only internal coefficients are different, and the configuration is the same. Among the reverberation reference signals, the left signal is input to odd channels (channels 1 to 15), and the write signal is input to even channels (channels 2 to 16), respectively. 53).

The reverberation sound generation unit 52 is composed of three parts: a comb filter 55, an allpass network 553, an auxiliary reverberation sound addition and reverberation time frequency characteristic implementation unit 554. have.

At this time, the comb filter 55 determines the reverberation time of the total reverberation sound generation, determines the reverberation density and the inherent resonance, and the all-pass network 553 increases the reverberation density, and reverberation time frequency characteristic implementation unit 554. ) Makes the reverberation sound by making the reverberation density as high as the sampling frequency.

7 shows tables of various band gains according to indoor space size, reverberation time, high pass reverberation ratio, and low pass reverberation ratio, and loops that are delay times of the comb filter 55 and the all-pass network 553 according to the indoor space size. The time Tc and Ta are determined, and the natural resonance frequency and the reverberation delay time are determined according to the loop time, and the reverberation delay time is added to the predelay value, which is a sound field parameter input by the user, to be the final reverberation delay time. The reverberation density and the rise time of the reverberation are determined according to the loop time Ta of the all-pass network 553.

In addition, the 16-channel signal processor 521-536 requires that the overall reverberation generator have a high density of impulse response, a delay portion of the reverberation pattern has a smooth exponential envelope, and the correlation between unwanted pulses ( In order to prevent correlation, the reverberation pattern pulses must be random enough so that the reverberation sound is excellent, so the loop time of each channel has a prime relationship with each other.

When the unit impulse is applied to the input terminal of the comb filter 55, the unit impulse appears at the output stage after being delayed by the loop time Tc, and the impulse signal is output at every loop time Tc, and the magnitude of each impulse is the midrange gain of the previous pulse size. The impulse response is attenuated by an exponential function over time, and the attenuation over time has a long decay time as the loop time Tc is larger and the mid-range gain is closer to one.

The comb filter 55 exhibits reverberation characteristics in a pulse train when viewed in the time domain, and has an effect of adding an inherent space in the frequency domain, and the resonant frequency at that time is the inverse of the loop time.

The all-pass network consisting of a -ga gain control unit 5531, a ga gain control unit 5532, two adders 5535 and 5536, an N sample delay circuit 5534, and a 1-ga ² gain control unit 5535 In 553, when a unit impulse is applied to an input terminal, an impulse having a gain of -ga appears at the output terminal, and an impulse having a gain of (1-ga ² ) after a delay by the loop time Ta appears. Thereafter, an impulse signal is output for each loop time Ta, and the magnitude of each signal is ga times the previous signal, and the impulse response is attenuated by an exponential function. As ga is closer to 1, the longer the loop time Ta, the longer the decay time.

The value of the gain ga is an experimental value that causes the reverberation sounds of the all-pass network 553 to be attenuated over time with a positive value less than 1, which is similar to the reverberation sound according to the size of the indoor space. Obtained by computer simulation.

In addition, the all-pass network 553 is related to the reverberation density and the reverberation rise time, and is set to 1/10 smaller than the loop time Tc of the comb filter 55, and ga is also set to a smaller value than the midrange gain.

The second to fourth band gain units 5554-5544, the first to third gain control units 5551,5545,5546, two one-sample delay circuits 5547,5548, and the first to fourth adders 5549. The frequency characteristic implementation unit 554 of the reverberation time is configured by the reverberation time, the high reverberation ratio, and the mid-range reverberation ratio. The three signals multiplied by the respective outputs of 55) are input to the independent filters.

In this case, when the outputs of the filters are added and fed back to the input of the comb filter, the multiplied signals are attenuated into a specific frequency characteristic curve, respectively, to implement the frequency characteristic of the reverberation time.

The signal multiplied by the mid-range gain passes through the bandpass filter, the signal multiplied by the high pass passes through the high pass filter, and the signal multiplied by the low pass passes through the low pass filter.

Table 2 shows a calculation method of the first to fourth band gains.

TABLE 2

As shown in FIG. 6, the signal combiner 10 including the reverberation sound combiner 537 and the integer and gain control unit 538 combines the reverberation sound of the 16 channels input from the reverberation sound generator 52 and the initial reflection sound. It plays the role of making output signal of 4 channels. Table 3 shows the combination method of reverberation sound that combines 16 reverberations. The + sign is added and-is the reverberation sound. The sum of reverberation sounds.

TABLE 3

In other words, by combining the reverberation sound as shown in Table 3, the crosscorrelation between the four output signals is 50 percent, which can create a clean sense of space.

Among the outputs of the reverberation sound combiner 537, the outputs 1 and 2 are added to the left and right signals of the initial reflection sound and go out to the final output, and the fourth and fifth gain control units 5381 and 5452 and two adders 5383. 5384, the one-sample delay circuit 5385, and the integerizer circuit 5386 are used to modulate the output data of the reverberation sound into 16 bits and adjust and output the gain.

This will be described in more detail based on the method of the present invention.

First, FIG. 9 is a flowchart schematically illustrating a method of the present invention, and illustrates a process of generating reverberation sound for processing stereo digital sound input data input from the analog digital conversion board unit 1 to generate 4 channels of output data. will be.

In addition, (a)-(c) of FIG. 10 illustrates this in detail. In the first step (S1), 16-bit stereo sound input samples are taken, converted into floating-point data, and stored in a delay buffer. In the second step (S2), a delayed signal is generated to generate the reflection sound and the reverberation reference signal. As a result, delay signals used for the reverberation sound and the initial reflection sound are obtained by using 4096 floating point type memory (S21, S22). After that, the gain of the reverberation reference signal and the initial reflection sound is obtained by calculating the reverberation sound level and the initial level value of the sound field parameter (S23, S24), which are obtained by the signal delay and reflection sound generator 51 of FIG. .

In addition, the third step S3 is performed by the reverberation sound generation unit 52 including 16 signal processors 521-536 in total. The first to third signals in the signal processors 521-536 of the respective channels are performed. Calculated by the delay times of the fourth band gain section 54,5542-5544, the M sample delay circuit 552, and the N sample delay circuit 5534.

That is, the loop time Ta and Tc are calculated using the delay times of the comb filter 55 and the all-pass network 553 of each channel, and the reverberation time, the high reverberation ratio and the low reverberation ratio are calculated. The band gain, the high-band gain, the mid-range gain and the low-gain are calculated, and each calculation is obtained according to the sound field parameter value of FIG.

The fourth step (S4) is a reverberation sound generation step of 16 channels. First, the signal processing channel is cleared to '0' (S40), and the M sample delay circuit 552 according to the delay time of the comb filter 55 is performed. After fetching the M sample delay data and the N sample delay data of the N sample delay circuit 5534 according to the delay time of the all-pass network 553 (S42 and S42), the output data of the all-pass network 5534 is output. It is calculated (S43) and multiplied by the output signal of the fifth band gain unit 56 and then output to the reverberation sound combiner 53 (S44). In addition, the output data of the all-pass network 5534 is multiplied by the output signal of the second to fourth band gain units 5554-5544 of each channel calculated above to generate three intermediate data (S45).

Thereafter, the three pieces of data obtained above are added to or subtracted from the output data of the first sample delay circuits 5547 and 5548 (S46), respectively, and output signal data and one sample delay passed through the second to fourth band gain units 55542-5544. The final feedback data of the comb filter 55 composed of the output data of the circuits 5547 and 5548 is obtained (S47).

When the final feedback data of the comb filter 55 is obtained for one sample in this way, the data buffers of the M sample delay circuit 552 and the N sample delay circuit 5534 are updated to the next sample (S48), and then the current processing. If the detected signal channel is greater than 16 (S49) and less than 16, the current signal processing channel is increased by '1' (S50) and the M sample delay circuit according to the delay time of the comb filter 55 is returned to the signal processing channel. In step S41, the M sample delay data is fetched.

Therefore, 16 signal processors 521-536 may be repeatedly calculated in the same manner as described above to obtain 16 reverberations and store them in a buffer.

In addition, the fifth step (S5) is to calculate the 16 reverberation sound to the four outputs, each of the 16 reverberation sound output data to be output at different values through the several signal processor (521-536) As shown in Table 3, four channels of output signals (outputs 1 to 4) are obtained (S51), and then output 1 is added to the signal delay and left initial reflection sound signals of the reflection sound generating unit 51 to channel 1 (output 1). The output signal 2 is output as a final output value of the channel 2 (output 2) in addition to the signal delay and the first reflective sound signal of the reflection sound generator 51, and outputs the output signal S2.

In addition, the sixth step (S6) is to output the reverberation sound signal signal-combined in the step (S5) to the four channels, the output signal of the four channels (outputs 1 to 4) in the signal combiner 53 After the gain is adjusted through the integerization and gain control unit 538 (S61), the floating point format output signals (outputs 1 to 4) are converted to 16-bit integers and output to the digital analog conversion board unit 8. By being made (S62), it is possible to accurately generate the desired reverberation sound.

On the other hand, the signal processing unit 5 is a third generation digital signal processing IC using a processor capable of 32-bit floating point calculation, that is, a central processor 65 composed of a 128K * 32-bit memory buffer and a control circuit. 16 kilobytes of memory are global memory and included in the address map of the personal computer's microcomputer, while 128 kilobytes is used as local memory. Global memory includes sound field synthesis software, operating area, sound field parameters, delay memory, and input / output data. Local memory is used to generate reverberation sound.

3 is a detailed circuit of the interface 6 for controlling data input / output with the ISA bus in the signal processor 5, and the external interface lines of the central processor 65 are connected to the primary bus. It consists of two bus lines of the expansion bus, direct memory access (DMA) interface lines, interrupt interface lines, and power and ground lines. In the present invention, the interface 6 of the signal processor 5 is configured by using a part of the primary bus, the DMA interface line, the system control line and the expansion bus.

The primary bus is used to control a large memory, occupies most of the memory area of the central processor 65, and includes 24 bit address lines, 32 bit data lines, and three control lines of R / W, STRB, and RDY. It consists of.

In order to operate at the maximum speed of 16.7 MIPS, the central processor 65 must be 35 nanoseconds or less until the data becomes valid at a stable address. The DMA interface line has two types of HOLD and HOLDA. 65 enters the holder state and emits a HOLDA signal. These signals are originally used to connect external DMA devices, but are used to share some or all of the memory with external devices and use them as global memories. In addition, when the central processor 65 is in a honed state, all signals of the primary bus are in a high impedance state, and all operations through the primary bus are stopped. At this time, the external device is given the possession of the bus and accessed to the memory. The CPU 65 controls the 8K * 32-bit extended memory area and the input / output area through the expansion bus. Since there is no hold function on this bus, only local memory or I / O operation is possible, and this bus uses external memory in the hold state when using memory or I / O devices with different speeds from the main memory, or using main memory as global memory. Mainly used for communication with devices, the signals related to system control include system reset, ROM enable, master clock, and clock output.

In the present invention, the operation of the central processor 65 is controlled by the microcomputer of the personal computer, which is the main controller, the central processor 65 operates in three states of reset and hole operation, and in the microcomputer 2, the form of input / output data. S / W operating in the central processor 65 is downloaded to the memory of the microcomputer 2 in the reset state, and the central processor 65 operates in the microprocessor mode.

When the input / output address decoder 621 and the internal bus arithmetic logic unit 622 are used, the microcomputer 2 outputs the input / output data to the signal processing unit 5 to bring the central processor 65 into the holder state.

The memory controller 63 includes a memory 635, a microcomputer memory address decoder 631, a central processor address decoder 634, a byte control signal generation byte decoder, and a memory control multiplexer 633. 16K of global memory is used for memory and the remaining 112K is used for local memory. The microcomputer memory address decoder 631 includes a comparator and a gate logic. The global memory has a capacity of 16K * 32 bits, which corresponds to 16K bytes. In addition, since the addressing of the microcomputer is in bytes, the global memory occupies 64K area on the memory address map.

The signal processor 5 of the present invention uses only the lower 8 bits of the data lines of the system bus, and the internal data lines are 32 bits. Therefore, when the microcomputer 2 accesses the global memory, the lower 2 bits of the system bus are used. It is necessary to decode the address line to generate a signal for accessing any byte of 32 bits, which is the byte decoder 632 for generating the byte control signal of the memory control unit 63 in the interface 6.

In addition, when the microcomputer 2 accesses the global memory, the central processor 65 is in a honed state, and the data and address lines of the central processor 65 are in a high impedance state and the control line is inactivated.

Therefore, the control lines are multiplexed through the memory control multiplexer 633 and the control lines delivered from the microcomputer and applied to the memory 635. That is, the memory control multiplexer 633 performs this function, and the four chip select signals CS0-CS3 are multiplexed by multiplexing the signal generated by the byte decoder 632 and the signal transmitted from the address decoder 631 for the CPU. And a write enable signal (WE) by multiplexing the MEMW signal on the system bus and the R / W signal of the central processor 65, wherein the select signal of the multiplexing process is an internal bus operation logic unit 622. Use the HMODE signal from).

In addition, the address decoder 631 serves to generate a chip select signal of the memory using the address line of the central processor 65 and the memory strobe, and the signal is passed through the memory control multiplexer 633 to the memory 635. It is told.

In addition, the buffer unit 64 composed of the data buffer 641 and the address buffer 642 has a buffer between the address lines of the system bus only when the global memory is accessed from the microcomputer 2, and is made by the address decoder 631. The control signal is used as the enable signal of the buffer. The address line of the system bus is shifted two bits in the lower direction and connected to the address line of the internal bus.

The data buffer 641 is composed of four 8-bit bidirectional buffers. The memory control signal MEMR of the system bus is used as the direction control signal, and the output of the byte decoder 632 for generating the byte control signal is used as the enable signal. It was.

In addition, the handshaking register 61 is used for synchronizing the operation of the software of the central processor 65 and the software of the microcomputer 2, wherein the operation of the microcomputer software is assembled by the analog digital conversion board unit 1. It is synchronized with the interrupt signal generated for each section, and the operation of the central processor 65 software is synchronized with the microcomputer 2 software.

Synchronization between the two software is done using two handshaking registers, one of which is located in the global memory and the other is located in the input / output area of the central processor 65 and configured using the signals of the expansion bus. .

In addition, the digital analog conversion board unit 8, which consists of four channels and consists of two boards, has a buffer 1 83 on a system bus to which the address decoder 81 and the control signal generator 82 are connected as shown in FIG. It is connected to the D / A converter 84 via), and composed of an anti-aliasing circuit 85 for eliminating an aliasing phenomenon, a low pass filter 86, and a buffer 2 87 for adjusting the size of the signal. do.

Therefore, when the address of the designated channel enters through the system bus, the bus is turned on by the output of the address decoder 81, and predetermined data is input to the buffer 1 83, and the buffer 1 83 is inputted. The predetermined sound signal outputted from is converted into an address through a D / A converter 84 using a complementary offset binarg (COB) code, buffered through an op amp, not shown, and then the anti-aliasing circuit 85 After passing through the low pass filter 86, the unbalanced signal is converted into a balance signal through the buffer 2 87 and outputted.

The ram disk 4 is used to store system software, sound field synthesis software and a sound field parameter table. In the present invention, the capacity of the ram disk 4 is 360 kilobytes, and the allocated input / output address is, for example, It was set as 2b0H-2b7H.

On the other hand, the user interface 7 serves to receive the eight sound field parameter values required for the reverberation sound generation.

As described above, according to the present invention, the user creates the desired reflection sound, reverberation sound and inherent resonance in real time according to the eight sound field parameters related to the reverberation sound generation pattern to make the sound quality of the original sound the best sound quality. The reverberation sound generation method can be modified by software, so that the desired sound effect can be easily obtained. It is possible.

Claims (5)

Receiving a stereo sound input sample and storing it in a delay buffer (S1); Generating an initial reflection sound and a reverberation reference signal using an acoustic signal delayed by a predetermined time (S2); The loop time Ta and Tc are calculated using the delay time of the comb filter 55 and the all-pass network 553 of each channel, and the band of each channel using the reverberation time, the high reverberation ratio and the low reverberation ratio. Calculating gain, high gain, midrange gain, and low pass (S3); Generating reverberation sound of 16 channels (S4); A signal combining step (S5) of calculating the sixteen reverberations into four outputs; Indoor sound processing method comprising the step (S6) of outputting the signal-coupled reverberation sound in four channels. The method of claim 1, wherein the generating of the reverberation reference signal using the delayed sound signal as the initial reflection sound comprises: reading a predetermined signal used for the reverberation (S21); Reading a delay signal used for the initial reflection sound (S22); Calculating a reverberation reference signal (S23); Indoor acoustic processing method comprising the step (S24) of calculating the initial reflection sound signal. The method of claim 1, wherein the generating of the reverberation sound of the 16 channels (S4) comprises: setting a signal processing channel to '0' (S40); Fetching M sample delay data of the M sample delay circuit 522 according to the comb filter 55 delay time (S41); Fetching N sample delay data of the N sample delay circuit 5534 according to the delay time of the all-pass network 553 (S42); Calculating output data of the all-pass network 5534 (S43); Calculating reverberation sound of each channel by multiplying the output data of the all-pass network 5534 by the output signal of the fifth band gain unit 56 (S44); Calculating data obtained by multiplying the output data of the all-pass network 5534 by the output signals of the second to fourth band gain units 5554-5544 of each channel (S45); Fetching the output data of one sample delay circuit (5547, 5548) (S46); Calculating a final feedback data of the comb filter 55 including the data signal data passed through the second to fourth band gain units 55542-5544 and the output data of the one-sample delay circuits 5547 and 5548 (S47); ; Updating the data of the M sample delay circuit 552 and the N sample delay circuit 5534 (S48); Detecting whether the currently processed signal channel is larger than 16 (S49); If the result of the detection in the step S49 is less than 16, the M sample delay of the M sample delay circuit 552 according to the delay time of the comb filter 55 is regenerated to the signal processing channel of which the current signal processing channel is increased by '1'. Indoor sound processing method comprising the step of returning to the process of fetching data (S41) (S50). The signal combining step (S5) of calculating the sixteen reverberation sounds into four outputs comprises outputting sixteen reverberation sound output data through different signal processors 521-536, respectively. Calculating and outputting four output signals (output 1 to output 4) by adding and subtracting each of them (S51); And the result of adding the left initial reflection sound signal to the output 1 as the final output value of the output 1, and the result of adding the write initial reflection sound signal to the output 2 as the final output value of the output 2 (S52). Way. The method of claim 1, wherein outputting the reverberation sound through four channels (S6) comprises: adjusting a gain of four channels of output signals (outputs 1 to 4) (S51); And (S62) converting the output signal (outputs 1 to 4) of the floating point format into a 16-bit integer and outputting the integer to a digital analog conversion board unit (S62).