KR970004099A - Darlington connection semiconductor device and manufacturing method - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a semiconductor device, and more particularly, to a semiconductor substrate of a high concentration first conductive type provided as a common collector of first and second transistors; A low concentration first conductive epitaxial layer epitaxially grown on a semiconductor substrate; A first base region of a second conductivity type formed in the epi layer to serve as a base of the first transistor; A second base region of a second conductivity type separated from the first base region and formed in the epi layer to provide a base of the second transistor; A highly concentrated second conductive type zener region formed below the first base region in the epi layer; A high concentration first conductive type emitter region; At least one or more second emitter regions of high concentration first conductivity type; A base electrode of the first transistor; A first emitter electrode of the first transistor; A second emitter electrode of the second transistor; And a second base electrode.

Therefore, in the present invention, the zener voltage can be controlled by the width of the collector region, so that the high voltage characteristic can be improved.

Description

Darlington connection semiconductor device and manufacturing method

Since this is an open matter, no full text was included.

3 is a cross-sectional view of a darlington connecting semiconductor device according to the present invention, and FIG. 4 is a process flowchart showing a manufacturing process of the darlington connecting semiconductor device according to the present invention.

Claims (5)

A high concentration first conductive semiconductor substrate provided with a common collector of the first and second transistors; A low concentration first conductive epitaxial layer epitaxially grown on the semiconductor substrate; A first base region of a second conductivity type formed in the epi layer to serve as a base of the first transistor; A second base region of a second conductive type separated from the first base region and formed in an epitaxial layer to serve as a base of the second transistor; A highly concentrated second conductive type Zener region formed in the epi layer adjacent to the first base region; An emitter region of a high concentration first conductivity type formed in the first base region; At least one second emitter region of a high concentration first conductivity type formed in the second base region; A base electrode of the first transistor formed on the first base region; A first emitter electrode of the first transistor formed on the first emitter region; A second emitter electrode of the second transistor formed on the at least one second emitter region; And a second base electrode formed on a second base area around the at least one second emitter area and connected to the first emitter electrode. The multitone connection semiconductor device according to claim 1, wherein the breakdown voltage of the zener region is adjusted by a collector width between the zener region and the semiconductor substrate. The semiconductor device according to claim 1 or 2, wherein the semiconductor device further comprises a second conductive type field limiting ring region formed in the epi layer so as to surround the first and second base regions. Growing an epitaxial layer of a low concentration of a first conductivity type on a high concentration of a first conductivity type semiconductor substrate provided as a common collector of the first and second transistors; Selectively forming and activating a first impurity region having a high concentration of a second conductivity type to provide a zener region to the epi layer; Selectively forming a pair of second impurity regions of the second conductive type for providing the epi layer as a base region, wherein any one of the second impurity regions includes the first impurity region and the second impurity regions Activating to form a depth of the first impurity region deeper than a depth of the second impurity regions; Selectively forming a high concentration of a first impurity type third impurity region in the first and second impurity regions; And forming a base and an emitter electrode on the second impurity regions and the third impurity regions. 5. A method according to claim 4, wherein a field limiting ring region surrounding the second impurity regions is formed simultaneously with the second impurity region. ※ Note: The disclosure is based on the initial application.