KR970003871A - Semiconductor package - Google Patents

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Publication number
KR970003871A
KR970003871A KR1019950018546A KR19950018546A KR970003871A KR 970003871 A KR970003871 A KR 970003871A KR 1019950018546 A KR1019950018546 A KR 1019950018546A KR 19950018546 A KR19950018546 A KR 19950018546A KR 970003871 A KR970003871 A KR 970003871A
Authority
KR
South Korea
Prior art keywords
chip
semiconductor package
attached
package
molding
Prior art date
Application number
KR1019950018546A
Other languages
Korean (ko)
Inventor
노길섭
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019950018546A priority Critical patent/KR970003871A/en
Publication of KR970003871A publication Critical patent/KR970003871A/en

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Abstract

본 발명은 반도체 패캐이지에 관한 것으로서, 패드의 양면에 서로 다른 칩을 각각 부착하고 각 칩에 다수의 리드를 각각 부착하여 각 칩과 리드를 독립적으로 와이어 본딩한 후 몰딩 고정을 실시하여 두가지의 칩을 하나의 패캐이지로 구성한다.The present invention relates to a semiconductor package, in which different chips are attached to both sides of a pad, and a plurality of leads are attached to each chip, respectively, each chip and the lead are independently wire-bonded, and then molding molding is performed. Consists of one package.

Description

반도체 패캐이지Semiconductor package

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제4도는 본 발명에 따른 리드 프레임중 패드의 양면에 기능이 서로 다른 칩을 각각 부착한 후, 와이어 본딩을 실시한 상태의 단면도, 제5도는 본 발명을 이용하여 패캐이지를 구성한 상태의 사시도.4 is a cross-sectional view of a state in which wire bonding is performed after attaching chips having different functions to both surfaces of a pad of a lead frame according to the present invention, and FIG. 5 is a perspective view of a state in which a package is constructed using the present invention.

Claims (1)

패드의 양면에 서로 다른 칩을 각각 부착하고 각 칩에 다수의 리드를 각각 부착하여 각 칩과 리드를 독립적으로 와이어 본딩한 후 몰딩 고정을 실시하여 두가지의 칩을 하나의 패캐이지로 구성하는 것을 특징으로 하는 반도체 패캐이지.Each chip is attached to both sides of the pad, and a plurality of leads are attached to each chip, and each chip and the lead are independently wire-bonded, followed by molding fixing to configure two chips as one package. Semiconductor package made of. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950018546A 1995-06-30 1995-06-30 Semiconductor package KR970003871A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950018546A KR970003871A (en) 1995-06-30 1995-06-30 Semiconductor package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950018546A KR970003871A (en) 1995-06-30 1995-06-30 Semiconductor package

Publications (1)

Publication Number Publication Date
KR970003871A true KR970003871A (en) 1997-01-29

Family

ID=66526119

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950018546A KR970003871A (en) 1995-06-30 1995-06-30 Semiconductor package

Country Status (1)

Country Link
KR (1) KR970003871A (en)

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