KR970003094B1 - Speech synthesizing control device - Google Patents

Abstract

A device which separate central control device's movement that is irregular control movement from regular control movement, and take exclusive responsibility for irregular control movement such as transmission and reception of the voice service data information and a channel service information offered from ACTAS and possessed of new micro processor subordinated by central control device, control voice synthesis transmission and reception movement from microprocessor to each channel. The device consists of an automatic answering control means and a data interface means. The said automatic answering control means takes exclusive responsibility for irregular control moment such as transmission and reception of a voice service data and channel service information. The said data interface means consists of the voice synthesis and clock generating means and the microprocessor and applies the information relating to the vocoding data address to the voice synthesis and clock generating means and transmittes the voice service resulting to the automatic answering control means.

Description

Voice synthesis controller

1 is a block diagram of a conventional speech synthesis control device that is largely composed of an automatic response control unit and an interface unit.

2 is a block diagram of a voice synthesis control apparatus according to the present invention.

* Explanation of symbols for main parts of the drawings

10: automatic response control unit 11: data matching unit

12: central processing unit 20: interface unit

21, 31: main memory 22: memory control

23: channel matching section 24: buffer section

25 address decoder 30 data matching controller

32, 27: control and decoder unit 33: first random access memory

34: data and address buffer section 35: microprocessor circuit section

36: second random access memory 38: clock receiving and distribution unit

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for controlling voice synthesis, and in particular, when an automatic voice response function is required for an inquiry call that is applied to an automatic changed phone number announcement system (hereinafter referred to as ACTAS) of an electronic switching system. The present invention relates to a speech synthesis controller for processing a synthesis processing control function in real time.

In general, an automatic voice response unit (hereinafter referred to as AVRU) is provided in an ACD device of an electronic switching system to perform a function of synthesizing and guiding voices to incoming queries from any subscriber of a public communication network. An apparatus for performing voice synthesis for automatic response in a conventional AVRU is shown in FIG.

FIG. 1 is a block diagram of a conventional speech synthesis control device, and is composed of an automatic response controller 10 and an interface unit 20. The detailed configuration and operation thereof are as follows.

The automatic response control unit 10 receives the channel information generated from the ACD device of the electronic switching system and the data according to the service content from the upper layer, and then combines the voice patterns stored in the PCM form using the data according to the service content. It is responsible for the function of transmitting through the corresponding channel received, the component for transmitting and receiving channel information and data according to the service content from a higher layer, that is, a high level processor (VoC) (Vocoding Control Processor) (not shown) And a central processing unit 12 which transmits and receives necessary message data with the VCP through the data matching unit 11 and transmits voice PCM data to a channel allocated from the VCP. .

In addition, the interface unit 20 includes an AVR vocoding memory unit (not shown), an automatic voice response monitoring and test unit (not shown), and the like, according to the control signal and transmission / reception data of the automatic response control unit 10. A component performs a matching function with data of a device, and a component includes: a ROM memory storing a control program of the auto-response control unit 10, information on service status of each transmission channel, and variable data required for process execution. And a control signal for accessing each memory in the main memory unit 21 according to a control signal applied from the main memory unit 21 having a RAM for storing the data, and the automatic response controller 10. Address for outputting the vocoding data which is applied to the memory control section 22 and the automatic response control section 10 at a predetermined time period. A channel matching unit 23 for transmitting information for each channel to an AVMB having an automatic voice response memory and a matching function, and an address for outputting vocoding data applied from the automatic response control unit 10. A buffer unit 24 and the automatic response controller 10 for temporarily storing information and temporarily transmitting the data to the channel matching unit 23 and data for reading and writing each channel information to the main memory unit 21. The address decoder 25 receives the address data applied to the main memory unit 21 and selects the automatic voice response monitoring and test unit or the AVR vocoding memory unit.

At this time, the central processing unit 12 in the auto-responder control unit 10 sends and receives various types of information such as upper processor VCP, voice service data information, and channel service information to perform the automatic voice response function. And a control operation for performing data transmission / reception with each component of the interface unit 20 and an automatic voice response function at periodic intervals of 128 msec. 12) A lot of loads are generated, and in particular, the voice synthesis processing function is performed when an irregular operation of exchanging various information such as voice service and data information and channel service information with the upper processor VCP increases due to the above-mentioned reasons. In the data transmission and reception operation with the interface unit 20 for This increases the possibility that the problem was caused begin.

An object of the present invention for solving the above problems is to provide the central control unit in ACTAS by separating the operation of the central control unit that controls the operation between the upper processor VCP and the interface unit, that is, irregular control operation and regular control operation. It is responsible for irregular control operations such as transmission and reception of voice service data information and channel service information, and includes a new microprocessor subordinate to the central control unit to control voice synthesis transmission operation from each microprocessor to each channel. An object of the present invention is to provide a speech synthesis controller for performing a control operation.

A feature of the present invention for achieving the above object is, in the voice synthesis control system in the automatic telephone number change guide system, irregularities such as transmission and reception of voice service data information and channel service information provided by the upper processor of the automatic guide system An automatic response control unit dedicated to the automatic control operation, and an internal memory in which voice data necessary for the automatic response service is stored in the PCM form, and the memory is addressed according to information corresponding to an applied vocoding data address. A voice synthesis and clock generating means and a microprocessor for performing voice service and generating a clock required by the system by outputting the announcement text on the corresponding channel are provided to control signals and transmission / reception data applied by the automatic response control means in the microprocessor. According to the award And a data matching control unit which applies information corresponding to the vocoding data address to the speech synthesis and clock generation means and notifies the automatic response control means of the result of voice service, and wherein the automatic response control chatter is irregularly controlled with a higher level. The microprocessor of the data matching control means is dedicated to the operation and is responsible for controlling the voice synthesis transmission operation to each channel to increase the reliability of the system.

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.

2 is a block diagram of an apparatus for controlling voice synthesis according to the present invention, wherein the automatic response controller 10 dedicated to irregular control operations, such as transmission and reception of voice service data and channel service information, provided by the upper processor VCP of ACTAS. And a VOCB-A (Vododing and Clock Distribution Board-A) (not shown), which performs a voice synthesis and clock generation function according to a control signal and transmission / reception data of the automatic response controller 10 in the microprocessor. Data matching control unit 30 which performs data matching function with devices such as sound) and performs a regular control operation such as controlling a voice synthesis transmission operation to each channel. As follows.

The automatic response control unit 10 includes a data matching unit 11 for transmitting and receiving data according to channel information and service content from a high-level processor VCP (Vocoding Control Processor) (not shown), and the data. Send and receive the necessary message data with the VCP through the matching unit 11 to form a data output form in units of voice phrases based on this, and apply it to the data matching control unit 30 and the service result for each channel of the data matching control unit 30. It consists of a central processing unit 12 for reporting the information about the VCP.

Looking at the configuration of the data matching controller 30, the main memory unit 31 for storing the operation program of the automatic response control unit 10 and the variable data generated when the operation of the automatic response control unit 10 is performed, A first control and decoder unit 32 for generating a control signal for addressing each element in the data matching control unit 30 according to the speech synthesis control signal applied from the automatic answering control unit 10, and an area designated for each channel; A first random access memory 333 for storing channel service presence information and voice service data information and storing information on a result after a voice response service for each channel, and the main memory unit in the automatic response controller 10; A data and address buffer unit 34 for latching an address and data for accessing the first random access memory 33 and the first random access memory 33; Receiving a clock of a periodic frequency band from a VOCB-A (Vodob and Clock Distribution Board-A) (not shown) in charge of the generation function, and accesses the first random access memory 33 based on the clock. The microprocessor circuit unit 35 converts the coded data address information and stores the service result into the random access memory 33, and stores the vocoding data address information converted by the microprocessor circuit unit 35 and stores the VOCB. A second control and decoder for generating a control signal for accessing the second random access memory 36 to the A and the microprocessor circuit 35 and the first and second random access memories 33 and 36. The clock 37 corresponding to a predetermined number of predetermined frequency bands applied from the unit 37 and the VOCB-A is applied to each component of the data matching controller 30 itself. Supply a clock of a predetermined predetermined frequency band and apply an address to the second random access memory 36 so that the VOCB-A can access the vocoding data address information stored in the second random access memory 36. And a clock receiving and distributing unit 38.

Referring to the operation of the speech synthesis control device according to the present invention configured as described above are as follows.

First, the central processing unit 12 receives voice output information and channel service information from a higher processor VCP (Vodoing Control Processor) through the data matching unit 11 and stores the control operation program stored in the main memory unit 31. Accesses a function for communicating with a higher level and a program for voice service designation and control for each channel to form an output form of data in units of voice phrases based on data applied from the VCP according to an operation program. The data is applied to the address buffer unit 34, and the data and address buffer unit 34 latches data applied from the central processing unit 12 and stores the data in the first random access memory 33.

In this case, the microprocessor circuit unit 35 including the microprocessor 35A and the RAM 35B capable of storing state data that may occur during operation of the microprocessor 35A has a VOCB for voice synthesis and clock generation functions. Receive periodic 128msec clock pulse from -A and access the voice service information for each channel stored in the first random access memory 33 by the central processing unit 12 as the information corresponding to the vocoding data address. After the conversion, the VOCB-A is stored in the second random access memory 36 so that the VOCB-A can read it.

The VOCB-A, which accesses information corresponding to the vocoding data address stored in the second random access memory 36, accesses the internal memory in which voice data required for the auto answering service is stored in the PCM form. Thereafter, the voice data accessed from the internal memory, that is, the voice announcement text is output for each channel to provide a service.

When the microprocessor 35A detects the process of the voice service performed by the VOCB-A, the service result is stored in the first random access memory 33 to report to the central processing unit 12. In this case, since the synchronization clock used in the microprocessor 35A has a cycle of 128 msec, a service of up to 128 channels is possible.

Thereafter, the central processing unit 12 accesses the service result stored in the first random access memory 33 and notifies the upper level processor VCP through the data matching unit 11.

By providing a voice synthesis control device operating as described above to reduce the load caused by the control operation of the central processing unit 12 in the automatic response control unit 10, various information such as the higher processor VCP, voice service and data information and channel service information. In the case of increasing the number of irregular operations for transmitting and receiving data, there is an effect of solving the problem that the possibility of malfunction in the data transmission / reception operation with the interface unit 20 for performing the voice synthesis processing function increases.

Claims (3)

An apparatus for synthesizing voice in an automatic telephone number change guide system, comprising: automatic response control means dedicated to irregular control operations such as transmission and reception of voice service data information and channel service information provided by an upper processor of the automatic guidance system; Voice service is provided by accessing the internal memory according to the information corresponding to the applied vocoding data address and outputting the corresponding voice announcement text to the corresponding channel. Speech synthesis and clock generation means for performing and generating a clock required for the system; And a microprocessor for applying information corresponding to a vocoding data address to the voice synthesis and clock generating means according to a control signal and transmission / reception data applied by the auto answering control means in the microprocessor. The automatic answering control means is responsible for the irregular control operation with the upper level, and the microprocessor of the data matching control means is responsible for controlling the speech synthesis transmission operation to each channel. Voice synthesis control device, characterized in that to increase the reliability of the system. The apparatus of claim 1, wherein the data matching control means comprises: a main memory for storing an operation program of the automatic response control means and variable data generated when an operation of the automatic response control means is performed; A first random access memory for storing channel service presence information and voice service data information in a designated area for each channel and for storing information on a result after the voice response service for each channel; A data and address buffer for latching an address and data for accessing the main memory and the first random access memory in the auto answering control means; A voice service performed by the speech synthesis and clock generation means by receiving a clock of a predetermined frequency band from the speech synthesis and clock generation means, accessing the first random access memory and converting it into vocoding data address information. A microprocessor circuit unit for storing a result in the first random access memory; And a second random access memory for storing the vocoding data address information converted in the microprocessor circuit unit and transferring the vocoding data address information to the voice synthesis and clock generation means. 3. The apparatus according to claim 2, further comprising: a first control and decoder unit for generating a control signal for accessing each component required according to the speech synthesis control signal applied from the automatic response control means; A second control and decoder unit for generating a control signal for accessing the microprocessor circuit unit and the first and second random access memories; And a vocoding data address stored in the second random access memory by supplying a clock of a predetermined frequency band required for each component by receiving clock pulses corresponding to a predetermined number of predetermined frequency bands applied from the speech synthesis and clock generating means. And a clock means and a distribution means for applying an address to the second random access memory for accessing information by the voice synthesis and clock generation means.