KR960702154A - Digital signal encoding method and apparatus, digital signal recording method and apparatus, digital signal recording medium, and digital signal decoding method and apparatus - Google Patents

Digital signal encoding method and apparatus, digital signal recording method and apparatus, digital signal recording medium, and digital signal decoding method and apparatus Download PDF

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KR960702154A
KR960702154A KR1019950704789A KR19950704789A KR960702154A KR 960702154 A KR960702154 A KR 960702154A KR 1019950704789 A KR1019950704789 A KR 1019950704789A KR 19950704789 A KR19950704789 A KR 19950704789A KR 960702154 A KR960702154 A KR 960702154A
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digital signal
code series
parity
code
series
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KR100384087B1 (en
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준 요네미츠
류이치 이와무라
야수시 후지나미
가츠지 이가라시
요시유키 아키야마
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이데이 노부유키
소니 가부시키가이샤
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Abstract

본 발명은 디지탈 신호가 에러 보정 코드 가산에 의해 엔코딩 되고 디코딩 될때 간단한 구조로 에러 보정캐퍼빌리티를 개선시키고 용장도를 감소시키는 디지탈 신호 엔코딩 방법 및 장치, 디지탈 신호 기록 매체 그리고 디지탈 신호 디코딩 방법 및 장치를 제공하는 것이다. 디지탈 신호가 에러 보정 코드 가산에 의해 엔코딩될때 콤팩트 디스크 표준 이상으로 코드 길이, 보정 패리티수 및 인터리브 제한 길이를 증가시키므로써 용장도를 감소시키고 기록될 데이타 사이즈를 증가시킨다.The present invention provides a digital signal encoding method and apparatus, a digital signal recording medium and a digital signal decoding method and apparatus for improving error correction capability and reducing redundancy with a simple structure when a digital signal is encoded and decoded by an error correction code addition. To provide. When digital signals are encoded by error correction code addition, increasing the code length, correction parity number and interleaved limit length beyond the compact disc standard reduces the redundancy and increases the data size to be recorded.

Description

디지탈 신호 엔코딩 방법 및 장치, 디지탈 신호 기록 매체 그리고 디지탈 신호 디코딩 방법 및 장치(Digital signal encoding method and apparatus, digital signalrecording medium, and digital signal decoding method and apparatus)Digital signal encoding method and apparatus, digital signal recording method and apparatus, digital signal recording medium, and digital signal decoding method and apparatus

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 따라서 디지탈 신호를 엔코딩 및 디코딩하는 방법에 의해 C1 코드의 하나의 코드 길이구조를 도시한 개요도.1 is a schematic diagram illustrating one code length structure of a C1 code by a method of encoding and decoding a digital signal according to the present invention.

Claims (30)

에러 보정 코드를 가산함으로써 디지탈 신호를 엔코딩하는 디지탈 신호 엔코딩 방법에 있어서, 입력 디지탈 신호의 적어도 제1코드 시리즈를 이용하므로써 얻어진 제1패리티를 상기 입력 디지탈 신호에 가산하는 단계와, 심볼을 1심볼씩 시프팅 하므로써 다수의 인접 제1코드 시리즈로부터 추출되는 다수의 심볼에 대응하는 제2코드 시리즈를 이용하므로써 얻어지는 제2패리티를 상기 입력 디지탈에 가산하는 단계 및, 상기 제2코드시리즈 심볼 배열이 기록 매체상의 심볼 배열과 일치하는 않도록 상기 제1 및 제2패리티가 가산되는 상기 입력디지탈 신호를 배열하는 단계를 포함하는 디지탈 신호 엔코딩 방법.A digital signal encoding method for encoding a digital signal by adding an error correction code, the method comprising: adding a first parity obtained by using at least a first code series of an input digital signal to the input digital signal; Adding a second parity obtained by using a second code series corresponding to a plurality of symbols extracted from a plurality of adjacent first code series by shifting to the input digital, and wherein the second code series symbol arrangement is a recording medium. And arranging the input digital signal to which the first and second parities are added so as not to coincide with the symbol arrangement of the phases. 제1항에 있어서, 상기 제1 및 제2코드 시리즈의 코드 길이, 상기 제1패리티, 상기 제2패리티 및 인터리브 제한 길이 각각은 콤팩트 디스크 표준보다 긴 디지탈 신호 엔코딩 방법.2. The method of claim 1, wherein the code length, the first parity, the second parity, and the interleaved limit length of the first and second code series are each longer than a compact disc standard. 제1항에 있어서, 상기 제2코드 시리즈는 소청수의 상기 제1코드 시리즈와 관계하여 폴딩(folding)되는 부분을 제외하는 디지탈 신호 엔코딩 방법.2. The method of claim 1 wherein the second code series excludes a portion that is folded relative to the first code series of clean water. 제1항에 있어서, 상기 제2코드 시리즈는 소정수의 상기 제1코드 시리즈와 관계하여 폴딩되는 부분을 포함하는 디지탈 신호 엔코딩 방법.2. The method of claim 1 wherein the second code series includes a portion that is folded relative to a predetermined number of the first code series. 제1항에 있어서, 상기 동일한 코드 길이 및 패리티수 그리고 서로 다른 인터리브 제한 길이를 갖는 다수의 포맷으로부터 한 포맷을 선택하고, 상기 선택된 포맷을 식별하는 식별 징보가 엔코딩되는 디지탈 신호 엔코딩방법.2. The method of claim 1 wherein a format is selected from a plurality of formats having the same code length and parity number and different interleaved constraint lengths, and an identification sign is encoded that identifies the selected format. 제1항에 있어서, 식별수가 상기 제1코드 시리즈 각각에 가산되는 디지탈 신호 엔코딩 방법.2. The method of claim 1 wherein an identification number is added to each of said first code series. 에러 보정 코드를 가산하므로써 디지탈 신호를 엔코딩하는 디지탈 신호 엔코딩 장치에 있어서, 입력 디지탈 신호의 적어도 제1코드 시리즈를 이용하므로써 얻어지는 제1패리티를 상기 입력 디지탈 신호에 가산하는 수단과, 심볼을 1심볼씩 시프팅 하므로써 상기 다수의 인접 제1코드 시리즈로부터 추출되는 다수의 심볼에대응하는 제2코드 시리즈를 이용하므로써 얻어지는 제2패리티를 상기 입력 디지탈 신호에 가산하는 수단 및, 상기 제2코드 시리즈의 심볼 배열이 기록 매체상의 심볼 배열과 일치하지 않도록 상기 제1 및 제2패리티가 가산되는 상기 입력 디지탈 신호를 배열하는 수단을 구비하는 디지탈 신호 엔코딩 장치.A digital signal encoding apparatus for encoding a digital signal by adding an error correction code, comprising: means for adding a first parity obtained by using at least a first code series of an input digital signal to the input digital signal, and a symbol by one symbol Means for adding a second parity obtained by using a second code series corresponding to a plurality of symbols extracted from said plurality of adjacent first code series by shifting to said input digital signal, and a symbol arrangement of said second code series And means for arranging the input digital signals to which the first and second parities are added so as not to coincide with the symbol arrangement on the recording medium. 제7항에 있어서, 상기 제1 및 제2코드 시리즈의 코드 길이, 상기 제1패리티, 상기 제2패리티 및 인터리브 제한 길이 각각은 콤팩트 디스크 표준보다 긴 디지탈 신호 엔코딩 장치.8. The apparatus of claim 7, wherein each of the code length, the first parity, the second parity, and the interleaved limit length of the first and second code series is longer than a compact disc standard. 제7항에 있어서, 상기 제2코드 시리즈는 소정수의 상기 제1코드 시리즈와 관계하여 폴딩되는 부분을 포함하는 디지탈 신호 엔코딩 장치.8. The apparatus of claim 7, wherein the second code series includes a portion that is folded relative to a predetermined number of the first code series. 제7항에 있어서, 상기 제2코드 시리즈는 소정수의 상기 제1코드 시리즈와 관계하여 폴딩되는 부분을 제외하는 디지탈 신호 엔코딩 장치.8. The apparatus of claim 7, wherein the second code series excludes a portion that is folded relative to a predetermined number of the first code series. 제7항에 있어서, 식별 정보를 엔코딩하여 상기 동일한 코드 길이 및 보정 패리티 그리고 서로 다른 인터리브 제한 길이를 갖는 다수의 포맷으로부터 선택되는 포맷을 식별하는 수단을 더 구비하는 디지탈 신호 엔코딩 장치.8. The apparatus of claim 7, further comprising means for encoding identification information to identify a format selected from the plurality of formats having the same code length and correction parity and different interleaved constraint lengths. 제7항에 있어서, 상기 제1코드 시리즈 각각에 식별수를 가산하는 수단을 더 구비하는 디지탈 신호 엔코딩 장치.8. The apparatus of claim 7, further comprising means for adding an identification number to each of said first code series. 에러 보정 코드 가산에 의해 엔코딩되는 엔코딩 디지탈 신호를 기록하는 디지탈 신호 기록 매체에 있어서, 상기 엔코딩 디지탈 신호는; 입력 디지탈 신호의 적어도 제1코드 시리즈를 이용하므로써 얻어지는 제1패리티를 상기 입력 디지탈 신호에 가산하며, 심볼을 1심볼씩 시프팅 하므로써 상기 다수의 인접 제1코드 시리즈로부터 추출되는 다수의 심볼에 대응하는 제2코드 시리즈를 이용하므로써 얻어지는 제2패리티를 상기 입력 디지탈 신호에 가산하고, 상기 제2코드 시리즈 심볼 배열이 상기 디지탈 신호 기록 매체상의 심볼 배열과 일치하지 않도록 상기 제1 및 제2패리티가 가산되는 상기 입력 디지탈 신호를 배열하므로써 발생되는 디지탈 신호기록 매체.A digital signal recording medium for recording an encoded digital signal encoded by error correction code addition, the encoding digital signal comprising: a digital signal; A first parity obtained by using at least a first code series of an input digital signal is added to the input digital signal and corresponding symbols are extracted from the plurality of adjacent first code series by shifting symbols by one symbol. The second parity obtained by using the second code series is added to the input digital signal, and the first and second parity are added so that the second code series symbol arrangement does not coincide with the symbol arrangement on the digital signal recording medium. A digital signal recording medium generated by arranging the input digital signal. 제13항에 있어서, 상기 제1코드 시리즈의 코드 길이, 상기 제1패리티, 상기 제2패리티 및 인터리브 제한길이 각각은 콤팩트 디스크 표준보다 긴 디지탈 신호 기록 매체.15. The digital signal recording medium of claim 13, wherein each of the code length, the first parity, the second parity, and the interleaved limit length of the first code series is longer than a compact disc standard. 제13항에 있어서, 상기 제2코드 시리즈는 소정수의 상기 제1코드 시리즈와 관계하여 폴딩되는 부분을 제외하는 디지탈 신호 기록 매체.14. The digital signal recording medium according to claim 13, wherein the second code series excludes a portion folded in relation to a predetermined number of the first code series. 제13항에 있어서, 상기 제2코드 시리즈는 소정수의 상기 제1코드 시리즈와 관계하여 폴딩되는 부분을 포함하는 디지탈 신호 기록 매체.14. The digital signal recording medium according to claim 13, wherein the second code series includes a portion folded in relation to a predetermined number of the first code series. 제13항에 있어서, 상기 동일한 코드 길이 및 보정 패리티 그리고 서로 다른 인터리브 제한 길이를 갖는 다수의 포맷으로부터 선택되는 포맷을 구별하기 위하여 식별 정보가 기록되는 디지탈 신호 기록 매체.14. The digital signal recording medium according to claim 13, wherein identification information is recorded to distinguish a format selected from a plurality of formats having the same code length and correction parity and different interleaved constraint lengths. 제13항에 있어서, 상기 제1코드 시리즈 각각에 식별수가 가산되는 디지탈 신호 기록 매체.The digital signal recording medium according to claim 13, wherein an identification number is added to each of said first code series. 입력 디지탈 신호의 적어도 제1코드 시리즈를 이용하므로써 얻어지는 제1패리티를 상기 입력 디지탈신호에 가산하며, 심볼을 1심볼씩 시프팅 하므로써 다수의 인접 제1코드 시리즈로부터 추출되는 다수의 심볼에 대응하는 제2코드 시리즈를 이용하므로써 얻어지는 제2패리티를 상기 입력 디지탈 신호에 가산하고 상기 제2코드 시리즈의 심볼 배열이 기록 매체상의 심볼 배열과 일치하지 않도록 상기 제1 및 제2패리티가 가산되는 상기 입력 디지탈 신호를 배열하므로써 발생되는 엔코딩 디지탈 신호를 디코딩하는 디지탈 신호 디코딩 방법에 있어서, 상기 전송 채널로부터 공급되는 엔코딩 디지탈 신호를 재배열하는 단계와, 상기 재배열된 엔코딩 디지탈신호가 상기 제1패리티를 이용하므로써 상기 제1코드 시리즈의 방향에서 제1에러 보정을 겪도록 하는 단계 및 상기 재배열된 엔코딩 디지탈 신호가 상기 제2패리티를 이용하므로써 상기 제2코드 시리즈의 방향에서 제2에러 보정을 겪도록 하는 단계를 포함하는 디지탈 신호 디코딩 방법.A first parity obtained by using at least a first code series of an input digital signal is added to the input digital signal, and a symbol corresponding to a plurality of symbols extracted from a plurality of adjacent first code series by shifting symbols by one symbol. The input digital signal to which the first and second parities are added so that a second parity obtained by using a two code series is added to the input digital signal and the symbol arrangement of the second code series does not match the symbol arrangement on a recording medium. A digital signal decoding method for decoding an encoding digital signal generated by arranging a signal, comprising the steps of: rearranging an encoding digital signal supplied from the transmission channel, and wherein the rearranged encoding digital signal uses the first parity. To experience the first error correction in the direction of the first code series. Stage and a digital signal decoding method comprising the steps of: to undergo a second error correction in the direction of the second code series By said rearranged encoding digital signal using the second parity. 제19항에 있어서, 상기 제1 및 제2코드 시리즈와 코드 길이, 상기 제1패리티, 상기 제2패리티 및 인터리브 제한 길이는 콤팩트 디스크 표준보다 긴 디지탈 신호 디코딩 방법.20. The method of claim 19, wherein the first and second code series and code length, the first parity, the second parity and the interleaved limit length are longer than a compact disc standard. 제19항에 있어서, 상기 제2코드 시리즈는 소정수의 상기 제1코드 시리즈와 관계하여 폴딩되는 부분을 제외하는 디지탈 신호 디코딩 방법.20. The method of claim 19, wherein the second code series excludes a portion that is folded relative to a predetermined number of the first code series. 제19항에 있어서, 상기 제2코드 시리즈는 소정수의 상기 제1코드 시리즈와 관계하여 폴딩되는 부분을 포함하는 디지탈 신호 디코딩 방법.20. The method of claim 19, wherein said second code series includes a portion that is folded relative to a predetermined number of said first code series. 제19항에 있어서, 상기 동일한 코드 길이 및 패리티수 그리고 서로 다른 인터리브 제한 길이를 갖는 다수의 포맷으로부터 선택된 포맷을 구별하기 위하여 식별 정보가 검출되고, 상기 식변 정보를 토대로 에러보정 처리를 제어하는 디지탈 신호 디코딩 방법.20. The digital signal according to claim 19, wherein identification information is detected to distinguish a selected format from a plurality of formats having the same code length and parity number and different interleaved restriction lengths, and a digital signal for controlling an error correction process based on the expression information. Decoding method. 제19항에 있어서, 상기 제1코드 시리즈 각각에 가산되는 식별수가 검출되고 에러 보정 처리는 상기 식별수를 토대로 제어되는 디지탈 신호 디코딩 방법.20. The digital signal decoding method according to claim 19, wherein an identification number added to each of the first code series is detected and an error correction process is controlled based on the identification number. 입력 디지탈 신호의 적어도 제1코드 시리즈를 이용하므로써 얻어지는 제1패리티를 입력 디지탈 신호에 가산하며, 심볼을 1심볼씩 시프팅 하므로써 다수의 인접 제1코드 시리즈로부터 추출되는 다수의 심볼에 대응하는 제2코드 시리즈를 이용하므로써 얻어지는 제2패리티를 상기 입력 디지탈 신호에 가산하고 상기 제2코드시리즈의 심볼 배열이 상기 기록 매체상의 심볼 배열과 일치하지 않도록 상기 제1 및 제2패리티가 가산되는 상기 입력 디지탈 신호를 배열하므로써 발생되는 엔코딩 디지탈 신호 디코딩하는 디지탈 신호 디코딩 장치에 있어서, 상기 전송 채널로부터 공급되는 엔코딩 디지탈 신호를 재배열하는 수단과, 상기 재배열된 엔코딩 디지탈 신호가 상기 제1패리티를 이용하므로써 상기 제1코드 시리즈의 방향에서 제1에러 보정을 겪도록 하는 수단 및, 상기 재배열된 엔코딩 디지탈 신호가 상기 제2패리티를 이용하므로써 상기 제2코드 시리즈의 방향에서 제2에러 보정을 겪도록 하는 수단을 구비하는 디지탈 신호 디코딩 장치.A second parity corresponding to a plurality of symbols extracted from a plurality of adjacent first code series by adding a first parity obtained by using at least a first code series of the input digital signal to the input digital signal and shifting the symbols by one symbol The input digital signal to which the first and second parities are added so that the second parity obtained by using the code series is added to the input digital signal and the symbol arrangement of the second code series does not match the symbol arrangement on the recording medium. A digital signal decoding apparatus for decoding an encoding digital signal generated by arranging a signal, comprising: means for rearranging an encoding digital signal supplied from the transmission channel, and the rearranged encoding digital signal using the first parity using the first parity; To experience the first error correction in the direction of the Means and means for causing the rearranged encoded digital signal to undergo a second error correction in the direction of the second code series by using the second parity. 제25항에 있어서, 상기 제1 및 제2코드 시리즈의 코드 길이, 상기 제1패리티, 상기 제2패리티 및 인터리브 제한 길이 각각은 콤팩트 디스크 표준보다 긴 디지탈 신호 디코딩 장치.27. The apparatus of claim 25, wherein each of the code length, the first parity, the second parity, and the interleaved limit length of the first and second code series is longer than a compact disc standard. 제25항에 있어서, 상기 제2코드 시리즈는 소정수의 상기 제1코드 시리즈와 관계하여 폴딩되는 부분을 제외하는 디지탈 신호 디코딩 장치.26. The apparatus of claim 25, wherein the second code series excludes a portion that is folded relative to a predetermined number of the first code series. 제25항에 있어서, 상기 제2코드 시리즈는 소정수의 상기 제1코드 시리즈와 관계하여 폴딩되는 부분을 포함하는 디지탈 신호 디코딩 장치.26. The apparatus of claim 25, wherein the second code series includes a portion that is folded relative to a predetermined number of the first code series. 제25항에 있어서, 상기 동일한 코드 길이 및 패리티수 그리고 서로 다른 인터리브 제한 길이를 갖는 다수의 포맷으로부터 선택되는 포맷을 구별하는 식별 정보를 검출하는 수단과, 상기 식별 정보를 토대로 에러보정 처리를 제어하는 수단을 구비하는 디지탈 신호 디코딩 장치.26. The apparatus of claim 25, further comprising: means for detecting identification information for distinguishing a format selected from a plurality of formats having the same code length and parity number and different interleaved restriction lengths, and controlling error correction processing based on the identification information. A digital signal decoding apparatus comprising means. 제25항에 있어서, 상기 제1코드 시리즈 각각에 가산되는 식별수를 검출하는 수단 및 상기 식별수를 토대로 에러 보정 처리를 제어하는 수단을 구비하는 디지탈 신호 디코딩 장치.26. The digital signal decoding apparatus according to claim 25, comprising means for detecting an identification number added to each of said first code series and means for controlling an error correction process based on said identification number. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
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