KR960043763A - First vertical synchronous signal detection device - Google Patents

First vertical synchronous signal detection device Download PDF

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Publication number
KR960043763A
KR960043763A KR1019950013840A KR19950013840A KR960043763A KR 960043763 A KR960043763 A KR 960043763A KR 1019950013840 A KR1019950013840 A KR 1019950013840A KR 19950013840 A KR19950013840 A KR 19950013840A KR 960043763 A KR960043763 A KR 960043763A
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KR
South Korea
Prior art keywords
signal
vertical synchronous
vertical
digital
detected
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KR1019950013840A
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Korean (ko)
Inventor
박원정
Original Assignee
배순훈
대우전자 주식회사
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Priority to KR1019950013840A priority Critical patent/KR960043763A/en
Publication of KR960043763A publication Critical patent/KR960043763A/en

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Abstract

본 발명은 영상신호에 포함된 최초 수직동기신호를 검출하고 이 검출된 동기신호에 일치시켜 영상신호를 처리하도록 한 최초 수직동기신호 검출장치에 관한 것으로, 이를 해결하기 위하여 안테나로부터 수신되는 복합영상신호를 영상신호와 동기신호로 분리하는 동기신호 분리부, 이 분리된 신호중 영상신호를 디지탈신호로 변환하는 A/D 변환부, 이 디지탈신호를 저장하는 필드 메모리 및 기본 클럭 및 어드레스 데이터를 제공하는 장치를 구비한 디지탈 영상처리 장치에 있어서: 동기신호 분리부로부터 분리되는 수직동기신호중 최초의 수직동기신호가 검출되면, 이 검출된 시점을 근거로 상기 A/D 변환부에 의해 변환된 디지탈신호가 필드 메모리에 저장되도록 소정의 제어신호를 인가하는 최초 수직동기 검출부로 이루어진다.The present invention relates to a first vertical synchronous signal detecting apparatus for detecting an initial vertical synchronous signal included in a video signal and processing the video signal by matching the detected synchronous signal. To solve this problem, a composite video signal received from an antenna is provided. A synchronizing signal separating unit for dividing the video signal into a synchronizing signal, an A / D converter for converting the video signal into a digital signal among the separated signals, a field memory for storing the digital signal, and an apparatus for providing basic clock and address data A digital image processing apparatus having: a digital signal converted by the A / D converter based on the detected time point when a first vertical synchronous signal is detected among the vertical synchronous signals separated from the synchronous signal separator; It consists of an initial vertical synchronization detector for applying a predetermined control signal to be stored in the memory.

Description

최초 수직동기신호 검출장치First vertical synchronous signal detection device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제3도는 본 발명에 대한 최초수직동기신호 검출장치가 포함된 디지탈 영상신호 처리장치도.3 is a digital video signal processing apparatus including the first vertical synchronous signal detection apparatus according to the present invention.

Claims (2)

수신되는 영상신호를 분리하는 동기신호 분리부, 이 분리된 신호를 디지탈신호로 변환하는 A/D 변환부, 이 디지탈신호를 저장하는 필드 메모리 및 기본 클럭 및 어드레스 데이터를 제공하는 디지탈 영상처리 검출장치에 있어서: 상기 동기신호 분리부로부터 분리되는 동기신호중 최초의 수직동기신호가 검출되면, 이 검출된 시점을 근거로 상기 A/D 변환부에 의해 변환된 디지탈신호가 필드 메모리에 저장되도록 소정의 제어신호를 인가하는 최초 수직동기 검출부(36)로 구성됨을 특징으로 하는 최초 수직동기신호 검출장치.A sync signal separator for separating the received video signal, an A / D converter for converting the separated signal into a digital signal, a field memory for storing the digital signal, and a digital image processing detecting device for providing basic clock and address data. In the case of detecting the first vertical synchronization signal among the synchronization signals separated from the synchronization signal separation unit, predetermined control is performed such that the digital signal converted by the A / D conversion unit is stored in the field memory based on the detected time point. The first vertical synchronous signal detection device, characterized in that the first vertical synchronous detection unit 36 for applying a signal. 제1항에 있어서, 상기 최초 수직동기 검출부(36)는 전원단의 오프신호에 따라 프 리셋 상태가 유지되도록 하는 인버터(361)와, 상기 인버터(361)에 의한 프리셋 상태에서 상기 검출되는 최초 수직동기에 따른 소정의 제어신호를 출력하는 D-플립플롭(362)으로 구성됨을 특징으로 하는 최초 수직동기신호 검출장치The first vertical synchronous detection unit 36 is an inverter 361 to maintain a preset state according to an off signal of a power supply stage, and the initial vertical detection detected in a preset state by the inverter 361. First vertical synchronous signal detection apparatus characterized by consisting of a D-flip flop (362) for outputting a predetermined control signal according to the synchronization ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950013840A 1995-05-30 1995-05-30 First vertical synchronous signal detection device KR960043763A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950013840A KR960043763A (en) 1995-05-30 1995-05-30 First vertical synchronous signal detection device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950013840A KR960043763A (en) 1995-05-30 1995-05-30 First vertical synchronous signal detection device

Publications (1)

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KR960043763A true KR960043763A (en) 1996-12-23

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KR1019950013840A KR960043763A (en) 1995-05-30 1995-05-30 First vertical synchronous signal detection device

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KR (1) KR960043763A (en)

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