KR960035903A - Thin Film Transistor Manufacturing Method - Google Patents

Thin Film Transistor Manufacturing Method Download PDF

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Publication number
KR960035903A
KR960035903A KR1019950006361A KR19950006361A KR960035903A KR 960035903 A KR960035903 A KR 960035903A KR 1019950006361 A KR1019950006361 A KR 1019950006361A KR 19950006361 A KR19950006361 A KR 19950006361A KR 960035903 A KR960035903 A KR 960035903A
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KR
South Korea
Prior art keywords
forming
thin film
depositing
oxide film
film transistor
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KR1019950006361A
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Korean (ko)
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KR100324926B1 (en
Inventor
황준
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김주용
현대전자산업 주식회사
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Priority to KR1019950006361A priority Critical patent/KR100324926B1/en
Publication of KR960035903A publication Critical patent/KR960035903A/en
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Publication of KR100324926B1 publication Critical patent/KR100324926B1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42384Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/6675Amorphous silicon or polysilicon transistors
    • H01L29/66757Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/6675Amorphous silicon or polysilicon transistors
    • H01L29/66765Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)

Abstract

1. 청구 범위에 기재된 발명이 속한 기술 분야1. The technical field to which the invention described in the claims belongs

반도체 소자 제조 방법.Semiconductor device manufacturing method.

2. 발명이 해결하려고 하는 기술적 과제2. The technical problem to be solved by the invention

박막 트랜지스터 제조시, 채널을 형성하는 폴리실리콘내의 이온이 산화막으로 외방확산되므로, 채널 형성이 불완전해지고, 추후 산화막의 습식식각 공정에서 얇은 폴리실리콘의 하부가 손상되는 문제점을 해결하고자 함.In the manufacture of the thin film transistor, since the ions in the polysilicon forming the channel are diffused outward to the oxide film, the channel formation becomes incomplete, and the lower part of the thin polysilicon is damaged in the wet etching process of the oxide film.

3. 발명의 해결 방법의 요지3. Summary of the Solution of the Invention

치밀한 구조의 질화막을 사용하여, 채널을 형성하는 폴리실리콘내의 불순물 이온이 외방확산되는 것을 방지하고, 추후 산화막의 습식식각 공정에서 폴리실리콘이 손상되는 것을 방지하여 안정적인 채널을 가진 박막 트랜지스터를 제조하고자 함.By using a nitride film of dense structure, it is possible to prevent the diffusion of impurity ions in the polysilicon forming the channel and prevent damage of the polysilicon in the wet etching process of the oxide film in the future to manufacture a thin film transistor having a stable channel. .

4. 발명의 중요한 용도4. Important uses of the invention

저도핑 드레인 구조의 박막 트랜지스터 제조에 이용됨.Used to manufacture thin film transistors with low doped drain structure.

Description

박막 트랜지스터 제조 방법Thin Film Transistor Manufacturing Method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1A도 내지 제1D도는 본 발명의 한 실시예에 따른 박막 트랜지스터 제조 방법의 공정도.1A to 1D are process diagrams of a method of manufacturing a thin film transistor according to an embodiment of the present invention.

Claims (4)

박막 트랜지스터를 제조하는 방법에 있어서, 반도체 기판에 산화막이 형성된 구조 상에 소정 두께의 질화막을 증착하는 단계와, 소스/드레인용 폴리실리콘 및 게이트 산화막을 차례로 증착하는 단계와, 게이트 전극용 폴리실리콘을 증착하고 도핑을 실시한 다음, 게이트 전극을 형성하고 저도핑 드레인 영역을 형성하기 위한 이온주입을 실시하는 단계와, 스페이서용 산화막을 증착한 후, 블랭킷 식각 공정을 이용하여 측벽 스페이서를 형성하는 단계, 및 소스/드레인 영역을 형성하기 위한 이온주입을 실시하고 어닐링하는 단계를 포함해서 이루어진 박막 트랜지스터 제조방법.A method of manufacturing a thin film transistor, comprising: depositing a nitride film having a predetermined thickness on a structure in which an oxide film is formed on a semiconductor substrate, sequentially depositing source / drain polysilicon and a gate oxide film, and forming a gate electrode polysilicon Depositing and doping, ion implanting to form a gate electrode and forming a low doping drain region, depositing an oxide film for spacers, and then forming sidewall spacers using a blanket etching process, and A method of fabricating a thin film transistor, comprising performing annealing and annealing to form a source / drain region. 제1항에 있어서, 상기 질화막의 두께는 약 500Å 내지 1500Å인 것을 특징으로 하는 박막 트랜지스터 제조 방법.The method of claim 1, wherein the nitride film has a thickness of about 500 kV to 1500 kPa. 박막 트랜지스터를 제조하는 방법에 있어서, 반도체 기판에 산화막이 형성된 구조 상에 게이트 전극을 형성하고 게이트 산화막을 증착하는 단계와, 소스/드레인용 폴리실리콘을 증착한 후, 저도핑 드레인 영역을 형성하기 위한 포토레지스트 패턴을 형성하고 이온주입을 실시하는 단계와, 소스/드레인 영역 형성을 위한 포토레지스트 패턴을 형성하고 이온주입을 실시하는 단계 및, 잔류 포토레지스트를 제거하고 소정 두께의 질화막을 증착한 후, 어닐링하는 단계를 포함해서 이루어진 박막 트랜지스터 제조 방법.A method of manufacturing a thin film transistor, comprising: forming a gate electrode on a structure in which an oxide film is formed on a semiconductor substrate, depositing a gate oxide film, depositing polysilicon for source / drain, and then forming a low doping drain region Forming a photoresist pattern and performing ion implantation, forming a photoresist pattern for forming a source / drain region and performing ion implantation, removing residual photoresist and depositing a nitride film having a predetermined thickness, A thin film transistor manufacturing method comprising the step of annealing. 제3항에 있어서, 상기 질화막의 두께는 약 500Å 내지 1500Å인 것을 특징으로 하는 박막 트랜지스터 제조 방법.4. The method of claim 3, wherein the nitride film has a thickness of about 500 kW to 1500 kW. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950006361A 1995-03-24 1995-03-24 Method for fabricating thin film transistor KR100324926B1 (en)

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Application Number Priority Date Filing Date Title
KR1019950006361A KR100324926B1 (en) 1995-03-24 1995-03-24 Method for fabricating thin film transistor

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Application Number Priority Date Filing Date Title
KR1019950006361A KR100324926B1 (en) 1995-03-24 1995-03-24 Method for fabricating thin film transistor

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KR960035903A true KR960035903A (en) 1996-10-28
KR100324926B1 KR100324926B1 (en) 2002-07-27

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100451318B1 (en) * 1997-12-26 2004-11-26 주식회사 하이닉스반도체 Semiconductor fabrication method for enhancing reliability by minimizing channeling phenomenon in ion implantation process

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100451318B1 (en) * 1997-12-26 2004-11-26 주식회사 하이닉스반도체 Semiconductor fabrication method for enhancing reliability by minimizing channeling phenomenon in ion implantation process

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KR100324926B1 (en) 2002-07-27

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