KR960033048U - Display data channel mode switching circuit of monitor - Google Patents
Display data channel mode switching circuit of monitorInfo
- Publication number
- KR960033048U KR960033048U KR2019950004255U KR19950004255U KR960033048U KR 960033048 U KR960033048 U KR 960033048U KR 2019950004255 U KR2019950004255 U KR 2019950004255U KR 19950004255 U KR19950004255 U KR 19950004255U KR 960033048 U KR960033048 U KR 960033048U
- Authority
- KR
- South Korea
- Prior art keywords
- monitor
- display data
- switching circuit
- data channel
- mode switching
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
- G09G5/006—Details of the interface to the display terminal
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2370/00—Aspects of data communication
- G09G2370/04—Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller
- G09G2370/045—Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller using multiple communication channels, e.g. parallel and serial
- G09G2370/047—Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller using multiple communication channels, e.g. parallel and serial using display data channel standard [DDC] communication
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Controls And Circuits For Display Device (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019950004255U KR0130206Y1 (en) | 1995-03-11 | 1995-03-11 | Monitor display data channel mode coversion circuits |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019950004255U KR0130206Y1 (en) | 1995-03-11 | 1995-03-11 | Monitor display data channel mode coversion circuits |
Publications (2)
Publication Number | Publication Date |
---|---|
KR960033048U true KR960033048U (en) | 1996-10-24 |
KR0130206Y1 KR0130206Y1 (en) | 1998-12-15 |
Family
ID=19409118
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR2019950004255U KR0130206Y1 (en) | 1995-03-11 | 1995-03-11 | Monitor display data channel mode coversion circuits |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR0130206Y1 (en) |
-
1995
- 1995-03-11 KR KR2019950004255U patent/KR0130206Y1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR0130206Y1 (en) | 1998-12-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E701 | Decision to grant or registration of patent right | ||
REGI | Registration of establishment | ||
FPAY | Annual fee payment |
Payment date: 20070718 Year of fee payment: 10 |
|
LAPS | Lapse due to unpaid annual fee |