KR960030067A - Storage capacitor wiring structure and driving method of thin film transistor liquid crystal display - Google Patents

Storage capacitor wiring structure and driving method of thin film transistor liquid crystal display Download PDF

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Publication number
KR960030067A
KR960030067A KR1019950000546A KR19950000546A KR960030067A KR 960030067 A KR960030067 A KR 960030067A KR 1019950000546 A KR1019950000546 A KR 1019950000546A KR 19950000546 A KR19950000546 A KR 19950000546A KR 960030067 A KR960030067 A KR 960030067A
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KR
South Korea
Prior art keywords
storage capacitor
liquid crystal
wiring structure
thin film
film transistor
Prior art date
Application number
KR1019950000546A
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Korean (ko)
Other versions
KR0154815B1 (en
Inventor
김동규
이상철
김상수
Original Assignee
김광호
삼성전자 주식회사
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Priority to KR1019950000546A priority Critical patent/KR0154815B1/en
Priority to US08/569,613 priority patent/US5745090A/en
Publication of KR960030067A publication Critical patent/KR960030067A/en
Application granted granted Critical
Publication of KR0154815B1 publication Critical patent/KR0154815B1/en

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor

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  • Engineering & Computer Science (AREA)
  • Liquid Crystal (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Thin Film Transistor (AREA)

Abstract

액정패널의 첫번째 게이트 라인에 해당되는 화소의 저장 커패시터에 있어서, 저장 커패시터의 한쪽단자는 박막 트랜지스터의 드레인 단자와 액정용량의 접속점에 연결되고, 저장 커패시터의 나머지 다른 한쪽단자는 두번째 이후의 게이트 라인을 통해서 전기적인 신호를 공급받는 구성으로 이루어지며, 기존의 게이트 라인을 이용함으로써 추가적인 공정이나 액정패널의 외부에 추가적인 회로를 설치하지 않고서도 중간 그레이 레벨에서 첫번째 화소열의 희미하게 나타나는 결점을 제거할 수 있는 효과를 가진 박막 트랜지스터 액정 표시장치의 저장 커패시터 배선구조 및 구동방법을 제공한다.In the storage capacitor of the pixel corresponding to the first gate line of the liquid crystal panel, one terminal of the storage capacitor is connected to the drain terminal of the thin film transistor and the connection point of the liquid crystal capacitor, and the other terminal of the storage capacitor connects the second and subsequent gate lines. It is composed of receiving electric signal through it, and by using the existing gate line, it is possible to eliminate the faint defects of the first pixel column at the middle gray level without additional process or installing additional circuit outside the liquid crystal panel. A storage capacitor wiring structure and a driving method of a thin film transistor liquid crystal display having an effect are provided.

Description

박막 트랜지스터 액정 표시장치의 저장 커패시터 배선구조 및 구동방법Storage capacitor wiring structure and driving method of thin film transistor liquid crystal display

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제3도는 이 발명의 제1실시예에 따른 박막 트랜지스터 액정 표시장치의 저장 커패시터 배선구조를 나타낸 상세 회로도이고, 제4도는 이 발명의 제2실시예에 따른 박막 트랜지스터 액정 표시장치의 저장 커패시터 배선구조를 나타낸 상세 회로도이다.3 is a detailed circuit diagram illustrating a storage capacitor wiring structure of a thin film transistor liquid crystal display according to a first embodiment of the present invention, and FIG. 4 is a storage capacitor wiring structure of a thin film transistor liquid crystal display according to a second embodiment of the present invention. A detailed circuit diagram is shown.

Claims (6)

액정패널의 첫번째 게이트 라인에 해당되는 화소의 저장 커패시터의 배선구조에 있어서, 저장 커패시터의 한쪽단자는 박막 트랜지스터의 드레인 단자와 액정용량의 접속점에 연결되고, 저장 커패시터의 나머지 다른 한쪽단자는 두번째 이후의 게이트 라인에 전기적으로 단락(접속)된 구성으로 이루어지는 것을 특징으로 하는 박막 트랜지스터 액정 표시장치의 저장 커패시터 배선구조.In the wiring structure of the storage capacitor of the pixel corresponding to the first gate line of the liquid crystal panel, one terminal of the storage capacitor is connected to the drain terminal of the thin film transistor and the connection point of the liquid crystal capacitor, and the other terminal of the storage capacitor is the second or later. A storage capacitor wiring structure of a thin film transistor liquid crystal display device comprising a configuration electrically shorted (connected) to a gate line. 제1항에 있어서, 상기한 두번째 이후의 게이트 라인으로서 2번째 게이트 라인을 이용하는 것을 특징으로 하는 박막 트랜지스터 액정 표시장치의 저장 커패시터 배선구조.2. The storage capacitor wiring structure of claim 1, wherein a second gate line is used as the second and subsequent gate lines. 제1항에 있어서, 상기한 두번째 이후의 게이트 라인과 저장 커패시터의 한쪽단자를 액정패널내에서 전기적으로 단락(접속)시키는 것을 특징으로 하는 박막 트랜지스터 액정 표시장치의 저장 커패시터 배선구조.The storage capacitor wiring structure of claim 1, wherein the second and subsequent gate lines and one terminal of the storage capacitor are electrically shorted (connected) in the liquid crystal panel. 제1항에 있어서, 상기한 두번째 이후의 게이트 라인과 저장 커패시터의 한쪽단자를 게이트 드라이버의 내부에서 전기적으로 단락(접속)시키는 것을 특징으로 하는 박막 트랜지스터 액정 표시장치의 저장 커패시터 배선구조.2. The storage capacitor wiring structure of claim 1, wherein the second and subsequent gate lines and one terminal of the storage capacitor are electrically shorted (connected) inside the gate driver. 액정패널의 첫번째 게이트 라인의 화소의 저장 커패시터를 구동하는 방법에 있어서, 상기 저장 커패시터의 한쪽단자와 전기적으로 단락(접속)된 두번째 이후의 게이트 라인을 통해서 첫번째 열의 저장 커패시터가 전기적인 신호를 공급받는 방법으로 이루어지는 것을 특징으로 하는 박막 트랜지스터 액정 표시장치의 저장 커패시터 구동방법.A method of driving a storage capacitor of a pixel of a first gate line of a liquid crystal panel, wherein the storage capacitor of the first column receives an electrical signal through a second or subsequent gate line electrically shorted to one terminal of the storage capacitor. A storage capacitor driving method of a thin film transistor liquid crystal display, characterized in that formed by a method. 제5항에 있어서, 상기한 두번째 이후의 게이트 라인으로서 2번째 게이트 라인을 이용하는 것을 특징으로 하는 박막 트랜지스터 액정 표시장치의 저장 커패시터 구동방법.6. The method of driving a storage capacitor of claim 5, wherein a second gate line is used as the second and subsequent gate lines. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950000546A 1994-12-09 1995-01-13 The storage capacitance wiring structure and driving method in the thin flim transistor liquid crystal display device KR0154815B1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR1019950000546A KR0154815B1 (en) 1995-01-13 1995-01-13 The storage capacitance wiring structure and driving method in the thin flim transistor liquid crystal display device
US08/569,613 US5745090A (en) 1994-12-09 1995-12-08 Wiring structure and driving method for storage capacitors in a thin film transistor liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950000546A KR0154815B1 (en) 1995-01-13 1995-01-13 The storage capacitance wiring structure and driving method in the thin flim transistor liquid crystal display device

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KR960030067A true KR960030067A (en) 1996-08-17
KR0154815B1 KR0154815B1 (en) 1998-12-15

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100434922B1 (en) * 1998-08-11 2004-06-09 리카르도 트라무야스 Matrix analog system for the reproduction of images
KR100783703B1 (en) * 2001-03-05 2007-12-07 삼성전자주식회사 Liquid crystal display panel and liquid crystal display device with the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100434922B1 (en) * 1998-08-11 2004-06-09 리카르도 트라무야스 Matrix analog system for the reproduction of images
KR100783703B1 (en) * 2001-03-05 2007-12-07 삼성전자주식회사 Liquid crystal display panel and liquid crystal display device with the same

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Publication number Publication date
KR0154815B1 (en) 1998-12-15

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